Printed 700 V/V Gain Amplifiers Based on Organic Source‐Gated Transistors with Field Plates

Printed amplifiers are promising components for flexible and wearable devices. The circuits need to have small footprint, high amplification, and low power consumption, which is not simultaneously possible with conventional thin‐film transistors because multiple stages are required and introduce sources of variability, failure, or wasted area. Source‐gated transistors (SGTs) can in principle have extremely high intrinsic gain but this is not always the case because of lateral field control problems. A good solution is the use of field plate structures, which are straightforward to implement with top contacts but not so with bottom contacts. Here, a printed implementation of organic SGT with a field plate is presented, which can achieve a record high intrinsic gain of 920 V/V. The single‐stage common‐source amplifier with two organic SGTs also exhibits a high gain of 700 V/V. Simulations confirm the effectiveness of the printed field plate, making it a promising approach for future flexible and wearable electronics.


Introduction
Organic thin-film transistors (OTFTs) are thin, flexible, and can be fabricated using a solution process at nearly room temperature, enabling large-area integration at low cost. [1][2][3] OTFTs fabricated by the printing process have achieved high mobility www.advelectronicmat.de without adequate control of the electric field at the source and the potential distribution in the source region of the semiconductor. [10b,15] The former is problematic because it allows the drain potential to effectively modulate the injection barrier at the source edge; the latter, because injection from the bulk of the source electrode is, to a first order, proportional to the potential at the semiconductor-insulator interface in the source region.
An effective solution is the inclusion of a field relief structure (also called field plate) within the source electrode construction, the role of which is to dissipate the peak of the electric field away from the injecting edge of the source electrode. [10b] In top-contact SGTs realized via photolithography, this metallic overhang connected to the source can be easily implemented simply by following the design rule, which necessitates a metal overhang around a contact hole. [10b,14,15] However, this is not as practical when top contacts are to be patterned on top of organic semiconductors, or indeed when the structure comprises bottom contacts. To this date, the fabrication method and the effectiveness of field plates in organic SGT have not been reported yet.
Here, we show high-gain and easy-to-fabricate printed OSGT with a field plate. The field plate was found to play an important role for obtaining the high intrinsic gain. Device simulation indicates that the field plate effectively minimizes the unwanted drain-field-dependent charge injection at the source edge, effectively resulting in exceptionally flat-saturated output characteristics. The single-stage amplifiers composed of the OSGTs with field plates exhibited the highest gain of 700 V/V (57 dB), which is the highest to our knowledge among singlestage organic amplifiers. This was 250 times that of the OSGTs without field plate.
The Ph-BTNT-C10 thin films deposited by blade coating were polycrystalline and 10 nm thick. The Ph-BTBT-C10 thin films deposited by a dispenser were polycrystalline and 100 nm thick. The crystal domain sizes of Ph-BTNT-C10 and Ph-BTBT-C10 were similar to or larger than the channel length (100 µm). No significant change in crystal domain size by SAM treatment was observed. The edge of the field plate was located approximately at the center between the source and drain electrodes.

Device Characteristics
The transfer characteristics for two semiconductor materials, three types of electrodes, and two device structures are shown in Figure 2a,b. Ph-BTNT-C10 exhibited overall higher current than Ph-BTBT-C10, which can be attributed to higher HOMO level in Ph-BTNT-C10. The workfunctions of source electrodes are consistent with the highest current with PFBT and the lowest current with 4-MBT, since the Schottky barrier decreases with increasing the workfunction. As for the device structure, devices with field plates showed lower current values than those without. This is due to the limited leakage current at the source electrode edge, as described in Section 2.3. Since this device uses a Schottky barrier for charge injection control, it is difficult and unreliable to calculate the field-effect mobility. The Ph-BTNT-C10 with PFBT without field plate had the highest transconductance of 644 nS ( Table 1). The presence of the field plate also resulted in lower transconductance; the effect of SAM processing was also strongly reflected, larger work function resulting in larger values of transconductance.

www.advelectronicmat.de
The effect of the field plate is clearly shown in the output characteristics in Figure 2c,d. Regardless of the semiconductor materials and the types of electrodes, the devices with field plates showed flatter saturation characteristics than those without field plates. Table 1 shows the output resistance R O = dV DS /dI D , the transconductance g m = dI D /dV GS , and the intrinsic gain γ = R O g m calculated in the saturation regime, where I D is the drain current, V DS the drain-source voltage, and V GS the gate-source voltage. The intrinsic gain represents the gain of the amplifier where the SGT is combined with an ideal current source. [14] The field plate increased the output resistance typically by two to four orders and, at the same time, decreased the transconductance by one order. Since the intrinsic gain is the product of the output resistance and the transconductance, the resultant intrinsic gain could be increased by one or two orders. The larger work function tends to decrease the output resistance slightly and increase the transconductance significantly, hence increasing the intrinsic gain. The highest intrinsic gain of 920 V/V was obtained for Ph-BTNT-C10 and PFBT, where the Schottky barrier is expected the lowest among the present devices. This improvement in output characteristics by the field plates contributes significantly to the gain of the amplifiers described later.
The current in the devices with field plates is considered limited by the source contact and adjacent semiconductor area for the following reasons. The pinch-off voltage of the Ph-BTNT-C10 device with a field plate was V DS = -1.6 V at V GS = -20 V. The magnitude of the pinch-off voltage and its change with gate voltage are a much smaller than expected from the conventional OTFT model. At the same time, the field plate should not affect the pinch off at the drain voltage because the field plate is only below the source electrode. Such a small pinch-off voltage is one of the features of source-gated transistors, where the pinch-off occurs at the source electrode.

Device Simulation
To understand the role of field plate in detail, we performed physical device simulations using Silvaco Altas. Figure 3a-d shows the charge carrier distribution in the semiconductor layer while operating in saturation. For both devices with and without field plate, the accumulation layer at the insulator interface is pinched off at the edge of the source while a depletion region forms along the source electrode, as expected. [15] The effect of the field plate is seen at the edge of the source. The reference device shows a large carrier concentration at the source edge, equivalent to a high conductance of that semiconductor region. In turn, this means that the potential applied to the drain is transmitted via the conductive semiconductor almost identically to the area immediately to the right of the source electrode, resulting in a large lateral electric field being developed between the grounded source and the negatively biased semiconductor. This electric field grows when drainsource voltage is increased and reduces the injection barrier at the edge of the source, leading to a drain-field dependent "leakage" current that degrades the saturated output characteristics (Figure 3e,g).
Conversely, when a field plate is introduced, the semiconductor area above the field plate is depleted and not conductive. Any change in drain voltage manifests in a change of electric field applied in the region of the edge of the field plate,  as opposed to the region at the edge of the source, which sees approximately the same potential distribution regardless of applied drain-source voltage, keeping charge injection from the source contact and appearing as extremely flat-output characteristics with minuscule-output conductance (Figure 3f,h). Pinch-off drain voltages in the simulated output characteristics with and without a field plate had different dependence on the semiconductor thickness. With a field plate, pinch-off drain voltage depends on the semiconductor thickness as seen in Figure 3f,h. The thinner semiconductor thickness resulted in the smaller pinch-off voltage. This dependence could be understood with the model of series capacitances composed of gate dielectric and depleted semiconductor in the literature. [15] Without a field plate, by contrast, pinch-off drain voltage was independent of the semiconductor thickness as expected in conventional organic TFTs. This indicates that the pinch-off without a field plate occurred not at the source electrode but at the drain electrode.

High-Gain Single-Stage Amplifiers
To demonstrate the high gain in the OSGTs, we fabricated common-source amplifiers by combining two equivalent OSGTs. [19] Here, we employed the depletion load amplifier (inset of Figure 4a), where the gate of the load transistor is connected to the output terminal, to make the most of the high intrinsic gain of the OSGTs. The PFBT-treated electrodes were used for all the amplifiers. The supply voltage V DD was varied between 2.5 and 30 V. All the amplifiers exhibited a steep inversion when the input voltage V IN is close to the supply voltage V DD (Figure 4a,b) because the two equivalent OSGTs have the same saturation current at V IN = V DD . The voltage gain was calculated from the data with a small enough voltage step (0.005 V). The amplifiers with field plates exhibited higher gain for both semiconductor materials at all the V DD . The gain increased with increasing the V DD , and the gains at the highest V DD of 30 V were 160 V/V for Ph-BTBT-C10 and 700 V/V for Ph-BTNT-C10 with the field plates (Figure 4c,d). The gain of the Ph-BTNT-C10 amplifier is to our knowledge the highest among the single-stage organic amplifiers and is close to the intrinsic gain of the individual OSGTs. The amplifiers could also be operated at a small V DD of 2.5 V, where the gains were 25 V/V for Ph-BTBT-C10 and 80 V/V for Ph-BTNT-C10.
Power consumption of the four types of amplifiers is compared in Figure 4e,f. The power consumptions with the field plates are a few orders lower than those without the field plates. This is because of the low saturation current in the devices with the field plates. The power consumption was nearly proportional to the supply voltage V DD in the devices with field plates because the current through the load transistor is almost independent of the driving voltage. The power consumptions at V DD = 30 V are 14 µW for Ph-BTBT-C10 without FP, 4.4 nW for Ph-BTBT-C10 with FP, 29 µW for Ph-BTNT-C10 without FP, and 85 nW for Ph-BTNT-C10 with FP.
The device structure with a field plate proposed here is similar to the dual-gate organic transistors and easy to fabricate. Actually, the field plate may have overlap with the drain Figure 3. Simulated carrier density in the semiconductor layer at V GS = V DS = -30 V: a) 100-nm-thick semiconductor without a field plate (FP), b) 100-nm-thick semiconductor with FP, c) 10-nm-thick semiconductor without FP, and d) 10-nm-thick semiconductor with FP. The field plate is in the area of x < 250 µm and y < -0.07 µm. Simulated output characteristics: e) 100-nm-thick semiconductor without FP, f) 100-nm-thick semiconductor with FP, g) 10-nm-thick semiconductor without FP, and h) 10-nm-thick semiconductor with FP.
www.advelectronicmat.de electrode and no performance change was observed. Such an easy-to-fabricate structure is important in printed electronics, where the alignment accuracy is low, typically ≈10 µm. Since a high gain can be obtained with a single-stage amplifier, it helps to simplify the circuitry and improve the fabrication cost, the fabrication yield, and the power consumption. Like other highgain amplifiers, the OSGT-based amplifiers have high-output resistance and should be used in combination with an output stage that reduces output resistance as needed. However, a twostage configuration should be sufficient to obtain both high gain and high-output current drive, with the added benefit that closed-loop frequency compensation is likely to be much easier and less area-consuming to implement for a two-stage design than for a multistage amplifier. [20]

Conclusion
To conclude, we have demonstrated the printed organic source-gated transistors with a field plate to achieve a record high intrinsic gain of 920 V/V. It is the first SGT with a field plate in the bottom gate geometry and, at the same time, the first organic SGT with a field plate. The single-stage commonsource amplifiers exhibited also a record high gain of 700 V/V among organic transistor circuits. Such high-gain printed amplifiers with low complexity of circuits, small footprint, low power consumption, and wide output voltage swing are promising circuit components for future flexible and wearable electronic devices such as biochemical (ions, glucose, and lactate in sweat) [7b] and physiological (ECG and EMG) monitoring. [12]
Device Fabrication: Glass substrates were cleaned in an ultrasonic bath with acetone, isopropanol, surfactant aqueous solution (Semi Clean M-LO), and distilled water, followed by UV/O 3 treatment. Parylene (diX-SR, KISCO) was deposited on the glass substrates as a base layer by the chemical vapor deposition (CVD) method. Field plates (50 nm thick) were fabricated by inkjet printing with a silver nanoparticle ink (NPS-JL, Harima Chemicals Group, Inc.) and sintering at 150 °C for 30 min. Then, 70-nm-thick parylene was deposited, and subsequently source and drain electrodes (50 nm thick) were printed in the same method as the field plates. Lyophobic banks for the patterning of the semiconductor layer were printed by a dispenser with a solution of Teflon (AF1600, Chemours-Mitsui Fluoroproducts Co., Ltd.) in fluorinert (FC-43, 3 M) at 1 wt%. The source and drain electrodes were treated with a self-assembly monolayer to modify the workfunction by immersing the substrates in pentafluorobenzenethiol (PFBT) or 4-methylbenzenethiol (4-MBT) solution (30 mM in 2-propanol) for 30 min. The field plate was covered with parylene and not treated with the self-assembly monolayers. Ph-BTBT-C10 was dispensed using a dispenser at a head and stage temperature of 30 °C at 5 kPa. Ph-BTNT-C10 was coated with a small blade with a stage temperature of 80 °C, an ink volume of 200 nL, and a blade speed of 100 µm s −1 . The films were annealed at 120 °C for 10 min. Parylene with a thickness of 550 nm was deposited as the top gate dielectric, and a silver top gate electrode was printed. The top gate electrode was sintered at 120 °C for 1 h.
Measurement: The electrical characteristics were measured in air using a source meter (2634B, Keithley). The channel length L = 100 µm and channel width W = 1400 µm. The specific capacitance of the top gate dielectric was 5.31 nF cm −2 . Output characteristics of the inverters were measured with a small voltage step of 0.005 V to evaluate the gain over 100.
Device Simulation: Silvaco Atlas v.5.24.1.R was used to model and simulate the OSGTs. The generated structure replicated the geometry of the fabricated devices, with a reference device width W = 1 µm. All electrodes workfunctions were 4.78 eV (to simulate the Ag electrodes required for creating the rectifying Schottky contacts to the semiconductor).
The active layer was not doped. The assignation of material parameters within the simulator does not always have the same physical meaning as the actual material parameter. To match the measured data qualitatively, the following parameters were chosen, using the generic nomenclature: electron and hole mobility 0 and 0.05 cm 2 V −1 s −1 . Effective energy band gap 1.4 eV, electron affinity 4.4 eV, relative permittivity 4, and effective densities of states for both valence and conduction band: 1.62 × 10 20 cm −3 . Insulator relative permittivity was set to 4. Temperature was set to T = 300 K.