Analogue Artificial Synaptic Performance of Self‐Rectifying Resistive Switching Device

The immense increase of unstructured data require novel computing systems that can process the input data with low power and parallel processing. This functionality is similar to that of human brains that are composed of numerous neurons, synapses, and their complex connections. To mimic the functionality of the human brain with an electronic device, the resistive switching device and crossbar array has attracted considerable attention for artificial synaptic devices and integrated systems, respectively. For this purpose, the self‐rectifying resistive switching cell based on the Si:ZrOx thin film is developed and its reliability characteristics are tested. Four achievements are highlighted in this study. 1) The retention characteristic is improved by the adoption of TaOx thin film as an oxygen reservoir layer. 2) The asymmetric electrodes can make the self‐rectifying resistive cell (SRC) have sufficient rectifying characteristic. 3) The linearity of conductance update has a dominant effect on the inference performance compared to that of the conductance range variation. 4) The device of the interface‐type resistive switching shows a high enough device yield in the crossbar array device and exhibits reliable multiply‐and‐accumulate operations in the crossbar array to mimic the human brain‐inspired computing system.


Introduction
The brain-inspired computing has attracted considerable attention to solving the "von Neumann bottleneck" in the processing of immensely increasing information and data. The most notable difference between brain-inspired computing and von Neumann (conventional) one is whether the processing and memory of data can be simultaneously accomplished in a merged device or not. Moreover, to reduce the power consumption and enhance the operation speed the parallel operation in brain-inspired computing has been highlighted. [1][2][3] The crossbar array (CA) is the most optimized device structure to realize the parallel electrical connection between the functional elements at the individual cross-point junction of the interconnection lines. [4][5][6] That is, a certain electrical node in the CA can be connected to any other nodes through the interconnection lines. When we apply a voltage (or current) as an input signal at the end of interconnection lines (top electrodes, TE), this signal is "simultaneously" transferred to all the resistors at the individual cross-point nodes in the CA, and the consequent output signal of current (or voltage) can be obtained "simultaneously" at the other side of interconnection lines (bottom electrodes, BE). It should be noted that the output signal is a result of multiplyand-accumulation (MAC) between the input signal and resistors in the CA. It means that a certain vector-matrix multiplication (VMM) operation can be performed by the CA with lower "operational complexity" than that of the conventional computing system. [7][8][9][10] To be implemented in the CA as a functional element, the device should have characteristics of electrical 2-terminal structure, controllable resistive switching (RS), non-volatility, high reliability, and low power consumption. In addition, to prevent the interference effect between the cells in the CA during the MAC or VMM operation the device should also have a selection function. All these mentioned characteristics can be found in the selfrectifying resistive cell (SRC) that equips the asymmetric currentvoltage (I-V) characteristic according to the applied bias polarity and resistive hysteresis for data storage together. [11][12][13][14][15][16][17] Previously, a few studies reported the SRC-based artificial synaptic performance. Choi et. al. reported the www.advancedsciencenews.com www.advelectronicmat.de Pt/Al 2 O 3 /HfO 2 /Ti/Pt-stacked SRC and its synaptic behavior of 50 conductance levels with the electric pulse of 10 ms-width. [18] Their SRC showed narrow operational distribution in DC I-V characteristic in the CA of 4 kbit (64 × 64) by the interface-type RS and two times synaptic conductance difference between the conductance minimum (Gmin) and maximum (Gmax). Moreover, the inference simulation results showed a recognition accuracy of 95.4%. Lv et. al. reported the Mo/MgO/AZO (Al 2 O 3 and ZnO)/W-stacked SRC with the rectification ratio of 102 and its conductance modulation for artificial synaptic application. [19] They showed the synaptic performances dependent on the applied electric pulse conditions (amplitude and width). Wang et. al. reported Pt/C/NbO x /TiN-structured SRC with an excellent rectification ratio of 106 and an inference accuracy of 95.7%. [20] Choi et. al. reported the SRC of Pt/TaO y /nanoporous (NP) TaO x /Ta-structure. [21] Systemically, they confirmed the reliability characteristics of unit SRC and showed the inference accuracy of 89.1% by the simulation results.
These previous reports selectively concentrated on one or two characteristics among device selectivity (rectification ratio), device reliability, conductance linearity of synaptic weight variation, and inference accuracy. Importantly, the operational distribution of their SRCs was not highlighted in the previous reports. However, considering the highly integrated device for the novel computing system, the operational distribution should be confirmed together with other synaptic performances.
Considering the fine operational distribution of the RS device, the interface-type RS is preferred because the conducting filament (CF)-type RS accompanies the severely stochastic processes in the formation and rupture of CFs during the RS. Although the interface-type RS has also weaknesses, such as the poor retention characteristic and low resistance ratio between low and high resistance state (LRS and HRS, respectively), these can be improved by the optimized materials adoption and device structure. In detail, the degradation of retention characteristic in the interfacetype RS can be improved by the insertion of oxygen reservoir layer with the oxide-based RS layer. [22,23] In case of low resistance ratio, the insertion of thin insulating layer with the RS layer can enhance the resistance ratio by increasing the resistance of HRS. [24] However, because this method also increases the operational voltage for programming of the RS device, the optimized structure and material for the insulating layer should be considered.
Meanwhile, it is well accepted that a high resistance ratio is preferred for sufficient variation of conductance states in the braininspired computing system. In addition, the linearity of conductance update is also important to achieve the high accuracy of inference and learning operations. In the viewpoint of RS device adoption in the brain-inspired computing system, the mentioned two kinds of characteristics (high conductance ratio and linear conductance update) should be revisited to compare what factor shows the dominant effect on the inference and learning operations because the interface-type RS typically provides the restricted resistance ratio even though it has characteristic of fine operational distribution.
In this study, we developed the Si:ZrO x -based SRC with the Ru and TiN as a TE and BE, respectively. First, we confirmed the reliability of our SRC to be implemented as an artificial synaptic device in the CA. Second, we analyzed the microscopic origin of reliable retention and rectifying characteristics by the X-ray photoelectron spectroscopy (XPS) and temperature-dependent current conduction mechanism analyses, respectively. Third, we compare the effect of the conductance ratio between G max and G min on the inference ability by the computational simulation. In addition, to improve the linearity of conductance update of our SRC we applied the two types of electric pulse trains, constant step pulse programming (CSPP) and incremental step pulse programming (ISPP) and compared the effect of linearity of conductance update on the inference ability. Consequently, the linear conductance update showed the dominant effect on the inference operation compared to the conductance ratio of the SRC. Finally, we fabricated the CA of 16 × 16 and tested the MAC operation with our SRC in two precision types of 16-and (analogue-like) 50-conductance states.

Figure 1a
shows the schematic and cross-sectional image from the analysis of the high-resolution transmission electron microscope (HR-TEM) of our unit SRC device. To achieve the asymmetric electronic energy barrier for the rectifying performance of our SRC, we adopted the Ru and TiN as TE and BE, respectively. The 5 nm-thick Si-doped ZrO x and 15 nm-thick TaO x layers were utilized as RS and oxygen reservoir layers, respectively. As shown in the HR-TEM image, the four layers in our SRC were well distinguished as different contrast and yellow dotted lines of each layer. For clear identification of each layer, we performed electron dispersive spectroscopy (EDS) analysis, and the EDS mapping result in Figure 1a shows the well-established active layers of our SRC.
The device structure was also confirmed by the Auger electron spectroscopy (AES) analysis as shown in Figure 1b. We especially noted that the TaO x layer has a chemical composition of substoichiometric TaO 2 (Ta : O = 30 at% : 60 at%), which indicates the TaO 2 layer has oxygen vacancies with its sub-stoichiometry. The detailed chemical composition of each layer will be discussed in the XPS analysis results in Figure 2. Figure 1c show the 50-cycled DC I-V curves of our SRC. As indicated by the red curved arrows, the resistance transition from HRS to LRS (SET) was observed in the positive bias region and the inverse resistance transition (RESET) was achieved in the negative bias region. The DC I-V showed identical curves between the first voltage sweep cycle and the subsequent cycles, which means there is not the electro-forming process. The required voltages for the SET (V SET ) and RESET (V RESET ) were evaluated by 3.8 and -3.5 V, respectively, which are favorable operating voltages with low current operation. As shown in Figure S1 (Supporting Information), we also tested the active area dependent DC I-V behavior of our SRC. As the active area of our SRC decrease from 100 to 4 μm 2 , the current values of the writing, LRS, and HRS decrease, which indicates our SRC has a characteristic of interface-type RS, not the localized current paths (like CFs) in it. We noted two important characteristics of our SRC in the DC I-V characteristic. First, our SRC exhibited the self-compliance characteristic during the SET operation. That is, we did not need to apply the external current compliance to prevent the dielectric breakdown during the SET operation. This means our SRC can be switched the resistance state by only the applied voltage, which is a compatible characteristic with the electric pulse-based operation. Second, our SRC showed the selectivity of 2.3 × 10 4 between the current values of the V SET and -1/3 V SET , which indicates the sufficient selection ability (suppressing the interference current from the unselected cells in the CA) to be implemented in the largely integrated CA. Figure 1d shows the cumulative plot of each 50 reading currents of HRS and LRS evaluated at the reading voltage (V READ ) of 2.5 V. Assuming the Gaussian distribution of the reading currents, the evaluated overlap probability between the 50 reading currents of HRS and LRS was 5.4 (the overlap probability of 3.1 × 10 −6 %), which confirms the sufficiently reliable operational distribution of our SRC. The reading voltage of 2.5 V was determined by the three kinds of criteria listed below.
1) The reading voltage should not affect the previously programmed resistance state. (Just function of "reading") 2) The reading current should be high enough for detecting by oscilloscope to investigate the operation speed and resistance switching.
3) The On/Off ratio of >10 would be enough for the sensing margin of our SRC. Figure 1e shows the retention characteristic of our SRC. We initially programmed our SRC with LRS (HRS) and measured the LRS (HRS) current periodically with V READ of 2.5 V at 85°C in the atmospheric circumstance. After the measurement of 2 h, the LRS current showed a negligible change from 85.6 to 84.8 nA (degradation of 0.9%) and the HRS current also exhibited robust retention characteristic (from 2.6 to 2.6 nA, no degradation), which demonstrates the reliable retention characteristic of our SRC. The inset of Figure 1e shows the disturbance characteristic of our SRC device. We could confirm that our SRC device has a robust retention characteristic under the repetitive reading voltage stimulation up to the number of 10 9 and the reading voltage of 2.5 V do not affect the programmed LRS.
The excellent retention characteristic of our SRC is resulted from the insertion of TaO x layer. We compared the retention characteristics of the SRCs between with and without the TaO x layer To disclose the chemical characteristic of the RS layer in our SRC, the depth profiling method was adopted during the XPS analysis. b) and c) show the XPS spectra of Ta 4f and O 1s in the TaO x layer, respectively. d), e), and f) show the XPS spectra of Si 2p, Zr 3d, and O 1s in the Si:ZrO x layer, respectively. From the XPS analysis result, the biding energy shift of the TaO x and Si:ZrO x layers moves toward opposite direction, which means the existence of the non-stoichiometric layer at the interface between TaO x and Si:ZrO x layers. as shown in Figure S2 (Supporting Information). With the identical measurement conditions, the case of "without" TaO x exhibited the severely degraded retention characteristic from the initial stage. This comparative study obviously showed the TaO x layer has an important role to improve the retention characteristic of our SRC. We also noted that the reading current of the SRC without the TaO x layer showed slightly higher than that of the SRC with the TaO x layer. (85.6 and 250 nA for with and without TaO x layer, respectively) This means the TaO x layer has a certain amount of effect (not dominant) on the overall resistance of our SRC.
To figure out the microscopic role of the TaO x layer in our SRC, we performed the XPS analysis of identical materials stack with the SRC device. Figure 2a show the schematic of the sample structure for the XPS analysis. The Ru TE was excluded for the convenient sputtering process during the XPS analysis. To disclose the microscopic origin of the rectifying characteristic of our SRC, we performed the temperature dependent current conduction behavior under the various temperature conditions. Figure 3a shows the temperature dependent DC I-V characteristics from 25°C to 85°C of our SRC. As can be seen from the measurement results, as the temperature increases the operation current increases gradually, which indicates our SRC obeys the semiconductor-like current conduction (not metallic current conduction). Because the active layer (TaO x and Si:ZrO x ) thickness of our SRC is thin enough to exclude the possibility of the bulk-limited current conduction, we expected that the interface-limited current conduction, such as Schottky-type current conduction (thermionic emission), play a dominant role for the rectifying behavior. [22,23] In addition, the asymmetric TE and BE enforces our expectation for current conduction mechanism as shown in Figure 3b.
From the DC I-V results in Figure 3a, we extracted the current and corresponding voltage values, and replotted them in the V 1/2 versus Ln (I) domain. Figures 3c, e, g, and i show the Schottky fitting results of four cases of HRS and LRS in the positive bias region, HRS and LRS in the negative bias region, respectively. In all cases, the linearly well-fitted curves were obtained with the temperature variation, which means the Schottky-type conduction of our SRC. To extract the electronic energy barrier in each case, we utilized the Arrhenius plot and evaluated the electronic energy barrier of 0.28 and 0.25 eV for HRS and LRS in the positive bias region as shown in Figures 3d and f, respec-tively. Those of HRS and LRS in the negative bias region were 0.35 and 0.32 eV as shown in Figures 3h,j, respectively. We noted two things. First, the electronic energy barriers in the negative bias region are higher than those of the positive bias region regardless of the resistance state of the SRC. Second, the electronic energy barrier of HRS is higher than that of LRS in both bias regions. This means the charged mobile ion is responsible for our SRC and rectification characteristic.
The synapse of human brain is responsible for the connection between neurons as shown in inset of Figure 4a. To enhance the abilities of the learning and inference, it is preferred that the synaptic device has a large range and linear behavior in its conductance update with external electric stimuli. However, because the interface-type RS has typically a restricted resistance ratio between LRS and HRS, it is difficult to increase the synaptic conductance range significantly. Therefore, we compared the effect of conductance range and linearity of our SRC on the ability of inference using the simulation of hand-written number from the Modified National Institute of Standards and Technology database (MNIST).
First, as shown in Figure 4a, we varied the G max from 2.7 to 7.0 nS with the identical G min of 0.6 nS. To exclude the effect of conductance linearity on the inference ability, we tried to maintain the linearity factors for the potentiation (the conductance The inset of a) shows the schematic of unit neuron and synapse in the brain. b) The inference simulation results according to the different synaptic conductance ranges of (a). It is noted that the inference ability based on the different synaptic conductance range do not show the significant differences. The inset of (b) is the schematic of structural concept of our inference simulation. increase, P) and depression (the conductance decrease, D) in each test. Qualitatively, the linearity factors of the P and D in each case were evaluated by 1.1 / 1.6, 1.1 / 1.6, 0.9 / 1.6, and 0.9 / 1.7 as an ascent sequence of G max . We extracted the linearity factor from the relationship of Linearity factor = the numerically fitted average slope of conductance update the ideal value of average conductance update (1) This relationship implies how the measurement behavior of conductance update deviates from that of the ideal (linear slope) value. As the value of the relationship close to 1, we can estimate the fine linear conductance update of the given synaptic performance.
Based on each conductance range variation condition, we performed the inference simulation by an extrapolating the conductance entry of single device itself to a device array of conductance matrix (784-300-10 multilayer perceptron on the MNIST dataset as shown in inset of Figure 4b). The simulation results yielded the inference accuracy of 89.53%, 89.57%, 89.38%, and 89.26% for each conductance range variation condition as shown in Figure 4b. Although the conductance range varies more than three times (from 2.1 nS (2.6 -0.6 nS) to 6.4 nS (7.0 -0.6 nS)), the observed inference accuracy showed the negligible differences between the given conditions. Second, we tried to apply the different conductance linearity on the inference simulation. As shown in Figure 5a, we applied the distinctive electric pulse trains by methods of CSPP and ISPP (the left and right insets of Figure 5a for CSPP and ISPP, respectively) to achieve a different conductance linearity, and acquired the conductance update characteristics with each method. Qualitatively, the linearity factors of P and D for the cases of CSPP and ISPP were evaluated by 0.7 / 1.9 and 1.0 / 1.4, respectively. To exclude the effect of conductance range variation on the infer-ence simulation, we identically set the conductance update range of 2.7 nS in both cases. We performed the inference simulations under each synaptic device condition and obtained the inference accuracy values of 89.21% and 93.01% for the method of CSPP and ISPP, respectively, as shown in Figure 5b. Unlike the case of Figure 4, the significant difference in the inference accuracy dependent on the conductance linearity was revealed.
To confirm the synaptic performance reproducibility of our SRC, we examined the repetitive P and D based on the ISPP method. As shown in Figure 5c, our SRC exhibited almost invariant P and D characteristics (as can be seen in inset of Figure 5c) up to electric pulses of 10 5 .

Discussion
To expand our experimental scope to the CA, we fabricated the CA with the integration density of 16 × 16 as shown in Figure  6a. First, we tested the device yield of the 16 × 16 CA by the individual unit cell programming. We intended to program the resistance state distribution of "SYU" in the 16 × 16 CA as shown in Figure 6b. During the HRS or LRS programming of each unit cell, we applied the one-third bias scheme (the biasing method of full programming voltage (V pgm ) on the selected cell and -1/3V pgm (or 1/3V pgm ) on the unselected cells in the CA. The detailed method can be found elsewhere.) to exclude the interference effect of unselected cells in the CA. [25] The finally identified resistance state distribution in the 16 × 16 CA showed the perfect device yield in the 16 × 16 CA as shown in the Figure 6b.
Second, we tested the MAC operation in the 16 × 16 CA with the two types of conductance precision of 16-states (4-bit) and analogue-like of 50-states. Figure 6a shows the distribution of the conductance precision of 16-states in the 16 × 16 CA. We programmed the conductance states of individual cells sequentially and verified the conductance state of each cell with V READ of 2.5 V to confirm the randomly distributed conductance state in the 16 × 16 CA. Then, we performed the MAC operation  with the conductance state programmed 16 × 16 CA. Figure 6d displays the result of MAC operation. We plotted together the results of measurement and calculation to confirm the accurate MAC operation. To obtain the MAC operation result in the unit of column, we applied the V READ of 2.5 V to the 16 rows (TEs) simultaneously and acquired the final current values of each column. The generated current from the individual cells (V READ × conductance of each cell) are summed along the column line and we plotted the summed current values of each column as blue histogram in Figure 6d. In addition, we calculated the theoretical values of current summation of each column and plotted together as a red line in Figure 6d. We noted that the current values from measurement and calculation were wellmatched with each other. This means the interference effect was effectively excluded during the MAC operation with the selection characteristic (rectifying characteristic) of our SRC.
To investigate the case of a higher conductance precision, we also tested the MAC operation with 50 conductance states of our SRC. The experimental method is identical with that of the Figures 6c and d. As shown in Figure 6e and f, we confirmed that the MAC operation with the analogue-like conductance precision exhibited fine operation excluding the interference effect.

Conclusion
In this study, we developed the SRC device and tested the reliable performance as an artificial synaptic device. We analysed the microscopic origin of electrical rectifying functionality and robust retention characteristic by XPS analysis and temperature dependent I-V characteristics. Based on the reliable performance of our SRC, we investigated the artificial synaptic performance in terms of conductance range variation and linearity of conductance update. Importantly, we found that the linearity of conductance update showed more dominant effect on the inference ability than that of conductance update. This result can be a meaningful in viewpoint of the usage of interface-type RS as synaptic device in the novel computing system because the interface-type RS generally exhibited low resistance ratio between LRS and HRS despite its excellent operational distribution. The MAC operation results in the 16 × 16 CA evidences the interface-type RS-based SRC can be a good candidate for the future novel computing system. We hope our results of this study can make the researchers revisit the interface-type RS-based SRC as a next-generation artificial synaptic device.

Experimental Section
Device Fabrication: To form the bottom electrode, a 200 nm thick TiN layer was sputtered onto an SiO2/Si substrate. Following the TiN deposition, photolithography and dry etching process were adopted to pattern the crossbar-type TiN BE. During the dry etching process, inductively coupled plasma reactive ion etching (ICP-RIE) was used. An ICP power of 200 W and substrate bias power of 20 W were induced. 5 standards cubic centimeters per minute (sccm) of Ar and 30 sccm of Cl 2 were supplied as the etching gas. The process temperature and pressure were maintained at 25°C and 5 mTorr, respectively. The etch rate was ≈40 nm min −1 . After the dry etching process, the residual photo-resist was eliminated by a conventional lift-off process using acetone, isopropyl alcohol, and deionized water, sequentially. Drying the humidity of the fabricated TiN BE substrate, the 5 nm thick Si: ZrO 2 active layer was deposited using a radio-frequency (RF) reactive sputtering system. The Si and Zr target were utilized for forming an active layer and co-sputtered. During the sputtering, the Ar, O 2 , RF power and the working pressure were maintained at 12, 6 sccm, 100 W, and 3 mTorr, respectively. Subsequently, the 15 nm thick TaOx layer was deposited using RF reactive sputter. During the deposition of TaO x layer, Ar, O 2 , RF power, and working pressure were maintained at 20, 6 sccm, 80 W, and 3 mTorr, respectively. The photolithography and conventional lift-off process were adopted for forming crossbar-type top electrode, sequentially. After the patterning, the 40 nm thick Ru was deposited using DC magnetron sputtering. The single and CA devices were fabricated by identical manner.
Structural Analyses of the SRC: The cross-sectional structure of the proposed SRC was observed using high-resolution transmission electron microscopy (HR-TEM, Tecnai G2 F30 S-TWIN, FEI). The sample for the HR-TEM analysis was prepared using a focused ion beam (FIB, Helios NanoLab by FEI). Auger Electron Spectroscopy (AES, ULVAC-PHI 700, coaxial full CMA type analyser) analysis was performed to obtain the depth profile of the materials in the proposed SRC using the following parameters: 10 kV 10 nA −1 of electron beam energy, and a sputtering rate of 1.2 Å s −1 . Additionally, an XPS (Thermo Fisher Scientific Inc.) analysis was performed to ascertain the chemical binding status of the thin film layers of the proposed SRC device. An Al K source with a spot size and an energy step size of 400 μm and 0.1 eV, respectively, was used. The sample for the XPS analysis was prepared using blanket-type thin films on a TiN substrate.
Electrical Measurement of Single SRC Device: To obtain the electrical characteristics of the proposed SRC device, the measurement was executed using an 4200A-SCS semiconductor parameter analyzer (SPA). During the characterization, Ru TE was biased, and TiN BE was grounded. During AC-based pulse operation, an arbitrary function generator (AFG, Agilent 81110A) and RF electric-circuit switch box were used. The electrical pulses were generated by AFG and the conductance states were verified by SPA. The most of electrical measurements were executed at room temperature (25°C) but the retention measurement was conducted at 85°C. The hot stage using a temperature controller was used to control the measurement temperature. During the synaptic operation, two methods were adopted. First, the incremental step pulse programming (ISPP) method which was the incrementally increasing electrical pulses were applied to the device. Second, the constant step pulse programming (CSPP) method which was the constant amplitude of pulse was applied to the device. The detailed explanations of ISPP and CSPP were included in ref. [24,26]. Using the two methods, the SRC was potentiated or depressed for mimicking the neuronal synaptic operation of the human brain. After applying the electrical pulse, verifying step was followed to obtain the conductance states of the device using SPA. All electrical measurements were performed using a LabViEW TM -based control program.
Evaluation of Inference Accuracy: The ANN structure of a general perceptron was composed of two-layers -hidden and output layers, and it consists of synapses (weights) connecting all neurons. With this ANN structure, an MNIST dataset was used to learn handwritten digit classification. In the MNIST dataset, the handwritten digit image was presented as a 28 × 28 pixel array on a grayscale. In the ANN learning process, the LTP and LTD characteristics of the SRC were used as synapse for handwriting recognition. Subsequently, classification accuracy was evaluated with the test dataset at each iteration. The accuracy appears to be saturated to ≈93% in the ISPP method, which confirms that the SRC was successfully operated as a synaptic device representing the synaptic weights required for neural networks.
Electrical Measurement of CA Device: During the electrical measurement of the CA, the matrix switching zig and probe card in the 16 × 16 CA were utilized, additionally. During the measurement of the CA device, each unit cell was accessed individually and the biasing scheme was applied for suppressing the interference effects. During the learning sequence, each cell was programmed to a specific conductance state by applying a specific programming pulse. After programming, the conductance states were verified by SPA. In the inference step, a read pulse of 2.5 V was applied to every row line, and the output current was detected through the column line. During the inference, each column line was grounded sequentially and the unselected column lines were pulled up by applying the pulse according to the biasing scheme. The detailed explanation was mentioned in the "Discussion" section.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.