Potential of Transition Metal Dichalcogenide Transistors for Flexible Electronics Applications

Semiconducting transition metal dichalcogenides (TMDC) are 2D materials, combining good charge carrier mobility, ultimate dimension down‐scalability, and low‐temperature integration. These properties make TMDCs interesting for flexible electronics, where the thermal fabrication budget is strongly substrate limited. In this perspective, an overview of the state of TMDC research is provided by evaluating two scenarios, both with their own merit depending on the target application. First, high‐quality chemically grown 2D TMDCs are promising for nanoscale high‐performance and high‐frequency devices with excellent gate control and high current on/off ratios. Second, TMDC thin films can also be solution deposited from chemically exfoliated flakes allowing for moderate performance, but providing a path toward low‐cost production. A strong advantage of TMDCs is the possibility to realize p‐type and n‐type channels for complementary transistors having similar performance figures‐of‐merit. This aspect, as well as common transistor performance metrics are also compared with other flexible channel materials providing an overview of the state of the art of thin‐film transistors in the field of flexible electronics.


DOI: 10.1002/aelm.202300181
often polymer foils, such as polyethylene-2,6-naphthalate (PEN), polyimide (PI), polyethylene terephthalate (PET), or polydimethyl siloxane (PDMS). In the final application, the mechanical flexibility is then required either, because the devices are frequently bent during operation (e.g., in the case of smart plasters), [6] bent once during installation (e.g., non-planar displays) [4] or to enable a high-throughput and low-cost fabrication process (e.g., roll-to-roll production of e-paper). [7] While there are distinct differences in the technological requirements in these application scenarios, there are several common aspects, which need to be considered. The whole device fabrication needs to be based on thinfilm fabrication processes. In addition, the thermal budget of the processing needs to stay within the limits given by the substrate, which is typically in the range of 100-300°C, depending on the specific substrate material. This defines the boundaries of the processing conditions for the materials used to build flexible devices. Especially the semiconducting channel material in transistors is affected by this constraint, resulting in lower charge carrier mobility and overall performance compared to rigid single crystalline silicon, which is today's standard semiconductor material. In addition, each application has individual specific aspects to be considered. For example, applications, such as smart patches in medical applications require a high level of mechanical flexibility and stability under continuous mechanical stress, while the device lifetime can be rather short, and the maximum operation temperature is not much >40°C. In contrast, applications in displays as they are used in consumer electronics or automotive applications require long lifetimes, often more than 10 years, tolerance to higher temperatures, and large area production processes.
The key figures-of-merit for field-effect transistors (FETs) based on thin-film semiconductors are essentially the same as for those based on bulk semiconductors: the charge carrier mobility (μ), threshold voltage (V T ), on-current (I On ), on/off current ratio (I On /I Off ), as well as the subthreshold swing (SS) are the key parameters to look at, when assessing single transistor performance. [8]   The key figures-of-merit, such as threshold voltage V T , subthreshold swing SS, and I On /I Off current ratio are marked. b) Output characteristic of this MoS 2 -based NMOS-FET. [9] On the upper left corner a schematic of a field effect transistor using back-gate geometry is displayed, as it is often used for TMDC based FETs. S is the source electrode, D is the drain electrode, G is the gate electrode, and CH refers to the TMDC based channel, e.g. WSe 2 or here MoS 2 . PI is polyimide foil as an example for a flexible substrate.
parameters that become more relevant on a circuit level: Hysteresis under operation and bias-induced device instability, deviceto-device performance variations, and if both n-type and p-type FETs, also called NMOS and PMOS FETs, are available for complementary metal-oxide-semiconductor (CMOS) circuits.
Semiconducting TMDCs have emerged as a promising option for flexible thin-film-transistors, because they offer relatively high charge carrier mobility in the range of 1 to 150 cm 2 V −1 s −1 , depending on the specific material and production process. Furthermore, due to their thin body thickness, they offer good electrostatic control and they can sustain low bending radii and high strain values. [10] First experiments on TDMC transistors have been performed using micromechanically exfoliated MoS 2 flakes, also known as "Scotch-tape production", with a monolayer thickness of 0.6 nm as a semiconducting channel material in n-type FETs. The charge carrier mobility in these devices was in the range of 10s of cm 2 V −1 s −1 , the on/off current ratio was 10 8 and the subthreshold swing was 74 mV dec −1 , which are overall very good values for a thin-film transistor. [11] The extrinsic mobility (Table 1) extracted from transistors was then continuously increased in MoS 2 by optimizing especially the electrical contacts and dielectric environment. Using graphene contacts and hexagonal boron nitride (hBN) encapsulation, a mobility of 150 cm 2 V −1 s −1 has been measured in long channel MoS 2 FETs. [12] Also, the scaling to lateral nanometer dimensions of MoS 2 FETs is excellent: transistors down to 0.34 nm gate length do not show pronounced short channel effects, [13] and a current density of ≈1000 μA μm −1 at 1.5 V supply voltage has been achieved in MoS 2 FETs with 35 nm channel length, [14] which are two remarkable results demonstrating the potential of TMDCs in ultra-scaled logic. [13,14] Figure 2a gives a graphical overview of the advantages of TMDCs for applications as transistor channel in flexible electronics. Besides MoS 2 there are other TMDCs, including WS 2 , MoSe 2 , WSe 2 , or PtSe 2 , which can enable n-and p-type FET operation with similar or even higher performance. [15,16] The calculated band edge energies of these materials (monolayer form) and the band gap size are summarized in Figure 2c. [17] The values in the figures were calculated according to the G 0 W 0 method. [17] It is noted, that slightly different values for the band gap size and band edge energies are reported in literature, depending on the measurement or simulation method used. For instance, in the case of monolayer MoS 2 , experimental photoluminescence measurements have indicated a bandgap size of ≈1.9 eV, while values extracted from scanning electrical microscope measurements are estimated to be in the range of ≈2.5 eV. Depending on the calculation method employed, theoretical values for the band gap size, ranging from 1.68 to 2.48 eV. [18] In addition to micromechanical exfoliation, the production of TMDC layers by means of (metalorganic)-chemical-vapordeposition ((MO)-CVD) and chemical exfoliation have been produced, which both allow large area and large volume production. [19][20][21] While chemically exfoliated flakes still do not provide the same material quality compared to micromechanical exfoliated flakes, (MO)-CVD methods are already close to this benchmark. [22] In general, (MO)-CVD grown TMDC films have better performance and better thickness control compared to chemically exfoliated material. For instance, a mobility up to ≈60 cm 2 V −1 s −1 has been reported in monolayer MoS 2 and up to 100 cm 2 V −1 s −1 in single crystal WSe 2 grown by CVD. [22,23] However, the growth by means of (MO)-CVD requires more efforts especially in terms of equipment, but also leads to higher energy consumption compared to chemical exfoliation. A typical process flow includes the (MO)-CVD growth at a relatively high temperature (700°C) under vacuum conditions on a dedicated growth substrate, such as sapphire. [24] Processes at lower temperatures are currently under development, [25] e.g., for direct deposition on foil substrate at 250°C. [26,27] After growth, the TMDC film can be transferred to the target foil substrate using delamination and lamination processes. The transfer process has the advantage of decoupling the relatively high-temperature growth process from the target substrate. Nonetheless, it comes at the cost of additional processing efforts, which can also lead to contamination of the material by handling polymers and other processing chemicals. [28] Recent direct transfer methods avoiding chemicals (aside from deionized water) and sacrificial polymers have shown promise for improved transfer and device fabrication on flexible substrates. [28,29] Chemical exfoliation of bulk TMDCs can be scaled to ton-scales and the resulting flakes are usually dispersed in a solution, such as a solvent or an ink, which then can be printed or spin-coated on the foil. [30,31] While this is a very attractive production process, the performance of the resulting films typically lacks behind those produced www.advancedsciencenews.com www.advelectronicmat.de Table 1. Detailed description of the key figures-of-merit for thin-film-transistors. More details can be found in ref. [8].

Figure of merit Description
Charge carrier mobility μ The charge carrier mobility describes how quickly electrons or holes can move through a material. It is defined as the average drift velocity of the charge carriers v drift divided by the applied electric field E: The carrier mobility can be extracted by measuring the transconductance g m of a field effect transistor in the linear regime (i.e., at small V DS ) using the equation: = g m L C OX V DS W with C OX being the dielectric oxide capacitance per area, W and L being the channel width and length, and V DS the applied drain-source voltage. The mobility value extracted by this method is often lower compared to the real charge carrier mobility, because of parasitic effects, such as contact resistances between the metal and the semiconductor or additional access resistances. Hence, the mobility extracted using the transconductance of a FET is often called extrinsic mobility. The intrinsic mobility can be derived by other methods like the transfer length method (TLM) or 4-probe conductance measurements to derive the conductance in combination with Hall measurements to derive the charge carrier concentration n. Then μ = en .
The transconductance of a FET describes how the drain current I D changes with the gate to source voltage V GS and is defined as: . This parameter depends on the charge carrier mobility, the gate oxide and the channel dimensions W and L.
The threshold voltage is the voltage at which the transistor turns on. This parameter depends essentially on the doping level in the channel and on the metal gate work function, and it is an important parameter at a circuit level in order to be able to combine several FETs in a circuit.
The subthreshold swing SS describes how steep the drain current rises in the subthreshold regime. It is extracted from a plot where the logarithm of the drain current is plotted against V GS and has the unit mV/decade, meaning how much mV change in V GS are needed to change the drain current by a factor of 10. The lower this value the better. At room temperature the theoretical lower limit defined by the Fermi distribution function is 60 mV decade −1 for any conventional FET.
On/Off current ratio I On /I Off The On/Off ratio is the ratio between the drain current in the on and off state of a FET. I On /I Off describes how much a transistor can be turned off. Good values for a field effect transistor are 10 8 or larger. The On/Off ratio depends on the band gap of the semiconductor with higher band gap giving higher On/Off ratio, as well as on the number of trap states in band gap with lower trap states leading to higher On/Off ratio.
The charge carrier mobility describes how quickly electrons or holes can move through a material. It is defined as the average drift velocity of the charge carriers v drift divided by the applied electric field E: The carrier mobility can be extracted by measuring the transconductance g m of a field effect transistor in the linear regime (i.e., at small V DS ) using the equation: = g m L C OX V DS W with C OX being the dielectric oxide capacitance per area, W and L being the channel width and length, and V DS the applied drain-source voltage. The mobility value extracted by this method is often lower compared to the real charge carrier mobility, because of parasitic effects, such as contact resistances between the metal and the semiconductor or additional access resistances. Hence, the mobility extracted using the transconductance of a FET is often called extrinsic mobility. The intrinsic mobility can be derived by other methods like the transfer length method (TLM) or 4-probe conductance measurements to derive the conductance in combination with Hall measurements to derive the charge carrier concentration n. Then μ = /(en). by MO-CVD or similar methods. The main reasons for this difference are the poor electrical connections between different flakes and structural defects inside the flakes.
Based on the very good single device performance and low device-to-device variation several integrated circuits based on TMDCs have been presented up to date, including standard circuits, such as inverters, ring oscillators, or simple logic gates. [32][33][34] A remarkable result was the demonstration of an integrated microprocessor consisting of 115 MoS 2 based NMOS FETs. [35] Also, analog circuits, such as operational amplifiers or power detectors have been demonstrated using MoS 2 -based NMOS FETs. [36,37] CMOS circuits often outperform NMOS and PMOS circuits significantly, especially in terms of power consumption. For that there are essentially two possibilities: combining two different TMDCs on one foil, such as MoS 2 for NMOS and WSe 2 for PMOS FETs, [33] or using one TMDC, which can operate both as NMOS and as PMOS as demonstrated using two different contact metals with appropriate work functions. [38] Many of the results reported so far, including most of the above-mentioned ones have been obtained on rigid substrates, such as silicon and not on a flexible foil. However, it has been shown in several studies that similar or identical perfor-mance of TMDC-based transistors can be realized on flexible substrates. [39,40] Two remarkable recent results include the realization of complex NMOS circuits with high performance on foil and the realization of high-performance MoS 2 and WSe 2 transistors on foil. [29,41] The TMDC layers can also easily tolerate the bending of the devices even to small radii in the mm range. [42][43][44] The limiting factor for the devices with respect to the bending is typically the other layers involved in the stack, such as conventional dielectrics and metals. [19] Figure 3 illustrates two specific examples for circuits fabricated on flexible foil using TMDC based transistors. Figure 3a-c shows the application of MoS 2 based NMOS FETs as a differential amplifier cointegrated with an MoS 2 based photodetector, including the circuit diagram, an optical image of the circuit and the output voltages under periodic illumination. Essentially all low-temperature processed thin-film semiconductors are potential candidates for flexible electronic systems, having all their specific benefits and drawbacks and to some extent, they have already been used in first products  [17] and demonstrators. [45,46] This includes amorphous and lowtemperature poly-silicon (LTPS), metal-oxide based semiconductors, such as indium gallium zinc oxide (IGZO), organic semiconductors, and carbon nanotubes (CNTs).
Amorphous silicon layers have been the first thin-film transistor (TFT) material to be used and they are typically produced by plasma-enhanced CVD at temperatures up to ≈300°C. [47] The production process is well established and the films offer a charge carrier mobility of ≈1 cm 2 V −1 s −1 for electrons and lower values for holes. [47] A key limitation of this material is the low bias stability, resulting from many electronic trap states. [48] Compared to amorphous silicon, polycrystalline silicon has a much high charge carrier mobility up to 100 cm 2 V −1 s −1 and also fewer trap states, leading to higher stability under operation. [47,49] This improvement comes at the cost of a more complex production flow and often also higher deposition temperature. As a consequence, many of the flexible devices reported so far have been obtained on metal-based foils, such as steel, which tolerates the higher production temperature. Another limitation of polycrystalline silicon is its relatively low mechanical flexibility, especially if compared to other potential TFT materials like organic semiconductors.
Metal-oxide-based semiconductors, such as IGZO are nowadays widely used as TFT material in organic light-emitting deiode (OLED) displays. These materials offer a high carrier mobility up to ≈100 cm 2 V −1 s −1 and a low-temperature deposition process based on sputtering or atomic layer deposition. [50,51] Their flexibility is very good and sufficient for most applications. [52] A major limitation on the circuit level for these materials is that only NMOS FETs show good performance, while good PMOS transistors based on metal-oxide semiconductors are missing. [53] Solution processing of metal-oxide-based semiconductors is an attractive alternative fabrication method, which offers cost ef-ficient and large scale fabrication. [54,55] Compared to metal-oxidebased semiconductors deposited by sputtering, corresponding solution processed metal-oxides have a lower charge carrier mobilities (up to 10-60 cm 2 V −1 s −1 for n-type material and ≈1 cm 2 V −1 s −1 for p-type material). In addition, solution processing of metal-oxide-based semiconductors require relatively high annealing processes at temperatures in the range of 150-400°C to remove solvents through evaporation and decomposition, which can limit their applications on polymer and paperbased foils. [54,56] Organic semiconductors have been considered excellent materials for flexible electronic applications for ≈20 years. They show very good flexibility, are processed at low temperatures, e.g. by direct printing, and can be produced at a very large scale.
Their key limitation is the low carrier mobility on the order of ≈1 cm 2 V −1 s −1 . [57] Also, CMOS operation is not straightforward as the highest mobility organic semiconductors are p-type semiconductors [4] and n-type organic semiconductors tend to be less stable than p-type organic semiconductors. [58] CNT based transistors emerged in the late 1990s and they are now also considered as a promising material for flexible TFTs because they can be printed from solution. They typically have higher mobility compared to organic semiconductors and also have excellent flexibility. [53] Due to their narrow bandgap both NMOS and PMOS operation can be obtained in CNTs using contact metals with different work functions and adsorbate doping for the NMOS part. CMOS circuits, including inverter and ring oscillator have been demonstrated. [59] Limiting factors are relatively low switching ratios, limited CMOS operation, and difficulties with their reproducibility. [53] Table 2 provides a comparison of different materials, although it is challenging to directly compare their performance in FETs as factors, such as geometry and dielectric properties have a  [36] Copyright 2020, The authors, published by Springer Nature. a) Schematic of a opto-electronic analog integrated circuit based on MoS 2 on a polyimide (Kapton) foil. The circuit includes a photodetector and a differential amplifier. b) Optical image of the circuit. c) Time traces of differential output V OUT (blue) and non-inverting/inverting outputs V + /V − (black/red) under local illumination of the photodetector with visible light. Example 2, reproduced according to the terms of the CC-BY license. [33] Copyright 2016, The authors, published by Wiley VCH. d) CMOS inverter circuit schematics. e) Transfer characteristics of the monolayer WSe 2 (gray) and monolayer (MoS 2 ). f) Voltage transfer characteristic of a flexible WSe 2 -MoS 2 CMOS inverter at a supply voltage of 2.0 V. significant impact on the key figures-of-merit. Nevertheless, we have summarized the typical behavior of each material to help provide insight into their relative strengths and weaknesses.
As for now, there is really no technology available, which provides sufficiently low processing temperatures and both highperformance NMOS and PMOS FETs. In order to overcome this bottleneck hybrid solutions have been explored where different TFT materials have been combined to achieve CMOS operation, e.g., CNTs and metal oxides, or metal oxides and tellurides. [60][61][62] When looking at the established thin-film semiconductors it becomes clear that the success of TMDCs for flexible electronics applications is not straightforward, but one needs to look first at the specific applications to figure out the respective poten-tial for TMDCs. This discussion needs to be done separately for (MO)-CVD grown and chemically exfoliated layers. (MO)-CVDgrown TMDC layers have the key advantage of offering highperformance NMOS and PMOS FETs using a low temperature (<120°C) fabrication process because the material growth can be completely decoupled from the target substrate due to the transfer process. However, in order to achieve high-quality TMDC films the growth by (MO)-CVD is often performed on wafers, such as sapphire, which results in higher production costs compared to other TFT materials and also smaller substrate size. Alternative substrates, such as amorphous SiO 2 are currently explored for the TMDC growth and at least for MoS 2 the material quality is already similar compared to the growth on sapphire. [63]  Nevertheless, square meters of high-quality (MO)-CVD TMDC films have so far not been demonstrated. This means that the most promising applications for (MO)-CVD grown TMDCs are currently those that require high performance, can tolerate higher production costs, and are limited to typical semiconductor wafer sizes. Possible application scenarios with these requirements are therefore medical patches, such as smart plasters or smart contact lenses, wearables and similar sensor systems for consumer electronics, thin-film camera systems, including THz-imagers or laminated RFID patches. Applications like displays are currently out of reach for TMDC layers, as competing technologies, such as metal oxide semiconductors or organic semiconductors are already well developed, and the display size is typically much larger than the size of current MO-CVD-grown films. However, this application could become relevant if the deposition process for TMDCs becomes compatible with square-meter large production.
Chemically exfoliated TMDC layers, in contrast, can be potentially produced in very large quantity, enabling low-cost device fabrication on very large areas, e.g., by direct printing processes, and at low processing temperatures. This would make these materials ideal for large volume applications, such as displays, epaper, smart textiles, or smart packaging. The mobility of such layers has recently been increased to values ≈10 cm 2 V −1 s −1 using a moderate annealing temperature of 200°C, [64] a mobility which is higher compared to most organic semiconductors, but lower compared to metal oxides or polycrystalline silicon. However, it shall be noted that the switching performance in terms of subthreshold swing and I On /I Off ratio of these devices does not yet match that of other TFT materials, including organic semiconductors and solution processed metal oxide semiconductors. It is therefore rather early to judge for which applications chemically exfoliated TMDC layers could become relevant. One possible application scenario could be the combination of p-type organic semiconductors with n-type chemically exfoliated TMDC layers, which would enable relatively good-performing CMOS circuits using a very low-cost printing process. Such a combination has the potential to offer very low production costs and highperformance CMOS circuits. Figure 4 provides a graphical overview on the application potential for the fields discussed above with respect to the potential synthesis method. The more to the left side, the more likely Applications, which are more likely to be addressed by (MO)-CVD grown TMDC are more toward the right side, and those expected to be addressed by chemical exfoliated materials are toward the left side. The vertical arrangement (y-axis) represents the expected potential of TMDC based transistors for the specific application in perspective of currently available alternatives based on other thin-film-transistor materials. A high potential is illustrated by a high placing on the y-axis.
chemical exfoliated flakes will be used, while the more to the right side (MO)-CVD grown films will be used. Applications, where TMDC based transistors have a high potential with respect to other thin-film-transistor materials are placed on the vertical axis toward the top, while those applications, where competing technologies, such as metal-oxides or organic semiconductors have a higher application potential are displayed at the bottom.
While the performance data reported for single devices and also for initial circuits made from semiconducting TMDCs is outstanding for a TFT material, neither their fabrication process is production-ready nor are the devices application-ready. The growth process is an essential step and TMDC layers grown by (MO)-CVD are approaching and even matching the quality of micromechanically exfoliated flakes in terms of mobility.
However, the growth processes of such high-quality layers are still on the lab scale, requiring efforts for upscaling and increasing reproducibility and process stability. The next important step in the production flow is the transfer, which is still based on manual handling of the films, although wafer-scale semiautomated processes are emerging. [65,66] Alternatively, direct growth on foilbased substrates is possible, but the lower growth temperatures come at the expense of reduced device performance. [26] As transfer processes of 2D layers are an unconventional step in semiconductor processing, there are currently no commercial tools available for this. Hence, the development of such tools will play an essential role for the success of TMDC materials. Once tools are available this will not only increase the production volume, but also reduce device-to-device and batch-to-batch variations. For the fabrication of ohmic contacts to TMDCs and also for pattering TMDCs there are different processes available using established semiconductor process steps, which deliver sufficient performance parameters for flexible electronics. [41] Of course, research in this area is still required to adopt these processes for specific applications, but contacting and pattering of TMDCs is already quite well established and will not represent a showstopper. The situation is similar for encapsulating the TMDC layers. This is an important step for any 2D material because they are very sensitive to their surface surroundings. Here the field benefits from the experience made with graphene and there are suitable processes available to perform stable encapsulation of TMDCs. [9] However, these processes may not yet be compatible with industrial production flows and therefore further research is needed. In integrated circuits, it is essential that the threshold voltages of transistors can be defined to suitable values. In conventional silicon CMOS technology, this is done by doping of the silicon and tuning the work function of the metallic gate. The classical doping technique of replacing crystal lattice atoms is not readily available for TMDCs without detrimental effects on current transport. Instead, charge transfer or adsorbate doping of TMDCs has been demonstrated successfully, although this kind of doping typically has limitations when it comes to thermal stability, because the bonding between adsorbates and the TMDCs is weak. [67,68] In this respect little work has been performed so far, but this will be essential to capitalize on the excellent performance of TMDC-based transistors also on a circuit level.
TMDC have emerged 13 years ago as a promising option for realizing mechanically flexible thin-film-transistors. Their performance is outstanding, matching or already outperforming established TFT materials. However, their success in applications not only depends on their high performance but, as with all new materials, also on whether they can provide additional functionalities or cost advantages in the production process. The possibility to realize CMOS circuits with very high performance is a clear asset for TMDCs, which would be relevant for applications in health care, such as smart plasters or contact lenses, where complex circuits are required in order to deliver the required performance. Another application scenario is toward large area production, as it is needed for electronic papers. For such applications, the possibility to deposit TMDCs by printing from solution could be a unique selling point, if the performance is significantly higher compared to organic semiconductors or CNTs. As there is not yet a clear application area defined for TMDC TFTs, the research in the coming 3-8 years will be decisive for the success of this new material class.