Reconfigurable Physically Unclonable Functions Based on Nanoscale Voltage‐Controlled Magnetic Tunnel Junctions

With the fast growth of the number of electronic devices on the internet of things (IoT), hardware‐based security primitives such as physically unclonable functions (PUFs) have emerged to overcome the shortcomings of conventional software‐based cryptographic technology. Existing PUFs exploit manufacturing process variations in a semiconductor foundry technology. This results in a static challenge–response behavior, which can present a long‐term security risk. This study shows a reconfigurable PUF based on nanoscale magnetic tunnel junction (MTJ) arrays that uses stochastic dynamics induced by voltage‐controlled magnetic anisotropy (VCMA) for true random bit generation. A total of 100 PUF instances are implemented using 10 ns voltage pulses on a single chip with a 10 × 10 MTJ array. The unipolar nature of the VCMA mechanism is exploited to stabilize the MTJ state and eliminate bit errors during readout. All PUF instances show entropy close to one, inter‐Hamming distance close to 50%, and no bit errors in 104 repeated readout measurements.


DOI: 10.1002/aelm.202300195
presents unprecedented security challenges in terms of device-level authentication and manufacturing supply chains. Both of these challenges are amplified by the increasing need to use potentially untrusted foundries for chip manufacturing due to cost and product timeline requirements. Simultaneously, the transformative advances in classical, unconventional, and quantum computing [2][3][4] are expected to make conventional software-based encryption methods increasingly vulnerable to attack. As a result, cryptographic technology based on hardware-level security primitives is emerging as an appealing option, [5,6] with a key example being physically unclonable functions (PUFs). [7,8] A PUF is an "electronic fingerprint" that provides certain outputs (known as responses) with respect to certain inputs (known as challenges), where the challenge-response pairs (CRPs) are unpredictable and unique to each particular device.
Existing PUF designs generally exploit the manufacturing process variations in a conventional complementary metaloxide semiconductor (CMOS) fabrication process. Examples are the static random-access memory (SRAM) PUF, [9] arbiter PUF (APUF), [10] and ring oscillator PUF (ROPUF), [11] all of which, however, still have significant limitations: First, since they are based on manufacturing process variations, they cannot be reconfigured once fabricated by the foundry, adding a security risk for long-term use. Second, the PUF response is often susceptible to environmental noise, especially when the process variations are small. Therefore, to ensure reliability, the raw responses cannot be directly employed before going through a so-called fuzzy extractor, [12,13] whose overhead can be larger than the PUF itself. [14][15][16] Third, risk from attacks still remains a problem, examples being photo-emission attacks for SRAM PUFs and APUFs, [17][18][19] and modeling attacks for APUFs and ROPUFs. [20][21][22] Given these limitations, PUFs based on new physical concepts are urgently needed.
Here, we experimentally demonstrate a reconfigurable PUF based on nanoscale voltage-controlled perpendicular magnetic tunnel junctions (VC-MTJs) with more than 100% tunneling magnetoresistance ratio. By using VCMA-induced precessional dynamics, this PUF allows for ultrafast post-manufacturing regeneration of the electronic fingerprint without changing the PUF hardware, thus minimizing the risk of long-term CRP detection. At the same time, we show that the response can be directly read from the state of the MTJs, with a bit error that is suppressed by VCMA using an opposite voltage polarity, making the PUF less susceptible to environmental noise and reducing the need for on-chip error correction. Given that magnetic tunneling in MTJs does not emit photons, the PUF is also expected to be resilient to photon-emission attacks. Last but not least, the VCMAbased PUF design, owing to its 1 transistor -1 MTJ structure and electric-field-controlled operation mechanism, can be scaled to much higher density compared to conventional CMOS-based PUFs (e.g., SRAM PUF), [52] providing a more energy-and costefficient solution.
Our PUF chip consists of a 10 × 10 MTJ array, with MTJ diameters ranging from 30 to 70 nm. A total of 100 PUF instances were configured using the same chip by applying a 2.2 V pulse across each MTJ with a pulse width of 10 ns. Characterization of the security and reliability were performed on the PUFs, showing an entropy close to one, an inter-Hamming distance close to 50%, and a correlation coefficient near zero. Readout reliability was also demonstrated with zero-bit errors in 10 4 repeated measurements, by applying a read voltage of 200 mV in an appropriate direction to achieve VCMA-enhanced bit stability during readout.  a) Schematic of a magnetic tunnel junction and the measurement circuit used in this work. Voltage pulses are applied to the device by a pulse generator through the RF port of the bias tee and the state of the device is measured by a sourcemeter after each pulse. An external magnetic field (H) is applied at an angle H from the film normal to compensate for the non-zero stray field acting on the free layer. b) Measured resistance loop versus out-of-plane magnetic field under different DC bias voltages. c) The device is initially in the parallel (P) state. After the application of a voltage pulse, the energy barrier is eliminated by VCMA, and the magnetic moment is set to the in-plane direction after damped precession. Once the voltage pulse is removed, the device will go to either the P or anti-parallel (AP) direction randomly, with equal probabilities.

Device Structure and Operation Principle
respond to the parallel (P) and anti-parallel (AP) configurations of the magnetization of the two CoFeB layers. The TMR ratio, which is defined as (R AP − R P )/ R P , is ≈170% for the near-zero bias voltage (1 mV) case. The VCMA effect can be observed from the increase (decrease) of the coercivity under positive (negative) bias voltage. The VCMA coefficient for the stack used in this work was measured to be ≈130 fJ V −1 m −1 . The detailed calculation is given in Note S2 (Supporting Information). A small offset field of ≈−40 Oe is present due to the imperfect compensation of the stray field from the fixed layer, and the shift of the offset field under different bias voltages is observed because of the existence of a finite STT effect.
VCMA has been previously proposed as a writing mechanism for MRAM due to its potential high density and low power consumption, [53][54][55][56][57][58] where switching can be realized by tuning the width of a voltage pulse across the VC-MTJ. [53,56,58]- [71] On the other hand, Figure 1c depicts the writing operation principle for the VCMA-based reconfigurable PUF which is based on the idea of stochastic switching. At zero bias voltage, there are two minima in the energy landscape which are the two stable out-of-plane directions of the free layer magnetization. Because of the VCMA effect, when a voltage of certain polarity is applied to each MTJ, the energy barrier E b between its two minima is lowered. Once the voltage hits a critical value, E b is eliminated and the magnetic moment of the free layer begins to precess around an in-plane axis, which can be defined by a small external magnetic field. If the voltage is removed at half period, the magnetic moment will settle in the opposite direction. [53,56,[58][59][60][61][62][63][64][65][66][67][68][69][70][71] However, if the voltage is applied for a longer time, the precession will continue with a reducing amplitude due to damping, and the free layer will settle into an in-plane direction within a few nanoseconds. If the voltage pulse is removed at this point, the easy-axis is changed to perpendicular again and the magnetic moment reorients to one of the perpendicular states with equal probability. [72,73] Since this process is completely random, it can be used to set or reconfigure the secret key of the PUF.

Generation of PUF Instances
The VCMA-based PUF consists of 100 MTJs with diameters of 30, 50, and 70 nm diameters, respectively. The numbers of MTJs of each size were 25, 37, and 38, respectively. Due to the imperfect fabrication yield, these MTJs were chosen from a larger number of devices which were all fabricated on the same chip. To obtain a reliable and reconfigurable PUF operation, all unit cells need to be bi-stable under a fixed (e.g., zero) magnetic field. To verify that this condition is met in our MTJ array, we first measured the resistance as a function of out-of-plane magnetic field for all the 100 MTJs. The result is shown in Figure 2. It can be observed that, even though the MTJs have a distribution of coercivity and offset fields, they are all bi-stable at one "global" offset field of ≈−40 Oe, which is indicated as the red dashed line in the figure.
The circuit which was used for reconfiguring and measuring the PUFs is illustrated in Figure 1a. The reconfiguration voltage pulse was sent to the MTJ through the RF port of the bias tee by a pulse generator, and the resistance of the MTJ after each pulse was measured via the DC port using a sourcemeter. During the application of the voltage pulses, a constant tilted magnetic field was applied at an angle H from the film normal to both compensate the offset field and to define an in-plane axis for the precession. In the following measurements, voltage pulses with pulse amplitude of 2.2 V and pulse width of 10 ns were applied across the MTJs. It should be noted that, due to the reflection caused by the impendence mismatch between the MTJ and the transmission line, the real voltage across the device is higher than the nominal value from the pulse generator, given by V = (1 + Г)V nominal , where Г is the voltage reflection coefficient that is expressed as Г = (Z MTJ -Z trans )/(Z MTJ + Z trans ). Because the MTJ impendence is much larger than the impendence of the transmission line, i.e., Z MTJ >> Z trans , the reflection coefficient is Г ≈1. Therefore, the real voltage experienced by the MTJ is V ≈2V nominal . The amplitude of the voltage pulses mentioned in this work corresponds to this real (rather than nominal) voltage experienced by the MTJ.
We applied 100 consecutive pulses on each device, and one example of this experiment in a 70 nm device is illustrated in Figure 3. The state of the device switches randomly after each pulse, with ≈50% probability for all the transitions, i.e., from "0" to "0", from "0" to "1", from "1" to "0" and from "1" to "1", as shown in Figure 3b, where "0" and "1" correspond to the P and AP configurations, respectively. By repeating this process for all the devices on the same chip, 100 independent PUFs were obtained. The patterns of four representative PUF instances are illustrated in Figure 4a, where the red and blue colors represent states "1" and "0", respectively. It is also worth noting that, here, each cell can be reconfigured individually, thus allowing for a partial or complete erasure of the previous PUF. [8,74] This means that one can choose to modify certain challenge-response pairs independently without affecting the others. The randomness of the VCMA-induced bits was also confirmed by evaluation against the NIST statistical test suite, [75] as discussed in Note S1 (Supporting Information).

Characterization of PUFs
Next, we characterized the 100 generated PUF instances by evaluating four main metrics, namely, uniformity, uniqueness, reconfigurability, and reliability. [76,77] First, uniformity was quantified by calculating the entropy of each PUF that was generated, using the Equation Here, p is the probability of having "0" or "1" in a single PUF, and is expected to be 50%, resulting in the ideal value for entropy being equal to 1. The result for all the 100 PUFs is shown in Figure 4b. All the E values from the 100 PUFs are close to 1, confirming the uniform distribution of two states within the generated PUFs. Next, we evaluated the uniqueness, which is quantified by calculating the inter-Hamming distance (HD) of the PUF instances.
Here, k is the number of the PUFs under test, m is the length of the response, and HD is the Hamming distance between any two responses R i and R j from the different PUFs to the same challenge, defined as the number of bit-to-bit differences between two strings of the same length. The optimal value for inter-HD is 50%, indicating half of the bits being different. The distribution of the inter-HD values calculated from each two 100-bit responses from the 100 PUF instances in this work is shown in Figure 4c. The inter-HD is well distributed around the 50% optimal value, with a mean and variation of 50.3% and 5.3%, respectively.
Another important metric for reconfigurable PUFs is the reconfigurability, i.e., whether the reconfigured PUF instance is independent from the previous PUFs. We evaluated this by calculating the correlation coefficients between each two reconfigured PUFs. The result is shown in Figure 4d, where diagonal elements are hidden for clarity. It is observed that all coefficients are close to 0, confirming the statistical independence between the reconfigured PUFs.
Finally, we demonstrated the reliability of our VCMA-based reconfigurable PUF. In the reconfiguration phase, a negative voltage is applied across the MTJ to temporarily eliminate the energy barrier using the VCMA effect. The same effect can be used to enhance the reliability during readout phase, reducing the probability of read disturbance. [78] When we apply a positive voltage, as shown in Figure 1b, the coercivity increases because the energy barrier is enhanced, and therefore the device becomes more stable during readout. Figure 5 shows the measured resistance as a function of the number of consecutive measurements in a representative device. We selected the device with the smallest coercivity within the PUF array to show the worst-case scenario. The MTJ was first initialized into one of its two states by an external perpendicular magnetic field. Red and blue color represent starting from the AP and P state respectively. Then, 10 4 consecutive readout (i.e., resistance sensing) measurements were conducted using a voltage of +200 mV, which is a common value for commercial MRAM. It is shown that even in this worst-case scenario, no bit errors are observed. The endurance of a representative device as a function of the number of reconfiguration cycles was also measured, and no degradation was observed after 1000 consecutive reconfiguration cycles. This result is shown in Note S3 (Supporting Information).
Another constraint for some applications is the reliability of the PUF across different operating temperatures. It is worth www.advancedsciencenews.com www.advelectronicmat.de noting that a previous work has studied the temperature dependence of VCMA and PMA in nanoscale magnetic tunnel junctions. [79] This work showed that both VCMA and PMA parameters reduce with increasing temperature. Since these two parameters affect the voltage required for reconfiguration differently (i.e., higher PMA increases the reconfiguration voltage, while higher VCMA reduces it), the overall effect is expected to be a small variation of ≈10% in the required voltage over the range of temperatures from 240 to 400 K.
It is worth comparing the demonstrated PUF with other reconfigurable PUF designs based on emerging memories. Due to the dynamic source of entropy that could be utilized for reconfigurability, non-volatile memories such as phase change memory (PCM) [80] and resistive random-access memory (RRAM) [81][82][83][84][85] have also gained attention for reconfigurable PUF applications. However, both PCM and RRAM based PUF designs require the devices to be initialized to the same (high/low) resistance states before the reconfiguration, while the proposed VCMA-MRAM based PUF can be reconfigured regardless of the initial state. In addition, a PCM based PUF requires precise control of the reconfiguration pulses (i.e., amplitude, pulse width, and fall time) for multi resistance levels, [80] making it harder to scale to higher density for practical applications. On the other hand, the proposed VCMA-MRAM PUF design only needs the pulse to have sufficient amplitude and pulse width. Moreover, the read-out for both the PCM and the RRAM based PUFs is more complicated than the demonstrated PUF, therefore making the circuit less compact. For example, the PCM based PUF needs to either compare the current flowing through the device to multiple reference values, or to count the number of programming pulses required to make the cell resistance converge to the target value, [80] and the RRAM based PUF requires either comparison between the resistance of two RRAM cells, [81,82,85] or to count the time needed to set the RRAM cell. [84]

Conclusion
In summary, a scalable and CMOS-compatible MTJ-based reconfigurable PUF with effective metrics has been demonstrated. We showed that the reconfiguration of the PUF can be realized by voltage pulses as short as 10 ns. A total of 100 PUF instances were reconfigured on a 10 × 10 perpendicular MTJ array with high TMR. The performance of the proposed PUF was evaluated in terms of uniformity, uniqueness, reconfigurability, and reliability, with an entropy of ≈1, inter-HD of ≈50%, correlation coefficient of ≈0, and zero bit errors in 10 4 repeated readout measurements. Our results provide a reliable and compact solution for hardware authentication in CMOS+spintronics integrated systems.

Experimental Section
Device Fabrication: The film stacks were sputter deposited in an ultrahigh vacuum (UHV) physical vapor deposition (PVD) system (Canon ANELVA HC7100), annealed at wafer level for 30 min at 400˚C, and then fabricated into circular pillars with diameters of 30, 50, and 70 nm using electron beam lithography. The MgO layers were deposited by radiofrequency (RF) sputtering, while metallic layers were deposited by DC sputtering.
Electrical Measurements: Generation and measurement of PUFs were performed on a probe station with a projected field electromagnet, using RF probes with a ground-signal (GS) configuration. The voltage pulses for reconfiguring the PUFs were applied with a Tektronix pulse generator (PSPL10070A), and the resistance of each unit device was measured by a sourcemeter (Keithley 2401) using a bias tee.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.