Low Operating Voltage and Immediate Read‐After‐Write of HZO‐Based Si Ferroelectric Field‐Effect Transistors with High Endurance and Retention Characteristics

The study demonstrates HfZrOx (HZO)‐based Si ferroelectric field‐effect transistors (FeFETs) with a low operating voltage (1.5 V) and immediate read‐after‐write operation (100 ns) via HZO thickness scaling, electron‐beam‐irradiation (EBI) treatment, and interfacial layer (IL) scavenging. With these three strategies, reduced operating voltage, immediate read‐after‐write capability, and improved endurance (>108 cycles) and retention (extrapolated 10‐year) characteristics are achieved in FeFETs. The improved characteristics of FeFETs are attributed to the reduced operating voltage by HZO thickness scaling, the ferroelectric orthorhombic phase‐oriented crystallization by EBI treatment, and the reduced gate voltage drop across the IL and reduced depolarization field by the IL scavenging. It is believed that this work contributes to the development of low‐power and fast‐read FeFETs.


Introduction
Recently, with the innovation of data-intensive applications such as big data, artificial intelligence, and machine learning and battery-powered devices such as smartphones, wearables, portables, Internet-of-Things, low-power, and high-speed memory DOI: 10.1002/aelm.202300327devices are becoming essential to overcome the limitations of conventional computing architecture because not only data traffic has become extremely heavier, but it also requires access to a tremendous amount of data.For nextgeneration computing, ferroelectric materials are promising due to their nonvolatility of polarization, high speed, low power consumption, and multifunctionality, enabling their use as both logic and memory devices within a single device. [1,2]However, as devices are scaled down to the nanoscale dimension, retaining the ferroelectricity of conventional perovskite-structure materials is challenging, which hinders research on the ferroelectric device.Since the first discovery of ferroelectricity in 10 nm thick Sidoped HfO 2 , [3] HfO 2 -based ferroelectric materials are gaining interest again, thanks to their scalability and compatibility with complementary metal-oxide-semiconductor technology.Various dopants that exhibit ferroelectricity in HfO 2 thin films such as Al, [4] Gd, [5] La, [6] Sc, [7] Y, [8] and Zr [9] have been studied, and among the proposed dopants, Zr has the higher feasibility because Zr has almost identical physical properties as Hf, including atomic radius, crystal phase, and lattice parameter, thus, it is easy to integrate into HfO 2 .In addition, unlike other dopants that require precise control of doping concentration within a 5 at% range, Zr exhibits a wide process window. [10]Despite the several advantages of HfZrO 2-x (HZO), the high operating voltage, [11] poor endurance, [12] and read latency [13] of HZO-based ferroelectric field-effect-transistor (FeFET) are critical obstacles.
Most of the characteristics requiring improvement are caused by the interfacial layer (IL) that is unavoidably formed between the ferroelectric layer and the semiconductor substrate.This phenomenon changes the gate stack structure of FeFET to the metalferroelectric-insulator-semiconductor (MFIS) structure even if IL is not intentionally inserted. [14]In general, SiO x with a thickness of 1 nm is formed as IL on a Si substrate.Since the dielectric constants of SiO 2 and HZO are typically 3.9 and 30, [15] respectively, in the MFIS structure of 10 nm thick HZO, the voltage drop distribution across the gate oxide is 43.5% and 56.6% for the IL and HZO, respectively, according to capacitive division.Additionally, considering the voltage drop in the Si substrate and flat band potential, and including polarization (20 μC cm −2 ), charge trapping (10 14 cm −2 ), [16] and depolarization field, the electric field across the IL at the gate voltage (V g ) of 4 V is >20 MV cm −1 , which is very severe stress.The additional voltage drop and severe electrical stress across the IL cause an increase in the switching voltage and the degradation of endurance characteristics in the MFIS structure.In order to alleviate the electrical stress applied across the IL, methods of inserting a high-k material [17][18][19][20] and reducing the thickness of the IL [21,22] have been reported.
In addition to the voltage drop across the IL, the charge trapping caused by the IL also impairs the endurance characteristics of the MFIS structure. [23]Moreover, oxygen vacancy, a defect mainly formed at the interface between HZO and IL, creates defect levels near the conduction band, [24] which causes electron trapping.As a result, when a positive pulse is applied as a write operation, not only polarization switching but also electron trapping is induced, and read latency occurs as the trapped electrons are gradually de-trapped over time. [13]The depolarization field generated by the IL also deteriorates the retention characteris- tics of the MFIS structure. [25]The decrease in IL thickness and increase in the dielectric constant of IL, which alleviated voltage drop and electrical stress, can also mitigate charge trapping and depolarization field. [22,26]Methods of forming a high-quality interface using direct [12] and remote [21,27] scavenging that can reduce charge trapping are also proposed.
In order to improve the performance of FeFET, IL engineering is important in the MFIS structure, but the engineering of the ferroelectric layer is also indispensable.First of all, reducing the thickness of HZO film can achieve a reduction in switching voltage (V sw ) and an improvement in endurance. [28]owever, there is a trade-off in that the temperature of the post-metallization annealing for inducing the ferroelectric orthorhombic phase is increased.Other approaches have been reported to improve device performance by surface treatment such as microwave annealing [29,30] and plasma treatment, [31,32] and to improve ferroelectricity by generating defects, [33,34], i.e., oxygen vacancy, using sputtering and ion bombardment.In particular, oxygen vacancy in HZO film plays an important role in favoring the formation of a ferroelectric orthorhombic phase during the annealing process. [35,36]n this work, we utilized HZO thickness scaling, electronbeam-irradiation (EBI) treatment, and IL scavenging as three strategies to reduce the operating voltage, promote the ferroelectric orthorhombic phase-oriented crystallization, and reduce IL thickness, respectively.EBI treatment can induce sub-oxides in HZO films, which not only formed more orthorhombic phase in the subsequent PMA but also reduced the bulk trap density.Reducing the IL thickness minimizes the V g drop across the IL, allowing sufficient electric field to be applied to the HZO, which realizes a low-voltage operation.In addition, IL scavenging induced during post-metallization annealing (PMA) improves endurance and retention characteristics by reducing interfacial trap density. [22,27]Finally, we achieved FeFETs capable of low operating voltage (1.5 V) and immediate read-after-write operation (100 ns) with high endurance (>10 8 cycles) and retention (extrapolated 10 years) characteristics.We believe that our strategies of HZO thickness scaling, EBI treatment, and IL scavenging are promising for improving the performance of FeFETs.

Strategies for Improving Device Performance in MFIS Structures
Figure 1 shows three strategies for improving the MFIS structure using HZO thickness scaling, EBI treatment, and IL scavenging.As a method of scaling the HZO thickness, it is expected to reduce the operating voltage and improve endurance characteristics.EBI treatment modifies the chemical bonding state of HZO film to promote ferroelectric orthorhombic phase-oriented crystallization in the subsequent PMA process, resulting in a decrease in operating voltage and improvement in retention and endurance characteristics.Lastly, IL scavenging can reduce the operating voltage, improve retention and characteristics, and reduce read latency by scaling IL thickness.It is expected that the performance of HZO-based FeFETs can be comprehensively improved by combining the three strategies.The device fabrication flow and structural schematic are depicted in the Experimental Section and Figure S1 (Supporting Information).

Effects of Three Strategies on HZO Films
Figure 2a-c shows the cross-sectional TEM images of the fabricated gate stacks of 10 nm HZO without EBI treatment and without scavenging, 5 nm HZO without EBI treatment and with scavenging, and 5 nm HZO with EBI treatment and with scavenging.The thickness of the HZO film was reduced from 10 to 5 nm, and IL was successfully removed by IL scavenging induced by Ti inserted into the gate metal stack.It is quite difficult to find a clear SiO x IL between HZO and Si (Figure 2b,c).However, ferroelectric orthorhombic phase-oriented crystallization by EBI treatment, which was conducted before gate metal stack deposition was not noticeable in microscopic cross-sectional TEM images.For a further macroscopic and comprehensive structural analysis, grazing incidence X-ray diffraction (GIXRD) and X-ray photoelectron spectroscopy (XPS) analysis were performed.
Figure 3 shows the results of GIXRD analysis of HZO films without EBI and with EBI treatment before PMA and after PMA.
As shown in Figure 3a, before PMA, both HZO films without EBI and with EBI treatment were amorphous and no peaks appeared, which indicates EBI treatment did not affect the physical structure of HZO before PMA.However, after PMA, it was confirmed that the ferroelectric orthorhombic phase and tetragonal phase were formed for both HZO films without EBI and with EBI treatment (Figure 3b).According to several studies, the peak at 30.6°c an be deconvoluted into the orthorhombic phase at 30.4°and the tetragonal phase at 30.8°. [37] Although GIXRD analysis is difficult due to the nearly identical XRD patterns of the orthorhombic phase and tetragonal phase of HZO, the peaks at 30.6°were precisely deconvoluted using a Gaussian function and shown in Figure 3c.The peak at 30.6°of HZO without EBI was deconvoluted into the orthorhombic phase of 33% and tetragonal phase of 67%, while that of HZO with EBI was deconvoluted into 48% and 52%, respectively.The deconvolution of peaks at 30.6°suggests that more ferroelectric orthorhombic phase was induced in HZO with EBI than in HZO without EBI after PMA.The result that more orthorhombic phase was induced in HZO with EBI after PMA was due to the generation of sub-oxide in HZO by EBI, as shown in the XPS spectra in Zr 3d (Figure 4a).EBI treatment did not affect the physical structure of HZO but modified the chemical bonding state before PMA.Furthermore, after PMA, the doublet in Zr 3d of HZO with EBI was more clearly separated than that of HZO without EBI and the full-width at halfmaximums of the peaks decreased in HZO with EBI (Figure 4b), indicating more homogeneous chemical bonding states.Here, sub-oxide in HZO before crystallization by PMA was found to be effective to promote orthorhombic phase-oriented crystallization as previously reported. [35,36]The effect of increasing the orthorhombic phase by EBI, reducing the bulk trap density, is discussed in detail in the next section.

Effects of Three Strategies on HZO-Based FeFETs
Then, we systematically investigated the electrical characteristics of ferroelectric field-effect transistors (FeFETs) with our strategies.Figure 5 shows the DC transfer curves and memory window (MW) of fabricated FeFETs.The V th values of FeFETs were derived according to the constant current method (I th = W/L × 10 −7 ).As shown in Figure 5a, ferroelectric counterclockwise hysteresis was exhibited in all FeFETs.The MW values were 1.28, 2.30, and 0.74 V at V g sweep of 5, 4, and 2.4 V for HZO of 10 nm without EBI and without scavenging, HZO of 10 nm without EBI and with scavenging, and HZO of 5 nm with EBI and with scavenging, respectively.Figure 5b shows the MW value according  to the V g sweep, which confirms that the operating voltage significantly decreases with HZO thickness scaling and IL scavenging.For example, HZO of 10 nm without EBI and without scavenging exhibited clockwise hysteresis at V g sweep of 3.5 V, indicating charge trapping was dominant over ferroelectricity, but HZO of 10 nm without EBI and with scavenging and HZO of 5 nm with EBI and with scavenging exhibited ferroelectric counterclockwise hysteresis even at V g sweep of 2.6 and 2.0 V, respectively.The reduction of operating voltage was confirmed according to our strategies in the DC transfer curve, but it was also highlighted by the pulse measurement of the positive-upnegative-down (PUND) method in the MFIS structures (Figure S3, Supporting Information).The V sw decreased from 3.87 V for HZO of 10 nm without EBI and without scavenging to 2.37 V for HZO of 5 nm with EBI and with scavenging.According to the strategies, V sw was finally reduced by 39%.IL scavenging greatly reduced V sw , and HZO scaling and EBI treatment further reduced V sw .Additionally, since V sw decreased as the HZO thickness decreased from 10 to 5 nm, the maximum MW proportional to V sw also decreased, but the V g to achieve the same MW decreased and the minimum operating voltage also decreased.In addition, in Figure 5a, the minimum value of subthreshold swing (SS) for HZO of 10 nm without EBI and without scavenging, HZO of 10 nm without EBI and with scavenging, and HZO of 5 nm with EBI and with scavenging were 350, 250, and 123 mV dec −1 , respectively, indicating the improvement in interface quality due to our three strategies.IL scavenging, which decomposes IL, also decreased SS by reducing oxygen vacancy at the bottom interface [21] and interface trap density [26] as previously reported.Meanwhile, the high gate current in the off-state is considered to be caused by the gate-induced drain leakage from the gate-drain overlap structure.
In order to investigate the ferroelectricity of the FeFETs according to our strategies in more detail, it was analyzed based on the pulse scheme in Figure S2 (Supporting Information).Figure 6 shows the pulsed I d -V g curves and MW obtained by performing the write (program and erase) operation and reading after the retention time as shown in Figure S2a (Supporting Information).The read-after-write delay was also examined by measuring the pulsed I d -V g curves while waiting for the retention time of at least 100 ns. Figure 6a-c shows pulsed I d -V g curves of FeFETs with HZO of 5 nm without EBI and without scavenging, with HZO of 5 nm without EBI and with scavenging, and with HZO of 5 nm with EBI and with scavenging.For FeFETs with HZO without scavenging and with HZO with scavenging, write pulses of ±2.7 V/100 μs and ±2.0 V/100 μs were applied, respectively.As shown in Figure 6a, MW after 100 ns of write operation was very small, ≈0.03 V, for FeFETs with HZO of 5 nm without EBI and without scavenging.The MW gradually increased according to the retention time and became 0.31 V at 1 s after the write operation, which means that the trapped charges are de-trapped over time.In Figure 6b,c, the MW of FeFETs with scavenging also gradually increased with time, however, the change was smaller compared to FeFETs without scavenging.Above all, FeFETs with scavenging exhibited higher MW than FeFETs without scavenging even at lower write pulse amplitude.
The tendency of scavenging to lower the write pulse amplitude is clearly shown by the MW according to the write pulse amplitude in Figure 6d-f.Write pulses of ±2.3 to ±3.5 V were applied to FeFETs without scavenging, while write pulses of ±1.5 to ±2.5 V were applied to FeFETs with scavenging.Figure 6d shows that FeFETs with HZO without EBI and without scavenging can perform a read operation with a read-after-write delay of 100 ns at a write pulse amplitude of ±2.9 V or higher.On the other hand, FeFETs with HZO without EBI and with scavenging and with HZO with EBI and with scavenging were capable of read operation with a read-after-write delay of 100 ns at ± 1.8 and ± 1.5 V, respectively (Figure 6e,f).All FeFETs exhibited the maximum MW at the retention time of 10 ms to 1 s in common.The maximum MW of FeFETs with HZO without EBI and without scavenging was 0.54 V at the write pulse of ±2.9 V/100 μs.However, with scavenging, the maximum MW was 0.55 V at the write pulse of ± 2.3 V/100 μs.Finally, with EBI and with scavenging, the write pulse to obtain the maximum MW of 0.53 V was reduced to ± 1.8 V/100 μs.In other words, FeFETs with EBI and with scavenging enabled read-after-write operation with only a delay of 100 ns even with write pulses of ± 1.5 V, and required lower write pulses to achieve the same MW as other devices.
Figure 6g-i shows long-term retention characteristics with 10year extrapolation.For FeFETs without scavenging, write pulses of ±3.0 V/100 μs were applied while write pulses of ±2.0 V/100 μs were applied for FeFETs with scavenging.From the retention time of 100 ns to 10 ms, retention instability was evaluated while comparing the V th change after program operation (ΔV th, PGM ) since charge trapping usually occurs by positive program pulses due to the defect level originating from oxygen vacancy as in the case with our devices and typical HZO-based FeFETs. [13,24]Evaluating the ΔV th, PGM accordingly, the ΔV th, PGM values of FeFETs with HZO without EBI and without scavenging, with HZO without EBI and with scavenging, with HZO with EBI and with scavenging were 0.33, 0.18, and 0.20 V, respectively.In addition, retention loss was assessed by comparing the MW at the retention time of 10-year extrapolation to the maximum MW.For FeFETs with HZO without EBI and without scavenging, maximum MW and MW at the retention time of 10-year extrapolation were 0.68 and 0.42 V, respectively, which is a retention loss of 38%.On the other hand, the retention loss of FeFETs with HZO without EBI and with scavenging and with HZO with EBI and with scavenging were 23% and 17%, respectively, lower than that of FeFETs with HZO without EBI and without scavenging.These results suggest that scavenging and EBI are very effective in alleviating retention instability and retention loss.d-f) MW (pulse width = 100 μs), and g-i) V th after write operations (V d = 0.1 V).FeFETs of 5-nm HZO with EBI and scavenging were capable of immediate read-after-write (100 ns) even with a 1.5 V write pulse.
The excellent retention characteristics of the FeFETs with scavenging are attributed to the reduced charge trapping and depolarization field due to the reduced IL thickness.With EBI, retention loss was further reduced.Interfacial trap density estimated from ΔV th, PGM according to the retention time was similarly lower in FeFETs with HZO without EBI and with scavenging and with HZO with EBI and with scavenging than in FeFETs with HZO without EBI and without scavenging, but bulk trap density derived from slow double-pulsed I-V (DPIV) measurement (Figure S2b, Supporting Information) was lower in FeFETs with HZO with EBI and with scavenging than in FeFETs with HZO without EBI and with scavenging.The V th hysteresis measured by DPIV decreased by 43% from 0.28 V for FeFETs with HZO without EBI and with scavenging to 0.16 V for FeFETs with HZO with EBI and with scavenging (Figure S4, Supporting Information), implying that the sub-oxide generated by EBI penetrating from the top surface reduced the bulk density in the subsequent PMA process.trap reduction by EBI, the FeFETs with EBI and scavenging showed superior endurance characteristics compared to the FeFETs without EBI and with scavenging (Figure 7).At the write pulse of ± 2 V/100 μs, the FeFETs with EBI and scavenging showed breakdown at 10 9 cycles, which was improved than the FeFETs without EBI and with scavenging in which breakdown occurs at 10 8 cycles (Figure 7a).Moreover, at the write pulse of ± 2 V/10 μs, no breakdown occurred until 10 9 cycles in the FeFETs with EBI and scavenging, while the breakdown occurred at 10 9 cycles in the FeFETs without EBI and with scavenging (Figure 7b).
Finally, the benchmark [2,13,23,[38][39][40][41] in Figure 8 highlights the low-voltage and fast read-after-write operation of our FeFETs with HZO thickness scaling, EBI treatment, and IL scavenging.The FeFETs with HZO with EBI and with scavenging showed the MW  of 0.65 V at a read-after-write delay of 100 ns when a write voltage of 2 V was applied.Even at a write voltage of 1.5 V, it showed a MW of 0.12 V.This result shows that these engineering strategies are very effective and have great potential for improving the performance of FeFETs, evident by the record-performance matrix in Figure 8.More detailed benchmarks related to write and read operations are shown in Table S1 (Supporting Information).

Conclusion
We have systematically investigated the strategies of HZO thickness scaling, EBI treatment, and IL scavenging to improve the performance of FeFETs.The thickness reduction of HZO and IL was manifested by TEM cross-section analysis.The generation of oxygen vacancy and ferroelectric orthorhombic phase-oriented crystallization by EBI treatment was confirmed by XRD and XPS analysis.As a result, the reduction of ferroelectric switching voltage and operating voltage of FeFET with the three strategies was demonstrated by PUND measurement and transfer curves.Finally, our FeFET with the strategies was capable of immediate read-after-write operation (100 ns) at the low operating voltage (1.5 V) with the endurance characteristic exceeding 10 8 cycles and 10-year retention characteristics with extrapolation.The excellent performance of our FeFET shows that the strategies of HZO thickness scaling, EBI treatment, and IL scavenging have great potential for low-power and fast-read FeFET.

Experimental Section
Fabrication: A fabrication flow and structure of FeFETs to investigate the improvement of device performance by EBI treatment and oxygen scavenging are illustrated in Figure S1 (Supporting Information).The FeFETs were fabricated by the gate last process, and the S/D regions were formed first by implantation and activation annealing.Then, native oxide (SiO x ) on Si substrates was removed by buffered oxide etchant prior to HZO thin film deposition.The HZO films with a thickness of 5, 7, and 10 nm were deposited using an ozone oxidant at 270 °C by ALD.Tetrakis (ethylmethylamino) hafnium and tetrakis (ethylmethylamino) zirconium were used as precursors.Next, EBI treatment was carried out for 1 min on the asdeposited HZO films.An electron beam source with a diameter of 60 mm discharged the mixed Ar/O 2 plasma and accelerated the electrons to the HZO films.The accelerating voltage was 100 V. On the pristine HZO film (without EBI) and the EBI-treated HZO film (with EBI), gate metal stacks of Au (80 nm)/TiN (20 nm) and Au (80 nm)/Ti (20 nm)/TiN (20 nm) were formed for gate stacks without scavenging and with scavenging.Crystallization of HZO film and oxygen scavenging by Ti was induced by PMA at 500 °C for 1 min.Finally, Si-doped Al was deposited as the S/D electrodes followed by PMA at 300 °C for 5 min.
Material Characterization: TEM (JEOL, JEM-2100F) was used to obtain cross-sectional images of gate stacks.The phase and chemical bonding state of the HZO films were analyzed by GIXRD (Rigaku, SmartLab) and XPS (ThermoFisher Scientific, K-Alpha+).In the XPS analysis, the chargeup effect was compensated by calibrating the whole spectra based on the peak of C 1s at 284.5 eV.
Electrical Characterization: The electrical characteristics of the fabricated FeFETs were investigated by a parameter analyzer (Keithley, 4200A-SCS) with a pulse measurement unit (Keithley, 4225-PMU) and remote preamplifier/switch modules (Keithley, 42250RPM).The pulse scheme used for device characterization is shown in Figure S2 (Supporting Information).In order to evaluate the read-after-write delay, the retention time from the write operation (program and erase) to the read operation was given.The interfacial trap density could also be evaluated from the V th shift according to the retention time.DPIV measurement was conducted to evaluate the bulk trap density of the fabricated HZO films.

Figure 1 .
Figure 1.Schematic illustrations of three strategies to improve MFIS structure.

Figure 2 .
Figure 2. Cross-sectional TEM images of a) thick HZO without EBI treatment and without scavenging (10 nm, no EBI, Au/TiN gate metal stack), b) thin HZO without EBI treatment with scavenging (5 nm, no EBI, Au/Ti/TiN gate metal stack), and c) thin HZO with EBI and with scavenging (5 nm, EBI of 100 V, Au/Ti/TiN gate metal stack).All stacks are after PMA.

Figure 3 .
Figure 3. GIXRD spectra of HZO films without EBI and with EBI treatment a) before PMA and b) after PMA.c) The deconvolution of peaks appeared at 30.6°.

Figure 4 .
Figure 4. XPS spectra in Zr 3d of HZO films without EBI and with EBI treatment a) before PMA and b) after PMA.

Figure 5 .
Figure 5. a) Transfer curves and b) MW of FeFETs according to the V g sweep in the transfer curve.With the strategy, the gate current and operation voltage increased and decreased, respectively.

Figure 6 .
Figure 6.Time evolution of a-c) pulsed I-V curves,d-f) MW (pulse width = 100 μs), and g-i) V th after write operations (V d = 0.1 V).FeFETs of 5-nm HZO with EBI and scavenging were capable of immediate read-after-write (100 ns) even with a 1.5 V write pulse.

Figure 8 .
Figure 8. Benchmark according to write pulse, read-after-write delay, and MW in Si n-FeFETs.It demonstrates the superiority of the device fabricated in this work and the potential of the strategies used.