Accurate Weight Update in an Electrochemical Random‐Access Memory Based Cross‐Point Array Using Channel‐High Half‐Bias Scheme for Deep Learning Accelerator

Recently cross‐point arrays of synaptic memory devices have been intensively studied to accelerate deep neural network computations. Among various synaptic devices, electrochemical random‐access memory (ECRAM) is emerging as a promising non‐volatile memory candidate owing to its superior synaptic characteristics. However, an optimized update scheme for a three‐terminal ECRAM‐based cross‐point array is yet to be developed. In this study, a metal‐oxide‐based ECRAM (MO‐ECRAM) shows superior synaptic characteristics and the weight update of devices in the MO‐ECRAM cross‐point array is analyzed using the half‐bias (HB) scheme. Additionally, A channel‐high half‐bias (CHB) scheme is proposed to overcome the degraded selectivity of the weight update caused by the three‐terminal configuration of the ECRAM device. In the CHB scheme, the conductance change in the selected device can be increased considerably by applying a calculated additional voltage to the channel. Using the CHB scheme, parallel and selective updates are successfully performed in a 2 × 2 MO‐ECRAM cross‐point array. Finally, an experimental demonstration of the training algorithm shows the impact of selective updates when using the CHB scheme. This new update scheme is expected to improve training accuracy in ECRAM cross‐point array‐based deep learning accelerators.


Introduction
Deep neural network-based artificial intelligence technology is widely used in various applications, such as image and speech recognition, natural language processing, and autonomous driving. [1][7] In particular, a cross-point array based on a resistance processing unit (RPU) can perform fully parallel vector matrix multiplication (VMM) and vector-vector outer product (O(1) time complexity), accelerating data processing in DNNs by hundreds to tens of thousands of times compared with the conventional von Neumann architectures. [8]11][12][13][14][15][16][17][18][19] However, these devices exhibit nonideality, such as update asymmetry, nonlinearity, and cycle-to-cycle and device-to-device variations, arising from intrinsic device switching mechanisms based on the material properties. [20]lectrochemical random-access memory (ECRAM) has been proposed as an alternative to overcome the nonideal synaptic characteristics of various devices.A three-terminal ECRAM is an NVM device that induces a resistance change in its channel by injecting or extracting ions, such as Li + , H + , and O 2− , through the electrolyte.[33]49] The back-propagation algorithm for training DNNs comprises forward, backward, and weight update operations.These operations must be performed in parallel in an RPU-based crosspoint array to accelerate the deep learning computation (O(1) time complexity).In an ECRAM-based cross-point array, forward and backward passes of the VMM computation can be performed by applying voltage pulses in the row (drain line) or column (source line) directions, as enabled by Ohm's law and Kirchhoff's current law. [34]However, to achieve a fully parallel weight update of vector-vector outer product, a half-bias (HB) scheme can be used, which applies stochastic voltage pulses for activations (x i ) in the row direction (gate line) and voltage pulses of opposite polarity for error ( j ) in the column direction (source line).In addition, only the selected devices should be updated when pulse coincidence events occur.Therefore, the resistance of the half-selected devices should not be changed; only that of the selected devices should be changed. [8,35][38] However, the additional integration of access devices in cross-point arrays increases the fabrication complexity and cost and reduces the integration density of three-dimensional cross-point arrays. [39]s an alternative, a selector-free ECRAM-based cross-point array was demonstrated, and the typical HB scheme, which has been widely adopted in the cross-point arrays of novel memory devices, was used to perform selective updates in the ECRAM cross-point array. [31,40,41]However, unintended resistance changes are still observed in half-selected devices, leading to a critical degradation of training accuracy.The nonlinearity factor k, which is the ratio of weight change at half programming voltage to programming voltage (∆W(0.5Vprog )/∆W(V prog )), should be lower than 0.1 to avoid a decrease in neural network training performance. [8]Therefore, other methods should be investigated to increase the selectivity for weight updates in ECRAM-based cross-point arrays.
In this study, we fabricated a complementary metal-oxide semiconductor (CMOS)-compatible metal oxide-based ECRAM (MO-ECRAM) device and investigated its synaptic characteristics.The degradation in the selectivity of the weight update was analyzed in a three-terminal ECRAM-based cross-point array by observing the weight changes in various update schemes.A new update method based on resistance calculation considering voltage drop within the channel layer is proposed to overcome the limitation in applying the HB scheme to ECRAM-based crosspoint arrays.This method is the channel-high half-bias scheme (CHB) scheme.The improved selectivity of the weight update in the ECRAM-based cross-point array was demonstrated, and the validity of the CHB scheme was verified by experimentally demonstrating the training algorithm.

Characteristics of the Metal-Oxide-Based ECRAM
To understand the synaptic characteristics, a three-terminal MO-ECRAM, comprising a channel, electrolyte, ion reservoir, gate, drain, and source, was fabricated (Figure 1a). Figure 1b shows an optical microscopy image of the fabricated MO-ECRAM.The MO-ECRAM stack comprised a sequentially deposited WO 3-x channel, HfO 2 electrolyte, WO 3-x reservoir, and W gate electrode.Figure 1c shows a transmission electron microscopy (TEM) image of the stacked metal-oxide films.The detailed fabrication process is described in the experimental section.
The number of oxygen vacancies within the channel is a significant parameter because it determines the resistance of MO-ECRAM. [42]The concentration of oxygen vacancies within the WO 3-x channel was modulated by changing the oxygen flow rate at reactive RF sputtering and was determined via X-ray photoelectron spectroscopy (XPS) to investigate the operational principle of MO-ECRAM.For WO 3 without oxygen vacancies, only the W 6+ peak (38.13 and 36.03eV) can be observed in the W 4f XPS spectrum, whereas the W 5+ peak is not detected (Figure 2a).However, for WO 3-x with sufficient oxygen vacancies, the W 6+ peak (37.83 and 35.73 eV) and W +5 peak (34.01 eV) can be observed (Figure 2b).The estimated off-stoichiometry (x) of WO 3-x was 0.17.The oxidation state of W in the WO 3-x channel can be changed owing to the migration of O 2− ions in the gate stack induced by the electric field and causes a dramatic resistance change. [43]A pulse bias sweep measurement was performed with a voltage step of 0.2 V to confirm the ionic programming (PGM) and erasing (ERS) behavior of the MO-ECRAM.PGM and ERS were carried out by applying voltage pulses to the gate, and the channel conductance was measured at a V ds of 0.01 V immediately after the update.Figure 2c shows the electrical characterization results.Applying a positive bias to the gate induces the extraction of oxygen ions (O 2− ) from the channel to the electrolyte and increases the oxygen vacancy concentration, increasing the drain current.By contrast, applying a negative bias to the gate induces the insertion of O 2− ions from the electrolyte into the channel and decreases the oxygen vacancy concentration, reducing the drain current.The gate current was approximately 100 times lower than the drain current, implying that the HfO 2 electrolyte deposited via atomic layer deposition (ALD) was electrically insulating.50 up/dn voltage pulses (+1.5 V, 0.3 s for potentiation, and −1.4 V, 0.3 s for depression) were applied to the gate for 10 cycles (Figure 2d) to examine the switching characteristics of the MO-ECRAM device.The switching linearity was calculated using the following fitting equations: [44] G where G max , G min , and P max denote the maximum, minimum, and pulse numbers, respectively.The linearities of potentiation ( p ) and depression ( d ) are 0.011 and −1.503, respectively (Figure S1a, Supporting Information).Moreover, the average conductance change (∆G avg ) and sample standard deviation (∆G std ) were 0.281 and 0.00756 μS, respectively.The cycleto-cycle (C-to-C) variation was calculated as 0.0269 (the ratio of ∆G std to ∆G avg ).These superior linearity and variation character-istics can be attributed to the reduced built-in potential across the gate stack owing to the symmetric gate stack with the same material for the channel and reservoir. [37,45]Furthermore, the MO-ECRAM resistance was measured by applying voltage pulses of ±4 V to ±1 V.The relationship between the programming voltage (V prog ) and resistance change (ΔR) follows an exponential trend (Figure 2e).The  value was 3.632.This value is a significant characteristic for selective update in the cross-point array because it determines the minimum programming voltage satisfying the nonlinearity factor (k) is lower than 0.1 (Figure S3, Supporting Information).

Weight Change of ECRAM Devices in the Cross-Point Array
Fast and accurate vector-vector outer product is very important.HB scheme can be used in two-terminal synapse-based cross-point arrays to obtain fully parallel vector-vector outer product.By applying stochastic half-voltage pulses (+V prog /2) for activation (x i ) in the row direction and half-voltage pulses of opposite polarity (−V prog /2) for error ( j ) in the column direction, only the selected device is updated when V prog is applied to the device owing to pulse coincidence.to the insufficient difference in ΔG between a selected and device.In addition, the half-selected devices at the gate exhibit a larger ΔG than those at the channel.c) Analysis of the weight change in different update schemes.The applied voltage from the source drops within the channel, and the potential in the gate stack decreases.Therefore, the ΔR (or ΔG) of the selected device is not large enough compared with that of the half-selected device at the gate.The resistance change of the selected device (∆R selected ) can be increased significantly by applying an additional voltage (V add ) to the source.d) Method for calculating V add in the CHB scheme.∆R selected can be increased to its maximum value when the resistance change of the half-selected device at the channel (∆R c ) is equal to that of the half-selected device at the gate (∆R g ).e) Verification of the CHB scheme.Switching in the CHB scheme successfully matches that in the FB scheme owing to the additional bias (1.16 V).
In a three-terminal ECRAM-based cross-point array, an update scheme must be used to apply the voltage V prog to the gate stack, where +V prog /2 is applied to the gate and −V prog /2 is applied to the channel.However, this update scheme does not satisfy the fully parallel weight update (O(1) time complexity), because halfvoltage pulses for error ( j ) should be simultaneously applied to the row line for drain and the column line for source.Therefore, the HB scheme can be used by applying half-voltage pulses to the gate line and half-voltage pulses of opposite polarity to the source line to perform a fully parallel weight update (Figure 3a).
Figure 3b shows the experimental conductance change (ΔG) of the half-selected and selected devices when the HB scheme was used in the ECRAM-based cross-point array.The V prog and pulse width (t pulse ) used in this experiment were 4 V and 0.3 s, respectively.The conductance change of the selected device (ΔG selected , yellow area) was approximately 6.6 times the conductance change of the half-selected device at the gate (ΔG g , red area).This result can critically degrade training accuracy because the nonlinearity factor (k = ΔG g /ΔG selected = 0.15) was larger than 0.1. [8]Moreover, the ΔG of the half-selected device at the channel (ΔG c , blue area) was much lower than ΔG g .The voltage drop within the channel caused these insufficient ΔG selected and imbalance between halfselected devices.Figure 3c shows the potential in the gate stack and the weight change for each update scheme.When the source was biased and drain was grounded, an unavoidable voltage drop occurred across the channel, reducing the magnitude of the electric field applied to the gate stack.Therefore, the ΔG was reduced significantly.To solve this problem caused by the three-terminal configuration of the ECRAM, the ΔG selected can be increased by applying additional voltage (V add ) to the source.The ΔG c must be less than or equal to the ΔG g when V add is applied to maximize the ΔG selected .The ΔR was calculated rather than the ΔG to determine the value of V add because the voltage drop within the channel should be considered.The channel was assumed to comprise an infinite number of partial resistors in series, and ΔR followed an exponential trend with V prog (ΔR∝exp(V prog ), where  is a constant).When −V s ( = −V prog /2-V add ) is applied to the source, and the other electrodes are grounded, resistance change of the half-selected device at the channel (ΔR c ) can be calculated as: where A is the proportionality constant.The detailed calculation of the ΔR c is presented in Figure S4 (see Supporting Information).When a gate is biased with +V prog /2, there is no voltage drop within the channel, and ΔR g is A•exp(V prog /2).The following equation must be solved to calculate the value of V add when the ∆R c and ∆R g are the same: However, the solution to this equation cannot be numerically solved.The solution can be expressed using only the Lamber W function (see Supporting Information).The solution can be found using the intersection point of the two functions (left and right sides of Equation 5); therefore, V add can be obtained at the given V prog and  (Figure 3d).Using the new update scheme, which applies +V prog /2 to the gate and −V prog /2-V add to the source, known as the CHB scheme, a fully parallel and accurate weight update can be successfully performed in the ECRAMbased cross-point array owing to the significantly increased ΔG or ΔR of the selected device while keeping ΔG of the half-selected devices.In the CHB scheme, V add can induce a weight change of the channel to be the same as when V prog is applied to the gate stack.To verify the accuracy of the V add calculation, experimental conductance switching via the CHB scheme was compared with the full-bias (FB) scheme.In the FB scheme, ±V prog is applied to the gate, and other electrodes are grounded (Figure 3e).The V prog and pulse width (t pulse ) used in this experiment were 4 V and 0.3 s, respectively.V add was calculated as 1.16 V considering the ungated region of the channel, which needs a higher V add (Figure S5, Supporting Information).The resistance change in the FB scheme (∆R FB ) was approximately the same as that in the CHB scheme (∆R CHB ), demonstrating that the CHB scheme can be applied to ECRAM-based cross-point arrays.

Parallel and Selective Update Test Using the Cross-Point Array
A 2 × 2 MO-ECRAM cross-point array was fabricated to compare the selectivity of the weight update in the CHB scheme with that in the HB scheme (Figure 4a).In the HB scheme, parallel and selective updates for potentiation were performed by applying voltage pulses of +2 V and -2 V to the gate and source line, respectively.Voltage pulses of opposite polarity were used for depression.However, in the CHB scheme, voltage pulses with a 3.164 V magnitude were applied to the source line rather than 2 V. Figure 4b shows the pulse trains to the gate and source lines for parallel and selective updates in the 2 × 2 MO-ECRAM crosspoint array while the drain lines were grounded, except during read operations.Read operation was performed row by row for a 0.1 s pulse interval time after weight update by applying V ds of 0.1 V.A parallel update was successfully performed in the HB scheme; however, the unintended switching of W11 and W12 indicates that the selective update was unsuccessful (Figure 4c).The calculated nonlinearity factor (k) was 0.125, which is higher than 0.1; thus, the training accuracy degraded. [8]However, in the CHB scheme, parallel and selective updates were performed perfectly because there was no unintended switching (Figure 4d).In contrast to the selected device, the half-selected devices were never updated.In addition, the calculated k value was 0.0255, indicating that the conductance change of the selected device was 40 times larger than that of the half-selected device.When using the CHB scheme, training could be successfully performed in the ECRAM-based cross-point array without degrading the training accuracy because the k value was significantly lower than 0.1.The decrease in the k value in the CHB scheme compared with that in the HB scheme could be more significant, depending on the V prog magnitude and intrinsic characteristics of the ECRAM device ().The effective suppression of undesired weight update at half-selected devices by the CHB scheme is confirmed in multiple devices as shown in Figure S6 (see Supporting Information).

Impact of the Channel-High Half-Bias Scheme on Training
To confirm the impact of the selective update using the CHB scheme, an experimental demonstration of TTv2 on a singleparameter linear regression was performed by selecting two devices sharing a gate line as devices A and C in a 2 × 2 crosspoint array.[48] In particular, TTv2 is tolerant to the number of states (NOS) and noise attributed to the digital Hmatrix.The experimental setup for the TTv2 demonstration comprises the following steps (Figure 5a): (1) calculation of the error from device C, (2) stochastic weight update of device A using the HB or CHB schemes, (3) obtaining the weight of device A, (4) accumulation of the gradient information (W A ) in a digital H-matrix, and (5) deterministic weight update of device C using a single pulse when the h value in the H-matrix exceeds the threshold.The dataset with y = C target •x + _ Gaussian noise was used to solve a single-parameter linear regression problem.The C target , _ Gaussian noise , and input data sizes were 0.2, 0.01, and 500, ) Pulse trains to the gate and source line for parallel and selective updates in the HB scheme.In the CHB scheme, V s,up and V s,dn is 3.164 V rather than 2 V. c,d) Weight updates of each device when pulse trains using the HB and CHB schemes are applied to the cross-point array.In the HB scheme, unintended switching is observed in the half-selected device.By contrast, selective updates are successfully performed in the CHB scheme.
respectively (Figure 5b).In Figure 5c, C main (= C device -C ref ) using the CHB successfully converge to the target value with a 2.7% error rate, lower than 4.1% of the HB scheme.Moreover, the variation near the target value decreases from 8.3% to 4.8%.This reduced error rate and variation indicate that device C was updated only when it was selected and not when it was halfselected.Therefore, the linear regression problem parameters were optimized using devices A and C, which share a gate line.Selective updates were successfully performed using the CHB scheme.

Conclusion
In this study, we fabricated an MO-ECRAM single device and array, demonstrating superior synaptic characteristics of symmetry, C-to-C variation, and the ΔR versus V prog relationship.weight change of the devices was analyzed in the ECRAM-based crossarray when using the HB scheme.An insufficient weight change of the selected device compared with the half-selected device was observed.The proposed CHB scheme that applied an additional voltage (V add ) to the channel was proposed to increase the weight change of the selected device to overcome the degradation in the selectivity of the weight update caused by the threeterminal configuration of the ECRAM device.R was calculated when a voltage drop occurred within the channel to calculate V add .Parallel and selective updates were successfully performed in a 2 × 2 MO-ECRAM cross-point array using the CHB scheme.In addition, an extremely low nonlinearity factor (k) of 0.0255 was obtained.Moreover, the experimental validation of the TTv2 algorithm successfully demonstrated the impact of a selective update when using the CHB scheme.The CHB update scheme is a promising method for improving the training accuracy of ECRAM cross-point-array-based deep learning accelerators.

Experimental Section
Devices Fabrication: The MO-ECRAM single devices and the 2 × 2 cross-point arrays were fabricated on a SiO 2 /Si substrate using photolithography and lift-off technique.WO 3-x channel and reservoir layers (250 nm) were deposited via RF sputtering using a W metal target under a 200 W power, 22:3 sccm Ar:O 2 flow rates, and a 12 mTorr working pressure for 10 min.The HfO 2 electrolyte layer (6.5 nm) was via an ALD process using tetrakis(ethylmethylamido)hafnium (TEMAHf) as the Hf precursor and H 2 O as the oxygen source at a 200 °C chamber temperature.Pulsing time of TEMAHf and H 2 O were 1 s and 0.1 s, respectively and purge time of N 2 was 15 s.W source/drain electrodes (250 nm) and a W gate electrode (125 nm) were deposited via reactive RF sputtering using a W metal target under a 160 W power and 2 mTorr working pressure for 10 and 20 min, respectively.All sputtering processes were performed at room temperature.
Electrical Measurements: The electrical properties of the device and array were evaluated using a Keithley 2636 B source meter unit (SMU).All measurements were carried out at room temperature under ambient condition.Read operation was conducted by applying V ds (0.01 or 0.1 V) to the drain while the gate and source were grounded.Update operation was conducted by applying programming voltage to the gate and source using HB or CHB scheme.
Material Characterization: The off-stoichiometry of WO 3-X was analyzed using XPS measurement (ESCALAB250).The thicknesses of the gate stack films were measured using TEM (JEOL JEM-2100F).

Figure 1 .
Figure 1.Structure of the MO-ECRAM device.a) The MO-ECRAM device comprises a channel layer, gate stack comprising an electrolyte, a reservoir, and gate electrode, and source and drain electrodes.b) Optical microscope image of the device.The channel length, channel width, and gate length are 50, 40, and 30 μm, respectively.c) TEM cross-sectional image of the device stack.

Figure 2 .
Figure 2. Characteristics of the MO-ECRAM device.a) XPS data of the WO 3 channel.The XPS spectra of W 4f show only a high oxidation state (W 6+ ) peak owing to the WO 3 channel including insufficient oxygen vacancy.b) XPS data of the WO 3-x channel.The XPS spectra of W 4f show a low oxidation state (W 5+ ) peak owing to the WO 3-x channel including sufficient oxygen vacancy.c) I d -V g sweep for the MO-ECRAM device.The black curve indicates that the channel conductance varies as a result of applying a pulse bias sweep owing to the change in the oxidation state of tungsten.The blue curve represents the gate leakage current.d) Conductance switching graphs of the MO-ECRAM device.The gate voltages for potentiation and depression were +1.5 V and −1.4 V, respectively.The pulse width was 0.3 s.Superior linearity and C-to-C variation are observed for 10 cycles.e) The relationship between V prog and ΔR follows an exponential trend.

Figure 3 .
Figure 3. Study on the weight change of ECRAM devices in the cross-point array.a) Connection diagram of an ECRAM-based cross-point array.HB scheme is applied for selective update of an ECRAM device.Half-selected devices at the gate/channel and a selected device coexist in the cross-point array.b) Conductance switching of half-selected and selected devices.Selective update failure is observed in the ECRAM-based cross-point array owing to the insufficient difference in ΔG between a selected and device.In addition, the half-selected devices at the gate exhibit a larger ΔG than those at the channel.c) Analysis of the weight change in different update schemes.The applied voltage from the source drops within the channel, and the potential in the gate stack decreases.Therefore, the ΔR (or ΔG) of the selected device is not large enough compared with that of the half-selected device at the gate.The resistance change of the selected device (∆R selected ) can be increased significantly by applying an additional voltage (V add ) to the source.d) Method for calculating V add in the CHB scheme.∆R selected can be increased to its maximum value when the resistance change of the half-selected device at the channel (∆R c ) is equal to that of the half-selected device at the gate (∆R g ).e) Verification of the CHB scheme.Switching in the CHB scheme successfully matches that in the FB scheme owing to the additional bias (1.16 V).

Figure 4 .
Figure 4. Parallel and selective update of HB and CHB scheme using the 2 × 2 cross-point array.a) Optical image of the 2 × 2 MO-ECRAM cross-point array b) Pulse trains to the gate and source line for parallel and selective updates in the HB scheme.In the CHB scheme, V s,up and V s,dn is 3.164 V rather than 2 V. c,d) Weight updates of each device when pulse trains using the HB and CHB schemes are applied to the cross-point array.In the HB scheme, unintended switching is observed in the half-selected device.By contrast, selective updates are successfully performed in the CHB scheme.

Figure 5 .
Figure 5. Experimental demonstration of the training algorithm using the CHB scheme.a) Schematic of the experimental setup for TTv2 demonstration.Devices A and C, sharing a gate line, were used to verify the selectivity of the weight update when using the CHB scheme.b) Dataset of the singleparameter linear regression problem.Input dataset with 500 data points and 1% Gaussian noise were used.c) Experimental demonstration of the TTv2 on a single-parameter linear regression in the HB and CHB schemes.Reduced error rate (2.7%) and variation (4.8%) were obtained in the CHB scheme.