Unveiling the Impact of the Electrolyte's Counter Ions on Organic Electrochemical Transistor Performance

The effect of the electrolyte's counter‐ion in organic electrochemical transistors is often neglected. the influence of anions (i.e., counter ions) is investigated on organic electrochemical transistors (OECTs) with a PEDOT:PSS‐like semiconductor through device simulations. The study examined the effects of mobile anions on OECT performance under two scenarios: when anions are blocked by the semiconductor and when they can penetrate it. In each case, the OECT's ON and OFF states are analyzed. The findings show that when anions can penetrate the semiconductor, the ON/OFF ratio of the OECT remains unchanged while the transconductance significantly increases. In the ON state, the case of blocked anions is observed that the current is predominantly surface‐current, whereas it becomes volumetric only when anions can penetrate the semiconductor. Furthermore, the extreme case is explored in which anions remain stationary within the electrolyte. In this scenario, achieving a reasonable ON/OFF ratio necessitates an ion density within the electrolyte that is two orders of magnitude higher than the dopant density of the semiconductor. This work underscores the substantial influence of counter anions on OECT performance, highlighting their critical role in shaping device behavior.


Introduction
Organic Electrochemical Transistors (OECTs) have garnered significant attention due to their potential in modern electronics.They hold a unique set of advantages, such as a low operating voltage, [1] flexibility, [2] scalability, and cost-effectiveness. [3]hese qualities make OECTs attractive for a range of applications, including electronics, [4] bioelectronics, [5] biosensors, [6] and neuromorphic. [7]However, OECTs come with their own set of DOI: 10.1002/aelm.202300766challenges [8] including stability and reversibility issues, manufacturing complexities, and the need for optimization in specific applications. [9]Addressing these challenges is crucial to exploit the potential of OECT technology fully.
To enhance the OECT's performance, various organic conductive, or semiconductive materials were tested.Among them, the PEDOT:PSS (poly (3,4ethylenedioxythiophene) polystyrene sulfonate) has garnered the most significant attention. [10]It is a soft organic material with useful electrochemical properties, flexibility, and biocompatibility, [11] and is of the nominally-on type OECTS.The PEDOT:PSS is intrinsically P-doped, with the fixed PSS anion being the dopant molecule.However, it is interesting to note that while the bulk of the conductive layer of OECTs has received considerable attention in research, the nature of the electrolyte, and ionic conduction within it has often been overlooked or understudied.This paper focuses on an unexplored aspect of OECT behavior -the role of the electrolyte's counter-ions (i.e., anions here or the Cl − in NaCl electrolyte solution).
In PEDOT:PSS based OECTs, the basic role of the primary ions (cations) is relatively well-established [12] as their presence in the bulk is regulated by the gate voltage.When the gate bias is beyond the threshold voltage, it pushes cations into the semiconductor's bulk.These cations entering the bulk compensate for the PSS anions P-doping, reduce the hole density, and lead to a significant reduction in current.Conversely, when the gate voltage falls below the threshold, cations are drawn toward the gate, vacating the bulk, and reactivating the P doping or the high conductivity state.An excellent simulation account of the processes discussed above can be found in a series of papers by the Lussem group, some of which are ref.[13] In contrast, the interaction between the electrolyte's counter ions (i.e., anions) and the P-doped semiconductor remains an unexplored frontier. [14]We conducted a simulation study to fill this knowledge gap using an OECT featuring a PEDOT:PSS like bulk (i.e., P-doped semiconductor).By observing the anions in different scenarios, we identify the conditions that result in the highest transconductance and gain insights into the role of the counter ion, considered secondary, in impacting the OECT performance.We will discuss how our findings offer insights into OECT design and operation optimization, bringing us closer to harnessing the full potential of this technology in various applications.

Simulation Setup
We used TCAD Sentaurus simulation tool to model a 2D OECT with the layout and dimensions shown in Figure 1a.To achieve a threshold voltage (V t ) close to zero, we set the gate work function to be 0.4 eV larger than the drain and source work functions.We modelled the P-type semiconductor using a HOMO level that is 0.1 eV above the source/drain contacts (i.e., 0.1 eV injection barrier of Schottky contacts).In most of the simulations, we employ a moderate doping level of 10 18 cm −3 .For densities of 10 20 cm −3 and above, we expect one would need to account for the density-dependent activity coefficient, [15] which is equivalent to using Fermi statistics or the general Einstein relation for electrons and holes. [16]e examined three types of OECTs differing in anion mobility, as illustrated in Figure 1b-d: 1) An OECT where anions can move freely within the electrolyte but are blocked by the semiconductor material.2) An OECT allow anions to move freely within the electrolyte and penetrate the semiconductor.3) An OECT with static, immobile anions.In all three devices, cations from the electrolyte have unrestricted mobility and can penetrate the semiconductor.Both ion types have reflective boundary conditions at the gate and the drain and source electrodes, meaning they are neither injected into nor absorbed by the contacts; and their quantity within the device remains constant.These boundary conditions simulate a device in which the ions originate from the electrolyte, rather than being a result of reactions with the gate electrode.In a device of this nature, the thicknesses of both the electrolyte and the bulk impact the magnitudes of currents within the device.However, it's crucial to emphasize that the conclusions presented in this work remain independent of these specific dimensions.
We applied a drain voltage of −0.1 V and set the source voltage to 0 V. Initially, we imposed a gate voltage of −2 V to reach a steady state.Afterward, we performed a V GS scan from −2 to 1.1 V. We selected diffusion coefficients of 10 −7 cm 2 s for the ions in the electrolyte and 10 −9 cm 2 s in the semiconductor.For these diffusion coefficients, we chose a V G scan rate of 1 V s to ensure the device is in a quasi-steady-state and that no hysteresis would form.The charge mobility in the semiconductor was taken to be 10 cm 2 V −1 s −1 , while the diffusion coefficient was calculated by the Einstein relation.Further parameters of the simulated PE-DOT:PSS layer are described in Table 1.

Results
In Figure 2, we can observe the transfer (I D − V GS ) characteristics for the two scenarios where anions can move (Figure 1b,c).These OECTs exhibit an ON/OFF ratio of ≈10 4 .The threshold voltages, at which the transconductance reaches maximum, for the devices with anions blocked (red line) and unblocked (green line) by the semiconductor, are 0.46 and −0.02 V, respectively.Notably, there is a positive difference in the fermi levels between the gate and bulk, which causes cations to be attracted to the gate.Consequently, both transistors are expected to be at the ON state near V GS ≈ 0 V.In these two curves, it becomes evident that there are two steps in the current slopes, a phenomenon we will elaborate on later in this paper.
As Figure 2 shows, for the scenario where the anions (i.e., the counter ions) can penetrate the semiconductor (green line), the ON state is better held till V GS = 0 V.To understand the difference at the ON state between anion blocking and nonblocking semiconductor, we plot in Figure 3 and Figure 4 the respective anions and holes densities.At this ON state, the cations are pulled into the electrolyte and accumulate close to the gate electrode.In the device where the semiconductor blocks the anions (Figure 3), the charge distribution at the ON state resembles that of an electrolyte-gated transistor. [17,18]Like in the electrolytegated transistor, the gate at the ON state repels the anions and as a result, the anions accumulate near the electrolyte-semiconductor interface (Figure 3b,d).Consequently, the holes in the semiconductor are pulled to the negative anions at the interface and a channel of hole accumulation forms on the semiconductor side of this interface (Figure 3a,c).At gate voltages below −1 V, this surface current surpasses the volume current by an order of magnitude.At a gate voltage of −0.1 V, both surface and volume currents are equal, while at 0 V gate voltage, the surface current accounts for more than a third of the total current (Figure 3e).For the scenario in which the anions can penetrate the bulk (Figure 4), we see a different charge distribution for the ON state.In this scenario, the anions penetrate and gradually distribute in the semiconductor with higher density near the source region (Figure 4b,d).Note that the anions' density can be well above the doping density of 10 18 cm −3 .Correspondingly, the holes follow the anions and distribute gradually throughout the bulk (Figure 4a,c).There is some hole accumulation near the electrolyte, but contrary to the scenario in which the bulk blocks the anions, the density of the holes in the interface is lower, and diminishes toward the drain.In this case, there is a volumetric cur- rent (Figure 4e) and not a surface current at the semiconductorelectrolyte interface.
In the OFF state, the currents in both devices with the mobile anions converge (Figure 2).Therefore, we present below Figure 5 the results specifically for the device where ions cannot penetrate the substrate, which also holds true for the device with anions that can penetrate the bulk.When the gate voltage exceeds the threshold voltage and the transistor enters the OFF state, the gate attracts the anions and repels the cations.As a result, anions gather near the gate, forming an accumulation layer (not shown), and the semiconductor is filled with cations.
Figure 5 describes the cation density, hole density, and electric field distributions at the OFF state (V G = 1 V). Figure 5a to Figure 5c are for V D = −0.1 V while Figure 5d to Figure 5f are for V D = −1 V. Figure 5a,d show that, in the OFF state, the cations are pushed into the semiconductor, and accumulate near the drain (left in Figure 5).Near the drain, the cations accumulate well above the doping density and for the larger drain bias, close to the source, and their density is minimal.Within the bulk between the source and drain there is a region of doping compensation.It is interesting to see that only when a high drain voltage is applied (i.e., −1 V), the cations distribute exponentially in the channel, a phenomenon described in the article by Kaphle V. et al. [19] (Figure 5d).In this high drain voltage scenario, the cations only compensate the dopant near the drain, while the rest of the bulk remains filled with holes at the doping concentration of ≈10 18 cm −3 (Figure 5e).However, due to the drain depletion, there is no current in the device.Note, that this is not the depletion known for standard FETs, where a high electric field evolves to allow the current flow.Here, the ions screen the field, as described in Figure 5c,f, for drain voltages of −0.1 and −1 V, respectively.Comparing Figure 5a,d, we note that larger |V D | draws more cations toward the drain, thus emptying the semiconductor bulk of cations.The result, Figure 5b versus Figure 5e, is that the larger |V D | cancels the de-doping effect and the semiconductor refills with holes.The effect on the transfer characteristics is shown in supporting material Figures S1 and S2 (Supporting Information), which were simulated for channel lengths of 1 and 10 μm, respectively.Note that for V D = −1 V (red line), the ON/OFF ratio dropped to 5 compared to 10 4 for V D = −0.1 V (green line).Moreover, the current for the high drain bias is well above the current for the lower drain bias for any gate bias.Namely, the saturation in the output characteristics has been compromised too.
In Figure 3 to Figure 5, we outlined the mechanisms underlining the JV curves (Figure 2) and the differences between anion (i.e., electrolytes counter ion) blocking and non-blocking semiconductors.A highly important difference in the JV curves is highlighted in Figure 6 where we plot the gate voltage-dependent transconductance (g m ).As expected from the two-step changes in current gradients presented in Figure 2, there are two peaks in the g m .The exact gate bias of the peaks in Figure 6 depends on the choice of electrodes' workfunction, but the features themselves do not depend on them.Comparing the results to simulations reported in ref, [13c] we conclude that the presence of two peaks is associated with the explicit account for anion motion, used here.It is encouraging that the measured data in ref [13c] exhibits two peaks.
To understand the origin of the two peaks one has to consider anion and cation distributions as a function of gate bias (see supporting PPT file).The first (left) peak at lower gate voltages in both scenarios can be elucidated by the reduction in rent caused by the drift of anions toward the gate.In a device where anions penetrate the semiconductor, negative gate voltages prompt the accumulation of anions adjacent to the electrolyte side of the electrolyte-semiconductor interface, leading to the accumulation of holes on the opposite side of the interface.As the gate voltage becomes more positive, the anions migrate toward the gate, diminishing the layer of hole accumulation, and reduce the current.In the device where anions can penetrate the semiconductor, anions present in the bulk attract an excess of holes into the semiconductor under negative gate voltages.The reduction in current during this phase begins when the anion density within the semiconductor decreases, consequently lowering the hole density.Remarkably, this device, where anions can penetrate the semiconductor's bulk, exhibits a steeper slope in the currents or higher g m .This is attributed to the maintenance of bulk neutrality through the coupling of anions and holes, persisting until reaching more positive gate voltages that extract the anions from the bulk.The second peak in g m observed at higher positive gate voltages is ascribed to the decrease in current resulting from depletion due to cations penetrating the semiconductor.This peak affects both scenarios similarly.Consequently, a high transconductance is obtained for the device where the anions can penetrate the bulk.Notably, for this device, the maximum g m occurs close to 0 V, offering an advantage when selecting the transistor's operating point for low V G .
Figure 2 exhibits a relatively ON/OFF ratio of 10 4 that is not a common trait of OECTs.In this context, it is interesting to examine the scenario where the anions are significantly less mobile or the extreme case where they are immobile (Figure 1d).In this scenario, when the ion density in the electrolyte matches the dopant density in the semiconductor, i.e., 10 18 cm −3 in our simulation, in the OFF state, there are insufficient cations entering the substrate to deplete it of holes.So, the current in the OFF state is still significant (Figure 7a, red line).To obtain a better ON/OFF ratio one has to employ an ion density that is significantly higher to solve this issue and ensure an adequate number of cations enter the substrate and deplete it in the OFF state.We increased the ion density in the electrolyte in this scenario to 10 20 cm −3 .
Figure 7a shows the IV characteristic of the static-anion scenario with ion density of 10 18 cm −3 (red line), 10 19 cm −3 (green line), and 10 20 cm −3 (blue line) in the electrolyte.Relative to the mobile-anion scenarios, the ON/OFF ratio in the static-anion scenario is considerably smaller; even with 100 times higher ion density in the electrolyte, the ON/OFF ratio is smaller by a factor of 100.Within the specified voltage range, in this static-anion scenario, there is no reaching absolute ON or OFF states.We can see a continuous dependence of the current along the gate voltages.
To understand the nature of the ON state, we plot the hole density distribution (Figure 7b).In the ON state, as at V G = 0 V, the cation density in the channel is negligible, with most cations bound to the static anions.Some cations also accumulate near the gate due to the negative built-in potential.In the ON state, the holes form a narrow accumulation channel adjacent to the interface with the electrolyte that carries most of the current (Figure 7b).This behavior is similar to a simple MOS transistor operating in accumulation mode.
Moving to the OFF state, V G = 1V.Figure 7d shows the cation density distribution in the device at the OFF state ( V G = 1V).Un-like the simulations by the Lussem group, [13] in our simulations, the gate electrode is not capable of injecting cations into the electrolyte, and the cations injected into the semiconductor are only those preexisting in the electrolyte.Since the anions are not able to redistribute to compensate for the electric field that builds up, only a small fraction of cations, at the vicinity of the semiconductor interface, are released.Note that despite the gate voltage being +1 V, most of the injected cations are still bound close to the interface (the cyan thin region in Figure 7d).Figure 7e is a zoom on the semiconductor region, and it shows that the maximum density of cations within the semiconductor is 2 orders of magnitude lower compared to their density within the electrolyte.The holes density in Figure 7c corresponds to the cations density in Figure 7d, and we note again that the OFF state is established by a depletion region that extends from the drain electrode.

Conclusion
In this comprehensive study of organic electrochemical transistors (OECTs), we have explored the critical impact of anion motion within the device architecture on its operational characteristics.Our research has revealed intriguing insights into the behavior of OECTs, shedding light on their functionality in both ON and OFF states.We started our study assuming the anions and cations are equally mobile and checked for the effect of the semiconductor being anion-blocking or not.Our analysis of ON/OFF ratios indicated that the presence or absence of anion penetration to the bulk has a negligible effect on these ratios.However, when anions can penetrate the semiconductor, we observed that the OECT exhibits its highest transconductance.By allowing the anions to penetrate the semiconductor, the transconduc- tance increased from g m ≈7 S m to g m ≈31 S m (Figure 6).Therefore, the OECT with the penetrate-to-the-bulk anions offers optimal performance.While the two peaks in the transconductance were observed experimentally [13a] it is not an abundant feature.One of the reasons could be associated with the two peaks spanning across two volts, and thus, not the full range may fall within the electrolytes stability window of a given device.
In the ON state, we observed distinct behaviors in response to anions movement.When anions are blocked from entering the semiconductor, there is a high density of anions at the electrolyte/semiconductor interface that induces a narrow hole accumulation channel on the surface of the bulk-electrolyte that carries a large portion of the current.Namely, a significant proportion of the current is attributed to the surface rather than solely to the bulk, as is commonly believed.In contrast, when anions permeate the bulk, they distribute within it, causing a corresponding distribution of holes, and the current is indeed a bulk phenomenon.
Next, we studied the effect of the anions being less mobile and examined the extreme case where they are immobile.In the case where anions remained static, we observed a noteworthy phenomenon.All the transistor parameters degrade.A reduction of the current beyond a factor of 10 is only achieved once the ion density within the electrolyte is raised by two orders of magnitude.This last result does not agree with reports by the Lussem group. [13]The difference arises from the fact that in their simulations, the gate electrode is taken to be an ohmic contact for cations, and in ours, it is a non-interacting contact.This difference highlights the importance of the electrochemistry at the gate electrode, which will be a topic of a following publication.

Figure 1 .
Figure 1.a) The simulated OECT structure and dimensions.The semiconductor is P-doped to mimic PEDOT:PSS and the dopants (immobile PSS anions) are not shown.The electrolyte solution contains cations (grey diamonds) and anions (green diamonds).The simulated scenarios with respect to the electrolyte's cations and anions (counter-ions): b) an OECT with moving anions blocked by the semiconductor, c) an OECT with moving anions that can penetrate the semiconductor, and d) an OECT with static anions in the electrolyte.In all three devices (b-d), cations have unrestricted mobility and can penetrate the semiconductor.

Figure 2 .
Figure 2. Transfer (I D V GS ) characteristic of the OECT with the anions free to move and are either blocked by the semiconductor (red) or can penetrate it (green), at V DS = − 0.1 V.The ion density in the electrolyte is 10 18 cm −3 for both scenarios.

Figure 3 .
Figure 3.The anion, hole, and current densities at V GS = 0 V and V DS = − 0.1 V for OECT with mobile anions that are blocked by the semiconductor: The a) hole and b) anion densities in the semiconductor and the adjacent electrolyte region, near the source (red), in the middle of the bulk (green) and near the drain (blue).2D graph of the c) hole, d) anion, and e) current densities in the semiconductor and the electrolyte adjacent to the interface (y = 1μm).The dashed lines in (c,d) indicate the sampling point corresponding to figures (a,b).

Figure 4 .
Figure 4.The anion, hole, and current densities at V GS = 0 V and V DS = − 0.1 V for OECT with mobile anions that can penetrate to the semiconductor: The a) hole and b) anion densities in the semiconductor and the adjacent electrolyte area, near the source (red), in the middle of the bulk (green, and near the drain (blue).2D graph of the c) hole, d) anion, and e) current densities in the semiconductor and the electrolyte adjacent to the interface (y = 1μm).The dashed lines in c,d) indicate the sampling point corresponding to figure (a,b).

Figure 5 .
Figure 5. 2D graphs for OECT with mobile anions in the semiconductor and the electrolyte adjacent to the interface (y = 1μm) at V GS = 1 V: The a) cation and b) hole densities, and the c) electric field at V DS = − 0.1 V, and the d) cation and e) hole densities, and the f) electric field at V DS = − 1 V.

Figure 6 .
Figure 6.The transconductance normalized to the bulk width of the two scenarios -OECT with mobile anions that are blocked by the bulk (red), and OECT with moving anions that can penetrate to the bulk (green), at V DS = − 0.1 V.The coordinates of the max transconductances are noted.

Figure 7 .
Figure 7.For OECT with static anions in the electrolyte at V DS = − 0.1 V: a) I D V GS characteristic for ion density in the electrolyte of 10 18 cm −3 (red), 10 19 cm −3 (green), and 10 20 cm −3 (blue).2D graph for ion density of 10 20 cm −3 of the b) hole density on the ON state at V GS = 0 V, c) hole density on the OFF state at V GS = 1 V, and d) cation density on the OFF state at V GS = 1 V for the whole device and e) zoom in on the semiconductor and the electrolyte adjacent to the interface (y = 1μm).

Table 1 .
The PEDOT:PSS parameters used for the simulations.