1/f Noise in Synaptic Ferroelectric Tunnel Junction: Impact on Convolutional Neural Network

In recent years, neuromorphic computing has been rapidly developed to overcome the limitations of von Neumann architecture. In this regard, the demand for high‐performance synaptic devices with high switching speeds, low power consumption, and multilevel conductance is increasing. Among the various synaptic devices, ferroelectric tunnel junctions (FTJs) are promising candidates. While previous studies have focused on improving reliability of FTJs to enhance the synaptic behavior, low‐frequency noise (LFN) of FTJs has not been characterized and its impact on the learning accuracy in neuromorphic computing remains unknown. Herein, the LFN characteristics of FTJs fabricated on n‐ and p‐type Si along with the impact of 1/f noise on the learning accuracy of convolutional neural networks (CNNs) are investigated. The results indicate that the FTJ on p‐type Si exhibits a far lower 1/f noise than that on n‐type Si. The FTJ on p‐type Si exhibits a significantly higher learning accuracy (86.26%) than that on n‐type Si (78.70%) owing to its low‐noise properties. This study provides valuable insights into the LFN characteristics of FTJs and a solution to improve the performance of synaptic devices by significantly reducing the 1/f noise.

DOI: 10.1002/aisy.202200377 In recent years, neuromorphic computing has been rapidly developed to overcome the limitations of von Neumann architecture. In this regard, the demand for high-performance synaptic devices with high switching speeds, low power consumption, and multilevel conductance is increasing. Among the various synaptic devices, ferroelectric tunnel junctions (FTJs) are promising candidates. While previous studies have focused on improving reliability of FTJs to enhance the synaptic behavior, low-frequency noise (LFN) of FTJs has not been characterized and its impact on the learning accuracy in neuromorphic computing remains unknown. Herein, the LFN characteristics of FTJs fabricated on n-and p-type Si along with the impact of 1/f noise on the learning accuracy of convolutional neural networks (CNNs) are investigated. The results indicate that the FTJ on p-type Si exhibits a far lower 1/f noise than that on n-type Si. The FTJ on p-type Si exhibits a significantly higher learning accuracy (86.26%) than that on n-type Si (78.70%) owing to its low-noise properties. This study provides valuable insights into the LFN characteristics of FTJs and a solution to improve the performance of synaptic devices by significantly reducing the 1/f noise. ferroelectric layer, [24] and high pressure forming gas annealing conditions. [25] Although the excellent performance of FTJs allows them to be successfully integrated into neuromorphic systems acting as synaptic devices, the reliability of FTJs must be further improved. For instance, FTJs exhibit poor retention characteristics and cycling endurance. [26][27][28] To solve these problems, extensive studies have been conducted to analyze the physical origin of the failure mechanism under various conditions. Failure has been attributed to defects in the ferroelectric and dielectric layers, including oxygen vacancies, hydrogen, carbon, nitrogen atoms, and grain boundaries. [29][30][31] Additionally, these defects are known to generate 1/f noise. [31] In semiconductor devices, carrier trapping/detrapping processes and mobility fluctuation are known to generate low-frequency noise (LFN) such as 1/f noise and random telegraph noise whose magnitude far exceeds that of white noise such as thermal noise and shot noise. [32] In fieldeffect transistors (FETs), the defect inside the gate oxide is known to generate the LFN by inducing carrier number fluctuation. [33][34][35][36] In semiconducting resistors or metals, however, carrier mobility fluctuated by the defect in the conduction path generates 1/f noise. [37][38][39] 1/f noise limits the performance, reliability, and survivability of semiconductor devices. [40][41][42] Furthermore, because the impact of 1/f noise cannot be reduced by increasing the averaging time, this noise acts as a performance-limiting factor in signal detection and processing.
Recently, 1/f noise in synaptic devices such as resistive and phase-change memristors has been reported to degrade the learning accuracy of neuromorphic computing. [43,44] However, there have been no reports on the impact of 1/f noise in FTJs on learning accuracy. Therefore, the impact of 1/f noise of an FTJ on learning accuracy must be systematically analyzed, and a solution for reducing the 1/f noise of the FTJs must be developed for performance enhancement.
One way to modulate the properties of MFIS-stacked FTJs, including the TER ratio and polarization, is to change the bottom electrode (n þ -or p þ -type Si). [45,46] Researchers have attempted to clarify the physical origin of these differences. However, their approaches have limitations because they were based on simulations, and the traps and defects, which significantly affect the conduction of the FTJ, were not considered. [45,46] In addition, both the LFN characteristics of FTJs fabricated on n-and p-type substrates and their impacts on the learning accuracy of neuromorphic computing have not been studied and require further investigation.
Following the above discussion, in this study, we investigate and compare the LFN characteristics of MFIS (TiN/pure HfO x /SiO 2 /Si) FTJs fabricated on n-and p-type Si substrates. Because of its resistance to thermal instability and dopant fluctuation, pure HfO x is employed as a ferroelectric layer. [23] The main body of this work comprises two main parts. In the first part, we investigate the LFN characteristics of FTJs from the perspective of the conduction mechanism. LFN spectroscopy is a useful tool for analyzing the conduction mechanism and carrier transport processes in semiconductor devices. By adopting LFN spectroscopy in FTJs fabricated on different substrates, we demonstrate that not only the conduction band electron (CBE) but also the valence band electron (VBE) should be considered in the operation of FTJs. In addition, the effects of different carrier types on LFN characteristics are rigorously investigated. From the perspective of the neuromorphic application, 1/f noise of the synaptic FTJs can degrade the learning accuracy of the system, as reported in the case of synaptic RRAM. [43] Therefore, in the second part, we provide an accurate model to quantitatively evaluate the effects of 1/f noise on the convolutional neural network (CNN) in terms of read variation. Through a systematic investigation in the first part, we demonstrate that the FTJs fabricated on a p-type substrate exhibited approximately 100 times less 1/f noise than those on n-type Si. Owing to the low-noise characteristic of the FTJ fabricated on a p-type substrate, a far higher learning accuracy than that of the FTJ fabricated on an n-type substrate is achieved. This study provides a physically solid foundation for understanding the LFN characteristics of FTJs and an effective method for fabricating low-noise FTJs suitable for synaptic devices.

Ferroelectricity of Fabricated Ferroelectric Tunnel Junctions
FTJs were fabricated on two different substrates (6 inch heavily n þ -and p þ -doped Si) to investigate the effect of the bottom electrode doping type. The FTJs were formed with identical stack structures, except for the doping type of the bottom electrode. In this study, pure HfO x is used as the ferroelectric layer. For HfO x -based materials with ferroelectricity, a noncentrosymmetric orthorhombic (o-) phase is required. The most widely used method is either to dope HfO x with metallic ions, such as Al, Si, La, and Y, or to form layer-by-layer hafnium zirconium oxide (HZO). However, while the former suffers from dopant variation, the latter has a problem of thermal instability in that the ferroelectricity of HZO disappears at a temperature higher than 600°C. [23] In this work, we adopt pure HfO x to solve these problems. To form an o-phase in pure HfO x , HfO x is exposed to the RTA process. Thermal expansion/contraction during the rise/fall of heat induces tensile stress in the HfO x layer owing to the different thermal expansion coefficients of TiN, HfO x , and Si. In particular, the quick falling time of RTA (8.3 s/100°C) during the cooling process induces stress to form an o-phase in HfO x . In addition, its definite remnant polarizations are distinguished even in thin layers with thicknesses < 10 nm. Therefore, it is well suited for regulating TER in FTJ applications. In addition, pure HfO x has a significantly higher resistance to thermal instability and dopant fluctuations than doped HfO x . [23] Figure 1a shows a transmission electron microscopy (TEM) image of the fabricated FTJ device. Pure HfO x (7 nm) serves as the dipole switching layer, and SiO 2 (1 nm) serves as the tunneling layer. The FTJs are 100 Â 100 μm 2 in size. This MFIS stack structure is well suited for FTJ operation because tunneling can be easily controlled according to the dipole direction. X-ray photoelectron spectroscopy analysis confirmed the composition ratio of HfO x , as shown in Figure 1b. The Hf:O ratio is 1:1.75 (x = 1. 75). This Hf-rich layer was engineered to facilitate the formation of an orthorhombic phase with a noncentrosymmetric structure. Note that the ferroelectric orthorhombic phase is preferred in oxygen-deficient layers, whereas oxygenrich films could initiate larger monoclinic grains. [19] Figure 1c depicts the grazing-incidence X-ray diffraction (GIXRD) pattern, which indicates the crystal phase of HfO x . The diffraction pattern confirms the crystallinity of the orthorhombic phase with o(111) and o(002) peaks. The polarization current versus voltage plot obtained via the positive-up-negative-down (PUND) pulse method, which helps eliminate leakage and transient current components, is presented in Figure 1d. The polarization (P r ) versus voltage curve was extracted from PUND measurements, as shown in Figure 1e. The difference in the 2P r value between the FTJs fabricated on n-and p-type Si is negligible (27.8 μC cm À2 for both n-and p-type Si). This confirms that the top stack has the same ferroelectricity regardless of the doping type of the substrate. Consequently, the difference in the polarization of the ferroelectric layer can be excluded from the variables in FTJ operation. In addition, the FTJ fabricated on p-type Si exhibited a slightly higher coercive voltage than that fabricated on ntype Si. The FTJ on n-type Si exhibits larger positive and negative coercive biases (AEV C ) than that on p-type Si. The difference in the magnitude of V C stems from their different trapping behaviors. While the CBE is dominant in determining the conduction from Si to TiN in the FTJ on n-type Si, the VBE is dominant in the FTJ on the p-type Si. The reason for this is discussed later. Therefore, in FTJ on n-type Si, electron injection from Si is considerably easier than that from p-type Si. In the case where electrons are trapped at the HfO 2 /SiO 2 interface, a large electrical field is applied to HfO x , decreasing þV C . Similarly, a small ÀV C value is observed because of the trapped electrons at the HfO 2 /SiO 2 interface. Note that the difference between V C values is larger in the positive V region. This originates from the depletion of p-type Si when the positive V is applied.  Figure 2a,b were measured using DC double sweep. Note there is a difference in the negative voltages where peak current response is observed between Figure 1d and 2b. This originates from the different measurement methods. While the results in Figure 2b are obtained from DC measurement, those in Figure 1d are obtained by PUND measurement with a frequency of 10 4 Hz. Figure S1a,b, Supporting Information, shows the I T -V curves of the five independent FTJs fabricated on n-and p-type Si, respectively. For both the devices, the FTJs exhibit excellent uniformity. Figure 2c shows the average I T -V results for the five FTJs  For both the devices, the FTJs exhibit anticlockwise hysteresis. The FTJ on p-type Si exhibits the larger negative voltage where peak current response is observed: FTJ on n-type Si: À0.20 V and FTJ on p-type Si: À0.51 V. This is due to the different trapping behaviors and thermal equilibrium between the two devices. The working principle of the FTJs can be explained as follows. For the FTJ on n-type Si, when À2.0 V is applied to TiN, HfO x is polarized in the TiN direction (P r < 0). This state is referred to as the HRS. When 4.4 V is applied, the polarization direction is reversed (P r > 0), which decreases the tunneling barrier height for electrons in Si, thereby resulting in an LRS. These results correspond to the TCAD simulation results, as shown in Figure 2d. However, the anticlockwise hysteresis behavior of the FTJ on p-type Si cannot be explained by the results of simulations where only the depletion and accumulation of the majority carriers (holes) in p-type Si are considered. [45] If only the majority carriers are considered, the tunneling barrier for hole carriers is higher under positive polarization than that under negative polarization. Therefore, the opposite dependence of the polarization polarity on LRS/HRS should be observed in the FTJ on p-type Si, as shown in Figure 2e. However, the FTJs on n-and p-type Si exhibit the same polarization dependence. In addition, the TER ratios of the FTJs on n-and p-type Si should be similar according to the results of the simulation, which considers only the flow of the majority carriers in each device. This contradicts the measurement results, wherein the FTJ on n-type Si had a larger TER ratio than that on p-type Si, as shown in Figure 2f.

Electrical Properties of Ferroelectric Tunnel Junctions on n-and p-Type Si
Such discrepancies should be properly addressed by considering VBE. [34,35] The need to introduce VBE is explained as follows.
The difference in the current density between the FTJs on n-and p-Si is only %10 times that of the HRS. If only the CBE contributes to the conduction of FTJs, the difference should be significantly larger because the current density of the CBE is considerably low in the FTJ on p-Si. This small difference stems from the contribution of VBE to the conduction of the FTJ on the p-type Si. [45] In addition, the differences in the related transmission probability and defects governing the conduction should be considered. Figure 2g shows the band diagram of the MFIS-stacked FTJ, which considers electron tunneling from the conduction band (CBE), VBE, and hole tunneling from the valence band (VBH). For the FTJ on n-type Si, the CBE plays a dominant role in determining the overall conduction because the current density of the VBE is far lower than that of the CBE because of the higher tunneling barrier (ϕ VBE > ϕ CBE ). Therefore, when the polarization is reversed from the negative to positive direction, the current density of the CBE is significantly increased by the lowered tunneling barrier. By contrast, the current density of the VBE remains almost unchanged and does not contribute to the TER ratio. Owing to the higher Fermi level in n-Si, the strong supply capability of tunneling electrons in the valence band compensates for the change in Ф BE generated by the change of P r , implying an intrinsically small TER ratio for VBE. Hence, the current density of the VBE remains almost unchanged and does not contribute to the TER ratio.
By contrast, for the FTJ on p-type Si, the TER ratio is determined not by CBE or VBH but by VBE. The current density www.advancedsciencenews.com www.advintellsyst.com of the CBE is considerably smaller than that of the VBH or VBE. Thus, the change in the CBE owing to the change in P r cannot contribute to the TER ratio modulation. If VBH dominates the FTJ current on p-type Si, the polarization dependence of the LRS and HRS should be flipped, as shown in Figure 2e. However, this only occurs when the energy band in the oxide and semiconductor bends significantly upward, owing to a sufficiently large negative value of P r or ϕ M . It is difficult to produce such a large P r in thin ferroelectrics, as well as an adequate metal electrode with a sufficiently large ϕ M . Therefore, the contribution of the VBE should be considered the primary component that determines the TER ratio in the FTJ on p-type Si. In the case of VBE, the current density increases when P r < 0 and decreases when P r > 0, which is the same behavior as that of the CBE. Thus the FTJ on p-type Si exhibits the same polarization dependence as that on n-type Si.

LFN Characteristics of Ferroelectric Tunnel Junctions on n-and p-Type Si
Traps/defects must be considered to fully understand the conduction mechanism of FTJs. In this regard, the temperature dependence of the I T -V results was investigated. Figure 3a,b shows the I T -V results for the FTJs fabricated on n-and p-type Si, respectively, at different temperatures (T s ). The device-to-device variations are illustrated in Figure 2 and 3. It has been reported that the conduction of the FTJ in the LRS is determined by the Poole-Frenkel (PF) emission. [31] The PF emission model is expressed as follows where μ is the electron drift mobility; N C is the density of states in the conduction band; qФ T is the trap energy level; and E is the electric field. Figure 3c,d shows the ln(I/V ) versus V 1/2 fitting results for the FTJs on n-and p-type Si in the LRS, respectively. For both the FTJs, the obtained results are in good agreement with those obtained from the PF emission model. To extract the trap energy level, an Arrhenius plot, that is, ln(I/(V Â T 3/2 )) versus 1/T, was obtained, as shown in Figure 3e. Figure S4, Supporting Information, shows the Arrhenius plots for different values of V READ . The trap energy level depends on the substrate type. The trap energy level of the FTJ on n-type Si (0.46 eV) is smaller than that of the FTJ on p-type Si (0.84 eV). Each trap in the FTJs on n-and p-type Si stems from interstitial hydrogen [31] and carbon [47] atoms, respectively.  www.advancedsciencenews.com www.advintellsyst.com Next, we investigated the LFN characteristics of the FTJs. Figure 4a,b shows the normalized tunneling current power spectral density (PSD) (S IT /I T 2 ) of the FTJs fabricated on n-and p-type Si, respectively. The S IT /I T 2 results for the FTJs were measured with an increase in V READ to investigate the effects of bias conditions on the LFN characteristics and conduction mechanisms. The average I T for each PSD measurement is presented in the legend. The detailed methodology used to measure the PSD is presented in Figure S5, Supporting Information. For both devices, the LFN characteristics are determined by the 1/f γ behavior, where γ is defined as -lnS IT /lnf. Figure 4c shows the averaged S IT /I T 2 results for the FTJs fabricated on n-and p-type Si. The PSDs were measured for four additional independent devices ( Figure S6 and S7, Supporting Information). As shown in Figure 4c, the FTJ on n-type Si exhibits a far larger 1/f noise (1.01 Â 10 À6 /Hz at f = 10 Hz) than that on p-type Si (5.48 Â 10 À9 /Hz at f = 10 Hz). In addition, the γ value of the FTJ on n-type Si (1.09) is larger than that of the FTJ on p-type Si (0.80). Figure 4d,e shows the results for S IT /I T 2 sampled at 10 Hz and γ for the five FTJs fabricated on n-and p-type Si, respectively, versus I T . For both devices, S IT /I T 2 decreases with an increase in I T , which can be explained by the noise model of the PF emission. This model can be expressed as follows. [48] where N D is the trap density; ε Si is the permittivity of the Si; A is the ratio of trap time constants; and W and L are the width and length of the FTJ, respectively. The values of β are 0.009 and 0.02 cm 1/2 V À1/2 for pure PF emission and PF emission accompanied by thermal emission, respectively. Because E increases with V READ (I T ), S IT /I T 2 decreases with increasing I T . However, PF emission alone cannot fully explain the different LFN characteristics of the FTJs on n-and p-type Si. Significantly lower magnitudes of S IT /I T 2 and γ for the FTJ on p-type Si are observed because of the larger impacts of direct tunneling (DT) and trap-assisted tunneling (TAT) in the SiO 2 layer and the smaller impact of PF emission. When the DT and TAT govern the conduction mechanism of the FTJs, shot noise is dominant even in the low-frequency domain. This is because the magnitude of the shot noise is amplified by the Fano factor (F); 2qIÂF. When the time constant governing the trap-to-TiN tunneling process at low currents is shorter than that of Si-to-trap tunneling, the shot noise is enhanced (F > 1). In the supplementary information, we have added the PSD of the FTJs operating in the HRS whose LFN characteristics are determined by the shot noise ( Figure S8, Supporting Information).
As shown in Figure 4a,b, while the slope of PSD is one (1/f γ noise with γ = 1) in the FTJ on n-type Si, γ of the FTJ on p-type Si is considerably smaller than one. This is because the conduction of carriers in the FTJ on the p-type Si in the LRS is not only affected by the PF emission (1/f noise) but also by the DT/TAT (shot noise). [49] Note that γ smaller than one does not stem from the noise floor of the measurement system. As shown in Figure R1-2, the noise floor of the measurement setup is 4Â10 À27 A 2 Hz À1 that can measure S IT /I T 2 down to 10 À13 /Hz at 100 nA. Therefore, it can be concluded that the γ smaller than one stems from the shot noise, demonstrating that the  www.advancedsciencenews.com www.advintellsyst.com conduction mechanism of the FTJ on the p-type FTJ is not only affected by the PF emission but also by the DT/TAT. Figure 5a shows the band diagram of FTJs in the LRS on n-and p-type Si and explains the conduction mechanism at a low V READ . Because the FTJ on n-type Si has a shallow trap energy level (0.46 eV) and the governing carrier type is CBE, PF emission is dominant in determining the conduction mechanism even at a low V READ . By contrast, a considerably higher bias is needed in the FTJ on p-type Si for the alignment of the VBE and trap governing PF emission. Therefore, the conduction of VBEs is dominated by DT from Si to HfO x and TAT in HfO x before the electrons are transferred to TiN via PF emission at a low V READ (Figure 5a-1). Therefore, S IT /I T 2 of the FTJ on p-type Si is smaller than that of the FTJ on n-type Si because the effective N D for PF emission in the FTJ on p-type Si is smaller due to the smaller influence of the PF emission. With an increase in V READ , the PF emission becomes more dominant as the VBH is far more significantly affected by the traps governing the PF emission, as shown in Figure 5a-2. This is why different slopes in the plot of the γ versus I T between the FTJs on n-and p-type Si are observed in in Figure 4e. F exhibits a strong V READ dependency, where F decreases with increasing V READ . This is because the increasing V READ has the effect of speeding up the tunneling of electrons from Si to the trap, causing the trapped electrons to wait for the detrap and decreasing the magnitude of F to one. Therefore, as shown in Figure 5a-2, when V READ increases, the F decreases exponentially. Accordingly, γ increases to one owing to the decreased impact of shot noise (DT and TAT). The results also correspond to the energy diagrams shown in Figure 5a-1,a-2. With increasing V READ in FTJs on p-type Si, owing to the increasing slope in the HfO x , impact of DT and TAT decreases and that of the PF emission increases.
In summary, the conduction of the FTJ on n-type Si is governed primarily by the CBE through PF emission, whereas that of the FTJ on p-type Si is governed by the VBE through the combined effects of DT, TAT, and PF emissions. As shown in Figure 5b, DT is the dominant conduction mechanism for a wider bias range in the FTJ on p-type Si than in n-type Si. The results indicate that the 1/f noise behavior of FTJs is determined by the interplay between the PF emission and DT/TAT. As the proportion of the PF emission contributing to carrier conduction increases, both the magnitude of the noise and γ increase.

Impacts on 1/f Noise of Ferroelectric Tunnel Junctions on Convolutional Neural Networks
Parallel data processing in neuromorphic computing can be accomplished via vector-matrix multiplication (VMM) based on Ohm's and Kirchhoff 's laws. Synaptic devices are necessary for correct VMM because they can accurately modify conductance states via analog conductance modulation. [7][8][9][10] Because FTJs have multilevel data storage characteristics stemming from partial polarization, they can be used as synaptic devices in neuromorphic computing for CNNs. The synaptic weight reflects the connection of synapses between presynaptic and postsynaptic neurons, as shown in Figure 6a. Figure 6b,c shows the long-term potentiation (LTP) and long-term depression (LTD) characteristics of the FTJs on n-and p-type Si, respectively. Note that the multilevel conductance in FTJs can be achieved by the partial polarization of ferroelectric HfO x . An incremental pulse scheme was used for the linear weight update, which is required for a high learning accuracy. The pulse amplitudes to acquire LTP and LTD increase from 4.0 to 5.5 V in a 0.1 V step and from À2.0 to À3.5 V in a À 0.1 V step, respectively. Note that the pulse width is fixed to 10 μs.
To evaluate the applicability of FTJs as synaptic devices in CNNs, a nine-layer visual geometry group (VGG-9) network [50] was simulated using the Canadian Institute for Advanced Research (CIFAR-10) data set. This VGG-9 network comprises six convolutional layers, three max-pooling layers, and two fully linked layers, as shown in Figure 6d. One max-pooling layer was www.advancedsciencenews.com www.advintellsyst.com employed for every two convolutional layers. The input CIFAR-10 images are 32 Â 32 Â 3 pixels in size. Kernels with three weights are employed for the convolutional layers. When CIFAR-10 pictures were processed via the first and second convolutional layers, the feature maps are 32 Â 32 Â 32 and 32 Â 32 Â 64 pixels in size, respectively. Following the third and fourth convolutional layer operations, 16 Â 16 Â 128 feature maps were generated. Subsequently, the fifth and sixth convolutional layer procedures were used to acquire feature maps with dimensions of 8 Â 8Â 256. The feature maps were connected to the fully connected layers.
As shown in Figure 6e, the VGG-9 networks based on FTJs on n-and p-type Si exhibit accuracies of 88.27 and 88.44%, respectively, for 100 training epochs in simulations when the impact of 1/f noise is not considered. In this case, the FTJs on n-and p-type Si does not exhibit a difference in learning accuracy. In synaptic devices, when certain magnitude of the dynamic range of LTP or LTP characteristics is secured, there is no difference in learning accuracy. However, the 1/f noise of the FTJs results in a read disturbance with a normal distribution, Nðμ ¼ 1, σ 2 Þ. Note that the σ can be calculated from the PSD of FTJs using the following equation.  Figure 6. a) Schematic of biological synapse mimicked by synatic FTJs. LTP and LTD characteristics of the FTJs fabricated on b) n-and c) p-type Si. Note that these characteristics are obtained from five independent samples. d) Schematic of the VGG-9 network for the CIFAR-10 data set. e) Learning accuracy of the VGG-9 networks versus epoch based on FTJs fabricated on n-(black squares) and p-type (red circles) Si. f ) Comparison of the learning accuracies of the VGG-9 networks based on FTJs fabricated on n-(black squares) and p-type (red circles) Si. Open and solid symbols correspond to the cases where the impacts of 1/f noise are considered and not considered, respectively.
where f min = t À1 and f max = (2 t s ) À1 (t s represents the sampling time). As FTJs are scaled down, the 1/f noise increases inversely proportional to the width and length of the FTJs, thereby increasing the impact of 1/f noise. [51] When the size of the FTJs is scaled down by a factor of 5Â 10 4 , the learning accuracy decreases to 78.70%. However, the drop in accuracy is far smaller (86.26%) when FTJs on p-type Si are used because of their low 1/f noise level. Figure 6f shows the comparison of the learning accuracies of the VGG-9 networks based on FTJs fabricated on n-(black squares) and p-type (red circles) Si. Open and solid symbols correspond to the cases where the impacts of 1/f noise are considered and not considered, respectively. Therefore, it can be concluded that the FTJ on p-type Si is preferable to that on n-type Si when the impact of 1/f noise on learning accuracy is considered.
Previous research has focused on increasing the TER ratio of FTJs to increase learning accuracy. [17][18][19][21][22][23][24][25] However, the results of the present study suggest that noise characteristics should be considered when optimizing synaptic devices. Although the TER ratio of the FTJs on p-type Si is lower than that of the FTJs on n-type Si (Figure 2c), the FTJs on p-type Si have a higher learning accuracy owing to their low-noise feature. This finding has crucial implications for the fabrication and operation of FTJs as synaptic devices.

Conclusion
We investigated the LFN characteristics of FTJs fabricated on nand p-type Si. In the former and latter devices, the CBE and VBE are the primary components determining the anticlockwise hysteresis, respectively. Therefore, both devices exhibit the anticlockwise hysteresis. However, the LFN characteristics of the devices depend significantly on the different types of charges that determine conduction. For FTJ on n-type Si, PF emission plays a dominant role in carrier transport, thereby resulting in a large 1/f noise level. In contrast, the FTJ on p-type Si has considerably smaller noise; additionally, in this case, γ is smaller than one as TAT and DT primarily determine the conduction of the device. According to the results, the effects of the 1/f noise of FTJs on the learning accuracy in a CNN were evaluated. The fabricated FTJs exhibited high learning accuracy for the CIFAR-10 data set. However, when the FTJs on n-type Si are used as synaptic devices, the learning accuracy reduces significantly as the device is scaled down, owing to the large 1/f noise level. In contrast, the FTJs on p-type Si exhibit robustness to 1/f noise owing to their low-noise properties. These results provide important guidelines for the fabrication and operation of FTJs as synaptic devices.

Experimental Section
Fabrication Process of Ferroelectric Tunnel Junction: The FTJs were fabricated on two different substrates (6 inch Si with high concentrations of n þ and p þ doping (5 Â 10 19 cm À3 )). After the removal of the native oxide, 1 nm of SiO 2 was formed using a chemical oxidation method in an APM solution (NH 4 OH: H 2 O 2 : H 2 O = 1: 1: 5) at 80°C. This process results in the formation of a homogeneous and extremely thin dielectric layer. Then, using the thermal atomic layer deposition (ALD) technique, a 7 nm thick pure HfO x layer was grown. The ALD process was repeated for 60 cycles with precursor/oxidant feeding and purging at a process temperature of 275°C. Tetrakis (ethylmethylamino) hafnium (TEMA-Hf, UP Chem) was used as the Hf precursor and ozone (O 3 ) was used as the oxidant. Subsequently, 100 nm of titanium nitride (TiN) was deposited using a sputtering apparatus (ENDURA 5500, Applied Materials). Next, using photolithography and an ICP plasma etcher, a quantifiable pattern was created. The HfO x is in its amorphous state at this stage; i.e., it has not yet crystallized and thus functions as a dielectric. A phase transition process is needed to crystallize and convert HfO x to possess ferroelectricity. For this purpose, vacuum-controlled RTA (NYMTECH, N 2 ambient, 800°C, 30 s, 5 Torr) was used to achieve orthorhombic phase crystallization of HfO x .
Electrical Measurement: We investigated the ferroelectricity of FTJs fabricated on n-and p-type Si using a parameter analyzer (Keithley 4200-SCS) and a current-voltage module (4225-PMU). The P-V curves were measured via the PUND method in conjunction with a time-transient measurement using a triangular pulse with a 2.5 kHz frequency. A semiconductor parameter analyzer (B1500A), low-noise current amplifier (SR570), and signal analyzer (35670 A) were used to measure the PSD of the fabricated FTJs. B1500A supplies the voltage to the top gate. The output current is fed to SR570, which converts the current fluctuation into a voltage fluctuation. Finally, 35670 A transforms the SR570 dynamic signal into the PSD.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.