An Efficient Design of TaOx‐Based Memristor by Inserting an Ultrathin Al2O3 Layer with High Stability for Neuromorphic Computing and Logic Operation

New computing‐in‐memory architecture based on memristors can achieve in situ storage and computing of data, which greatly improves the computing efficiency of the hardware system. Here, a reliable bilayer structured TaOx/Al2O3 memristor with a 2 nm Al2O3 insertion layer is demonstrated. This device exhibits stable and gradual switching behavior with a low set/reset voltage (0.61 V/−0.49 V) and multilevel conductance characteristics. It is further indicated that the device has a larger ON/Off ratio (≈148×) and better nonlinearity of conductance modulation by inserting an Al2O3 layer. Various forms of synaptic plasticity are mimicked, such as long‐term potentiation/depression (LTP/LTD), paired‐pulse facilitation (PPF), and spike‐timing‐dependent plasticity (STDP). Based on the quasi‐linear conductance modulation characteristics, excellent classification accuracy (90.4%) is achieved for the applications of handwritten digit recognition. Moreover, the logic operations (intersection, union, and complement) are implemented on a 3 × 5 memristor array, which shows an efficient way to design versatile and reliable devices and provides a novel idea for neuromorphic computing and in‐memory logic operation.


Introduction
With the rapid development of the big data and Internet of Things era, the demand for high-performance intelligent chips is becoming increasingly strong. To break the bottleneck of traditional "Von Neumann" computing architecture in terms of data processing speed and power consumption, digital logic computing [1][2][3] and brain-like intelligent devices [4][5][6][7][8][9] are being extensively researched. Memristors have many advantages such as non-volatility, high speed, high integration density, and compatibility with existing CMOS processes. [10] As artificial synapses, memristors can be used to simulate biological synaptic and logic functions. [11][12][13][14][15][16] Therefore, it is considered the most promising candidate for achieving logical operations and neuromorphic computing. Transition metal oxides are commonly used as resistive switching materials and have been extensively studied due to their good resistance behavior and data retention capability. [17] Nevertheless, the design of memristors with excellent performance and high reliability to expand digital and analog applications still remains a challenge. Different schemes of TaO x memristors have been designed to achieve functional applications. [18][19][20][21] It is noted that the multilayer structure design of memristors plays a significant role in improving the resistance-switching performance and conductance modulation for memristors. [22,23] Al 2 O 3 as an insertion layer can slow the oxygen ion migration rate and optimize the resistance-switching behavior of the memristor. [24][25][26] Therefore, an efficient design of TaO x -based memristor with an inserting Al 2 O 3 layer was put forward.
In this work, Ta/TaO x /Pt memristors with different thicknesses of Al 2 O 3 insertion layer were fabricated. Ta and Pt were used as the top and bottom electrodes, respectively. The resistance-switching stability of Ta/TaO x /Al 2 O 3 /Pt memristors was evaluated. Different electrical pulse schemes were set up to mimic different forms of synaptic plasticity. By adjusting the pulse amplitude, the transition from the short-term memory (STM) to the long-term memory (LTM) of biology is simulated. Handwritten digit recognition based on memristors was verified using an artificial neural network (ANN) simulator. In addition, a nonvolatile logic scheme for digital memory computing was designed based on an array of memristors to perform basic logic operations. This work investigates an efficient way to design versatile and reliable devices with efficient analog neuromorphic computing and digital in-memory logic operations.

Results and Discussion
In order to analyze the effect of the Al 2 O 3 insertion layer, I-V curves were measured on these three devices. Figure 1a shows the electroforming process for three devices with a compliance current of 1 mA. The inset is the structure of the Ta/TaO x /Al 2 O 3 /Pt memristor. As the thickness of Al 2 O 3 increases, the forming voltages are 3.4, 5.3, and 6.4 V. Figure 1b Although the storage window value of Device3 is the largest, the high resistance state distribution is scattered in a large range. The memristor with 2 nm Al 2 O 3 insertion layer exhibits excellent uniformity, which can be observed in Figure 1c. First, the Al 2 O 3 insertion layer can be regarded as a limiting layer of oxygen ion diffusion, [25][26][27] and it can influence the conductance modulation of Ta/TaO x /Al 2 O 3 /Pt memristor, which plays an important role in the resistive switching mechanism and I-V characteristics. The diffusion-limiting effect of the Al 2 O 3 insertion layer on oxygen ions is a critical reason for the performance enhancement of the memristor. Compared with the memristor without Al 2 O 3 insertion layer, the oxygen ions consisting with the CFs are localized in the Al 2 O 3 layer, which accordingly accelerated the formation/disruption of CFs. Therefore, Al 2 O 3 layer with optimal thickness can enhance the performance of Ta/TaO x /Al 2 O 3 /Pt memristor. However, if Al 2 O 3 layer is not inserted with the optimal thickness of 2 nm, as shown in Figure 1d, for the memristor with 4 nm Al 2 O 3 , the poor uniformity will occur. This may be attributed to the fact that the limiting effect of oxygen ion diffusion is enhanced by more Al ions of the Al 2 O 3 layer, which leads to the randomness of the conductive filament connection/disconnection. For the distribution of set and reset voltages, Figure 1f indicates that Device2 has the lowest switching voltages (0.61 V/−0.49 V). The experimental results show that the appropriate thickness of Al 2 O 3 insertion layer is 2 nm. Therefore, Ta/TaO x /Al 2 O 3 (2 nm)/Pt device exhibits such stable and excellent resistance performance, which has great potential to realize conductance modulation and simulate synaptic functions.
To obtain more details of the multilayer structure and elemental composition, the device structure was observed using scanning transmission electron microscopy (STEM), and the chemical element concentrations were qualitatively analyzed by X-ray photoelectron spectroscopy (XPS). Figure 2a shows the STEM image of the Ta/TaOx/Al 2 O 3 (2 nm)/Pt device. The overlaid mapping of Pt, Al, and Ta in the whole device can be seen noticeably from the inset. Figure 2b depicts the line scan images of Ta, Al, O, and Pt elements in the Ta/TaOx/Al 2 O 3 (2 nm)/Pt device, which is fully consistent with the bilayer structure design. The thickness of the TaOx film is also optimal, considering the structure and size of the device. The Ta 4f spectrum of the TaOx film is shown in Figure 2c. Two peaks of Ta 4f 7/2 (26.5 eV) and Ta 4f 5/2 (28.4 eV) can be obtained by peak fitting, with a difference in binding energy of 1.9 eV. According to the reported XPS standard spectrum of TaOx, the composition of the tantalum oxide film is Ta 2 O 5 . [28] Figure 2d shows the O1s spectrum of the tantalum oxide sample. The two peaks appearing at 530. 3  Various forms of synaptic plasticity were simulated based on the Ta/TaO x /Al 2 O 3 (2 nm)/Pt device. As shown in Figure 3a, the device exhibited excellent repeatability during ten continuous cycles of conductance modulation. When continuous positive (0.73 V/4 μs)/negative (−0.84 V/4 μs) voltage pulses are applied, it induces a gradual potentiation/depression of conductance. Compared to ideal devices, our memristors have inevitable non-ideal properties. The average dispersion of the conductance during ten cycles is evaluated, as shown in Figure S1 (Supporting Information). The dispersion coefficients of LTP/LTD were calculated to be 0.017 and 0.025, respectively, which fully confirmed the high cycle-to-cycle (C2C) stability of the Ta/TaO x /Al 2 O 3 (2 nm)/Pt device. Figure 3b presents the results of the nonlinear fit of LTP/LTD, and the details of the nonlinearity calculation can be found in the Supplementary Information. It can be calculated that the nonlinearity ( ) of the LTP/LTD process of the device is 5.50 and 4.81, exhibiting quasi-linear characteristics. [29] For Devices 1 and 3, it is hard to achieve the ideal linear characteristic of conductance modulation ( Figure S2, Supporting Information). Nonlinearity is an important factor in judging the possibility of a memristor simulating the biological synapse, which is decisive to the learning accuracy of the neural network. [30] PPF is a typical short-term plasticity, and the index can be assessed by the percentage increase in the second post-synaptic current (PSC) compared to the first PSC. [31] Figure 3c shows the effect of PPF for six groups with different time intervals. This demonstrates that the PPF index decreases sharply with increasing pulse interval, which is consistent with biological systems. STDP is a significant biological learning rule for synapses. [32] Biological synaptic weights can be adjusted by changing the relative timing of presynapse and post-synapse spikes (Δtpost-pre). In order to mimic the STDP learning rule, Ta and Pt electrodes are defined as presynaptic and post-synaptic membranes, respectively. As shown in Figure 3d, the STDP learning rule is perfectly demonstrated in the Ta/TaO x /Al 2 O 3 (2 nm)/Pt device. In asymmetric Hebbian STDP, the change in weights (ΔW) can generally be fitted by the following function: [33] Here, A+ and A− are the scaling factors and + and − are time constants. As shown in Figure 3d, the values of A+, A−, +, and − are ≈159.7%, ≈99.7%, ≈2.08 μs, and ≈2.06 μs, which are similar to what is observed in biological synapses. When Δt post-pre > 0, the net spike of pre-synapse and post-synapse spikes is a positive spike, which promotes the growth of conductive filaments, which is what we call an increase in synaptic weight. Conversely, when Δt post-pre < 0, the synaptic weight will decrease. As the time interval becomes smaller, the greater the change in the conductance of the synaptic weight. The transition from STM to LTM is an important basis for brain-like learning behavior. Figure 3e shows the successful transition from STM to LTM on a simulated artificial synapse by increasing the pulse amplitude. As shown in Figure 3f, when the artificial synaptic device was modulated to the LTM state, its memory retention properties exceeded 10 4 s. In summary, it can be concluded that the basic biological synaptic functions were successfully simulated on Ta/TaO x /Al 2 O 3 (2 nm)/Pt memristors.
To accomplish the application in neuromorphic computing, an ANN simulator was used to evaluate the recognition of handwritten digits based on LTP/LTD data. The accuracy of pattern recognition at the National Institute of Standards and Technology (MNIST) was checked by an artificial neural network with a back propagation algorithm. The three-layer artificial neural networks array composed of input layer, hidden layer, and output layer contains 28 × 28 pre-neurons, 100 hidden neurons, and 10 output neurons. Calculate incremental weights using a multilayer perception (MLP) algorithm to provide feedback to the array and adjust write pulses to find appropriate synaptic weights for memristors. [34] Figure 4a-c present the confusion matrix visualization results of the 200th training epoch for the three devices. As shown in Figure 4d, after 200 epochs of neural network training, the recognition accuracy of Device2 was enhanced to be 90.4%. It can be concluded that Device2 has better recognition accuracy for handwritten digits after neural network training. Normally, memristor-based handwritten digit recognition with an accuracy of over 95% is considered a desirable goal. [35] As for Ta/TaO x /Al 2 O 3 /Pt device, the accuracy is less than 95% and still needs to be enhanced later. It has been reported previously that linearity and symmetry of LTP and LTD are the critical factors decisive to recognition accuracy. [36] Herein, annealing or plasma treatment is used to further optimize the linearity. We used the methods and obtained ideal linearity in our previous work. [37,38] In addition, the cross-crosstalk phenomenon of the memristor array needs to be considered in the construction of an artificial neural network. It is necessary to eliminate the cross-talk phenomena of the memristor array in future work. [39] To explore the logic operation for Ta/TaO x /Al 2 O 3 (2 nm)/Pt memristor, a non-volatile logic scheme based on a 3 × 5 array of memristors is designed. The pulse width is kept at 400 ns, only the amplitude of the input pulse is adjusted. As shown in Figure  5a, pulse stimulation with an amplitude of 0.4 V/−0.4 V was input at the pre/post-synapse, respectively. The "E" and "F" images were input simultaneously; the voltage amplitude at the intersection of "E" and "F" is actually 0.8 V. After pulse stimulation, the change in conductance over time is displayed on a 3 × 5 pixel matrix. It can be seen that after 10 min, only the intersections of the "E" and "F" images are displayed on the matrix. It lies in the fact that the conductance of the image intersection can be maintained for a long time after strong stimulation. Similarly, as shown in Figure 5b, when a pulse stimulation with an amplitude of 0.8 V/-0.8 V is input at the pre/post-synapse, the voltage amplitude at the intersection of the image is actually 1.6 V, and the conductance can also be maintained for a long time, corresponding to the union of images "E" and "F". In Figure 5c, pulse stimulation with an amplitude of 0.8 V/0.4 V was input at pre/post-synapse, the voltage amplitude at the intersection of "E" and "F" is actually 0.4 V. Due to the weaker stimulation, the conductance at the intersection of images "E" and "F" returns to its initial state after 10 min, implying the presentation of the complement of image "F" relative to image "E." Hence, the basic logic operation functions have been successfully achieved on a bilayer-structured memristor array by performing a nonvolatile logic scheme. It is expected to be further developed in the research on digital in-memory computing technology.

Conclusion
In conclusion, a TaO x -based memristor with a 2 nm Al 2 O 3 layer was efficiently designed. The Ta/TaO x /Al 2 O 3 (2 nm)/Pt memristor exhibits bipolar resistive switching characteristics, with excellent uniformity at low switching voltages. The device features excellent nonvolatile memory and reliable synaptic properties. Basic synaptic functions, such as LTP, PPF, and STDP, are achieved on memristors. In addition, the multi-level conductance characteristics of the memristor are applied to the convolutional neural network, the recognition function of handwritten digits based on the MNIST database is realized, and the recognition accuracy reaches 90.4%. Based on the memory switching properties of our memristor, different logic operations (intersection, union, complement) are implemented on a 3 × 5 memristor array. This research provides ideas for the development of digital in-memory computing and neuromorphic computing.

Experimental Section
Fabrication: A ≈8 nm Ti film was deposited by Radio Frequency (RF) magnetron sputtering on a clean SiO 2 /Si substrate as the adhesive layer, and a Pt film of ≈100 nm was sputtered by DC magnetron sputtering as the bottom electrode. Then, Al 2 O 3 films of different thicknesses (0 nm, 2 nm, 4 nm) and 15 nm TaO x films were deposited by RF magnetron sputtering, with the size of 60 μm × 60 μm patterned by lithography and lift-off process. For functional layer films, the sputtering parameters for TaOx films are power = 80 W; gas flow rate (Ar/O 2 ) = (28 sccm/2 sccm). For Al 2 O 3 films: Power = 100 W; gas flow rate (Ar/O 2 ) = (28 sccm/2 sccm). Next, a 150 nm Ta film was deposited by DC magnetron sputtering as the top electrode, with the size of 40 μm × 40 μm patterned by in-situ lithography and lift-off process. Finally, a ≈50 nm Pt film was deposited as a protective layer to prevent oxidation of the Ta electrode.
Characterization and Electrical Testing: Elemental concentration ratios of functional layers were analyzed using X-ray photoelectron spectroscopy. The changes in the content of elements in the cross-section were analyzed by an energy dispersive X-ray spectroscopy (EDS) line scan. The crosssectional structure of the device was observed using scanning transmission electron microscopy. Electrical tests were conducted on an Agilent B1500A semiconductor parameter analyzer.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.