Theoretical analysis of electrostatic energy harvester configured as Bennet's doubler based on Q‐V cycles

We present a theoretical analysis of a MEMS electrostatic energy harvester configured as Bennet's doubler. The steady‐state operation of the circuit can be approximated by a rectangular Q‐V cycle in the ideal case or by a trapezoid diagram when the electrical losses are taken into account. A similarity between the voltage doubler and charge‐pump circuit is highlighted. The analytical solution of the saturation voltage is derived, providing a more insightful comprehension of the system performance and the influence of its parameters. The results obtained from studying the Q‐V diagram coincide with those of circuit simulations for both cases when using (i) a mathematically idealized diode or (ii) a realistic diode model that includes the electrical losses. A configuration employing a simple switch connected in series with one of the three diodes that can further increase the saturation voltage is investigated, providing an efficient alternative for boosting the output voltage of an electrostatic energy harvester.


| INTRODUCTION
Wireless sensor nodes (WSNs) are emerging as one of the most commonly used systems for monitoring and sensing applications. 1,2 Most current WSNs are powered by batteries. The lifetime of batteries is limited to a few years, and improper disposal of batteries could pose a significant threat to human health and the environment. Energy harvesting from vibration has become a potential alternative to obtain electrical energy for WSNs, especially in some circumstances where batteries may not be feasible due to size constraints. For the vibration energy harvesters, there are three common transduction mechanisms that includes piezoelectric, electromagnetic, and electrostatic. [3][4][5] In this paper, we narrow our focus on an overlap-varying electrostatic energy harvester, one of the most commonly used structures for MEMS energy harvesting.
A challenge with energy harvesters is the implementation of power management circuits due to the limited power available in the generators. In an early effort, Roundy et al. introduced a simple charge pump circuit consisting of a voltage source, an electrostatic converter, and two switches and demonstrated that mechanical-to-electrical energy transduction based on variable capacitance is possible. 6 When connected to a load resistance, the correlation between the charge and voltage of the variable capacitor can be described by a Q-V cycle of a triangular shape. 7 However, the authors did not consider the regime where the generator saturates due to the lack of an energy flyback path.
In order to overcome this issue, several solutions based on energy-renewal techniques for extracting electrical energy were investigated. For instance, Yen et al. proposed a configuration of single variable-capacitance harvester, combining an asynchronous charge pump with an inductive flyback circuit to recharge a scavenging capacitor. 8 Mitcheson et al. developed a buck-boost topology with bi-directional switches for rectifying and increasing the AC voltage obtained from electromagnetic, electrostatic and piezoelectric transducers. 9 However, these circuit topologies face the challenges of power consumption of the control unit and harvester efficiency.
Bennet's doubler of electricity was introduced already in 1787 by Bennet and Kaye. 10 A macro-scale device with three plates is used to continuously double a small initial charge through a sequence of operations. Based on this approach, de Queiroz proposed a promising variation of such a voltage doubler for vibration energy harvesters composed of variable capacitors and diodes replacing switches. [11][12][13] In order to adapt this concept to micro-scale electrostatic generators, several studies have been made, [14][15][16][17][18][19][20] including attempts to increase the charging current for a reservoir capacitor or to optimize the harvested power. In a recent work by Galayko,21 operation of the doubler configuration with a single variable capacitor was thoroughly analyzed in the electrical domain.
With ideal diodes (i.e., zero forward voltage and no leakage current), a rectangular conversion cycle can be realized to investigate the performance of Bennet's doubler. A complete model was developed, taking the dynamics of the mechanical domain into account. 22,23 When delivering energy into a storage capacitor, higher voltages induce more electrical damping in the transducers. As a consequence, the steady-state operation of the harvesting system is achieved, and the output voltage saturates at a certain level. However, the operation of a transducer configuration with two timevarying capacitors and closed forms of the saturated voltage (denoted as V s ) has not been explored yet.
The saturation phenomenon was observed in both simulation and experiment. 16,19 Therefore, the effect of electromechanical coupling on it is of interest to comprehensively investigate. This paper further presents a theoretical analysis of Bennet's doubler circuit based on the Q-V cycle. In particular, the explicit dependence of V s on input acceleration and harvester parameters is the central objective. Effects of nonideal characteristics of diodes on the shape of the Q-V diagram is also an important objective. A complete model of an anti-phase overlap-varying transducer electrically configured as a voltage doubler is investigated. Numerical results for both ideal and nonideal diodes obtained by a circuit simulator are used to verify the analytical solutions. In order to further increase the saturated voltage across the storage capacitor, alternative topologies are introduced and analyzed.

| Theoretical analysis
Overlap-varying energy harvesters can be utilized in a charge-doubling circuit-configuration as shown in Figure 1. 14,19 The transducer capacitors are precharged to a voltage V 0 . At time t ¼ 0, the switch connecting the voltage source V 0 with the harvester is turned off. The proof mass is suspended by four folded-beam linear springs. The maximum F I G U R E 1 Overlap-varying energy harvesters employing Bennet's doubler circuit displacement X max is defined by mechanical end-stops. Two anti-phase variable capacitors C 1=2 ðxÞ ¼ C 0 1 AE x x 0 are connected to three diodes D 1 , D 2 , D 3 and the storage capacitor C s . Here, C 0 , x 0 and x are the nominal capacitance, the nominal overlap and the proof mass displacement, respectively. Operation of the doubler circuit does not require any control unit or switches but an initial bias voltage V 0 . Figure 2 shows a complete lumped model of the doubler configuration, including an equivalent circuit for the mechanical subsystem, where m -proof mass, b -mechanical damping, k -total spring stiffness, F -external force, F eelectrostatic force, and C p -parasitic capacitance of each transducer. The impact force F im acting on the proof mass when the displacement reach its maximum is simply modeled as a spring-damper system. In particular, 24 where δ ¼ jxj À X max is relative displacement between the proof mass and the end-stops, k im is the impact stiffness, and b im is the impact damping. The vibration frequency is at the resonance frequency, . For a sufficient voltage V 0 and an adequate input acceleration amplitude A, the output voltage V out accumulated on the storage capacitor C s initially increases. We would like to emphasize that, in the considered configuration, no resistor is connected with C s . Figure 3 indicates that after certain cycles of the transient regime, the harvester attains its steady-state operation.The electrical energy is now no longer scavenged, and the output voltage V out maintains constant at V s (i.e., saturation voltage).
The proof mass displacement amplitude X 0 changes in a complicated manner. X 0 first reaches the maximum value X 0 ≈ X max (i.e., which is limited by the mechanical end-stops), then decreases and keeps fixed at X 0 ≈ X s in the saturation regime. For convenience, we define the rate of voltage evolution v * as a ratio of the maximum output voltage in two subsequent periods As shown in Figure 3, v * is evolved over cycles under the variation of X 0 , as follows. During the transient regime, v * is small at the beginning and gradually increases, meanwhile X 0 ≈ X max . After reaching the maximum, v * decreases with the reduction of X 0 and finally becomes unity at which the steady state is achieved.
The higher voltages through the conversion phase, the more effective electrical damping (represented by electrostatic force) is induced in the transducers, causing a decrease in the proof mass displacement. As a consequence, the transducer capacitance ratio η ¼ ðC max þ C p Þ=ðC min þ C p Þ is reduced. Here, C max ¼ C 0 ð1 þ X s =x 0 Þ, C min ¼ C 0 ð1 À X s =x 0 Þ, and X s < X max is the displacement amplitude at saturation. With the model parameters taken from Truong et al 19 and listed in Table 1, we have η ≈ 1:72. It is important to note that the necessary condition for the operation of the doubler circuit is η ≥ η cr ¼ 2, where η cr is the critical threshold ratio in the ideal case (i.e., without any losses). 11 Since this condition is no longer satisfied, V out is saturated at V s . In this paper, the effect of the electromechanical coupling on the solution of V s through the impact of the electrostatic force is one of the primary objectives of the analytical investigation. Figure 4 shows the waveform of the proof mass displacement, the voltages V 1 , V 2 across C 1 , C 2 , and the currents I D1 , I D2 , I D3 through three mathematically idealized diodes, respectively. Dynamic simulations are performed by using LTspice simulator. The operation of the doubler circuit at the steady-state operation is divided into a sequence of four stages from t 0 to t 4 . We observe that the relation of Q 1 and V 1 now can be approximated by a rectangular Q-V cycle diagram since the time interval between Δt 21 ¼ t 2 À t 1 and Δt 43 ¼ t 4 À t 3 are negligibly small. We now consider each of the four stages in turn, as depicted in Figure 5, and all the following computations are based on the Q-V diagram only.
Stage I: At t ¼ t 0 , xðt 0 Þ ¼ ÀX s and V 1 ðt 0 Þ ≈ V 2 ðt 0 Þ ≈ V s , where X s is the maximum displacement at the steady-state. From t 0 to t 1 , all three diodes D 1 , D 2 and D 3 are blocked as the condition V 2 < V s < V 1 < V 2 þ V s is satisfied. The charges on the two transducers are F I G U R E 3 Evolution of the proof mass displacement and the output voltage across the storage capacitor with the input acceleration amplitude A ¼ 2:0 g, the drive frequency f ¼ f 0 and the initial bias voltage V 0 ¼ 7 V In the first stage, q 1 and q 2 are constants, V 1 and V 2 are given Stage II: At t ¼ t 1 , V 1 ðt 1 Þ ≈ V 2 ðt 1 Þ þ V s , and diode D 3 starts to conduct. Since the time interval between t 1 and t 2 is very small (i.e., see Figure 5), the proof mass displacement at t 1 can be approximated as xðt 1 Þ ≈ xðt 2 Þ ¼ X s , then The solution is given by The peak values of voltages across C 1 and C 2 are In this stage, net charges ΔQ s and ΔQ are pumped from C 1 into C s and C 2 , respectively. At steady state, V s is considered unchanged; thus, ΔQ s is neglected. The detailed derivation is presented in Appendix A.
Stage III: From t 2 to t 3 , all diodes are blocked, and q 1 and q 2 are constants Diode D 2 starts to conduct, transferring an amount of charge ΔQ * from C s into C 1 . Similarly, since V s is treated as constant, ΔQ * is thus negligible. The relation (2.12) now can be written as Due to the small interval time between t 3 and t 4 , x 3 ≈ xðt 4 Þ ¼ ÀX s , resulting in ΔQ ≈ 0. In other words, the charge transferred from C 1 into C 2 is insignificant.
Considering the voltage across the capacitor C 2 at t 3 , we have Since the condition V 2 ≈ V s holds, D 1 also starts to conduct at t 3 .
Stage IV: From t 3 to t 4 , D 1 is conducting, and ΔQ is transferred from C 2 into C 1 . The charge q 1 ðt 4 Þ is The condition q 1 ðt 4 Þ ¼ q 1 ðt 0 Þ is fulfilled, showing that the state of the doubler circuit at t 4 is the same as when t ¼ t 0 . A new cycle then starts. This result proves that the right-angle trapezoid Q-V diagram is capable of describing the operation of the doubler circuit in the case of using idealized or low-loss diodes.

| Similarity of Bennet's doubler and charge-pump circuit
Among electronic interface circuits for MEMS capacitive energy harvesters, 25,26 the charge pump circuit 6 and its varieties are widely investigated. A well-known charge pump variation that combines with an inductive flyback circuit was developed by Yen et al. 8 An alternative technique to implement flyback is to use a load resistance, which was first introduced in Florentino et al 27 and thoroughly analyzed in O'Riordan et al. 23 Comparing the results reported in the literature with those obtained in the first sections of this paper, it is worth noting that the Q-V cycle for the charge pump circuit with resistive flyback is very similar to that of Bennet's doubler circuit. Both the charge pump and voltage doubler can be approximated by a rectangular conversion cycle in the ideal circumstance in that the electrical loss is neglected. Furthermore, at the steady-state operation, the Q-V cycle of the two topologies almost degenerates into a line (as seen in Figure 5). Various circuit topologies for electrostatic energy harvesters that realize rectangular Q-V cycles are discussed in detail in chapter 10 of Basset et al, 28 including the charge pump circuit and Bennet's doubler configuration.

| APPROXIMATION OF THE SATURATION VOLTAGE WITH MATHEMATICALLY IDEAL DIODE
The electrostatic force F e plays an essential role in the saturation phenomenon of the output voltage. Therefore, it is the primary objective of the study in this section. F e is modeled as ð3:1Þ V 1 and V 2 can be simplified as anti-phase sinusoidal signals for the sake of analysis, although they are more complicated than that in general. Based on the dynamic simulations shown in Figure 6, we observe that the phase difference between the input acceleration and the voltage across C 1 is negligibly small (less than 0.2 degree) and is ignored. Using expressions (2.8) and (2.9), the waveforms of V 1 and V 2 are then represented as sinðωtÞ, ð3:3Þ The constant ffiffi ffi 5 p À 2 À Á 2 =2 ≈ 0:028 ( 1 is negligible, and the electrostatic force thus becomes Normalized waveforms of the input acceleration in comparison with the voltage across C 1 ðxÞ, obtained from simulation The harmonic term of F e is in phase with the input acceleration. Figure 7 shows the comparison between the input acceleration and the electrostatic force over the same time duration as in Figure 4. The expression of F e in (3.5) is in good agreement with the wave form obtained by the simulation.
The differential equation of the spring-mass-damping system, which is set in continuous oscillation by a sinusoidal force acting on the proof mass, is The steady-state solution of (3.7) is The harmonic term is 29 In the saturation regime, the proof mass displacement does not reach its physical constraint defined by the rigid end-stops, The ratio x=X 0 obtained from simulations is less than 2.1% for all A ½1,2 g, the acceleration range of interest. Therefore, x is assumed negligible, and approximately, x ≈ x h . By considering amplitudes of the harmonic term and ignoring phase differences, the saturation voltage is The details of derivation are included in Appendix B.
F I G U R E 7 Normalized waveforms of the input acceleration in comparison with the electrostatic force obtained from simulation and formula (3.5) Although the performance of the harvesting system using a mathematically ideal diode is analyzed, the effects of power loss (due to diode imperfections such as leakage current and junction capacitance) on the shape of the Q-V cycle and the solution of V s are still open for investigation. This issue is even of greater interest and to be explored in the next section.

| OPERATION OF THE BENNET'S DOUBLER WITH NONIDEAL DIODE
4.1 | Approximated Q-V cycle at steady state A realistic model of diode 1N6263 is chosen to use in LTspice simulation to assess the effects of diode losses on the harvesting system performance, as the magnitude of the reverse current is comparable with the charging current through the storage capacitor, and the zero bias junction capacitance is in the range of transducer nominal capacitance. Other authors, such as Dragunov, 14,30 utilized similar diode parameters to estimate the average charging current for a configuration of the doubler circuit based on a single variable-capacitor.
F I G U R E 8 Waveforms of normalized displacement, voltage and charge on variable capacitors C 1 ðxÞ and C 2 ðxÞ, and currents through three diodes, at saturation, with the input external acceleration A ¼ 2:0 g Figure 8 shows waveforms on the same time scale of the proof mass displacement, the voltages V 1 , V 2 across and the charges q 1 , q 2 on the variable capacitors C 1 and C 2 , respectively. Similarly, the operation of the doubler circuit at the steady-state can be divided into a sequence of four stages. However, the time interval between stages is more significant than those when utilizing mathematically idealized diodes. Based on the observation from the simulation, the relation of Q 1 ðQ 2 Þ and V 1 ðV 2 Þ is then approximated by a right-angled trapezoid Q-V cycle diagram, as shown in Figure 9.
For the sake of simplicity, the dynamics of the diodes, such as the time evolution of the diode currents, are disregarded in analyzing the Q-V conversion. In addition, we assume that the effects of diode losses are accounted for and represented in the change of the Q-V cycle from a rectangular to a right-angled trapezoid. Charges transferred from or into C s are negligible since the output voltage is unchanged at steady state. Under these assumptions, the following analyses are developed based on the Q-V diagram only. Differentiating from the previous section, the displacements of the proof mass at t 1 and t 3 are still unknown, and the system behavior is more complicated.
Stage I: Similar to the previous analysis, the charges on the two transducers and variations of V 1 and V 2 from t 0 to t 1 are expressed by Equations (2.2), (2.3), (2.4), and (2.5).
Stage II: From t 1 to t 2 , charge ΔQ is pumped from C 1 into C 2 .
Stage III: From t 2 to t 3 , all diodes are blocked. Charges q 1 and q 2 are constants that are described by (2.10) and (2.11). At t ¼ t 3 , D 2 starts to conduct due to V 1 ðt 3 Þ ¼ V s . This condition is expressed by (2.13), which results in The voltage across C 2 at t 3 is Since the condition V 2 ¼ V s is fulfilled, D 1 also starts to conduct at t 3 . Substituting (4.2) into (2.10), we get Stage IV: From t 3 to t 4 , D 1 is conducting and ΔQ is transferred into C 1 from C 2 . At t 4 , xðt 4 Þ ¼ ÀX s ¼ xðt 0 Þ and the state of the doubler circuit is the same as when t ¼ t 0 , leading to From Equations (2.2), (4.5), and (4.6), the displacement at t 3 is given by x 3 ¼ 0. As the consequence Substituting this result back into (2.10) and (2.11), the voltages across C 1 and C 2 at t 2 are derived as follows: At t 2 , D 3 starts to stop conducting since V 1 is slightly less than V 2 þ V s . This relation can be approximated as V 1 ≈ V 2 þ V s . Similarly as Equation (4.1), we have The solution of the maximum displacement at the steady-state is Substituting (4.11) back into (4.1), the proof mass displacement at t 1 is determined by Therefore, the peak values of V 1 and V 2 are ð4:14Þ V 1 and V 2 are then approximated by ffiffi ffi 2 p sinðωtÞ, ð4:15Þ : ð4:18Þ Since βÀλ αþγ ≈ 0:058 ( 1 is negligible and α À γ ¼ β þ λ, the electrostatic force is given by which can be represented as Using the same analysis procedure in the previous section, the saturation voltage is ð4:22Þ All the algebraic calculations in this section are presented in Appendix C. Both expressions (3.11) and (4.22) provide a quick means to predict the saturation voltage for any acceleration amplitude and harvester parameters. They can also be utilized as guidelines for designing the overlap-varying anti-phase transducers in order to obtain the desired value of V s .
The ratio between the two solutions of V s corresponding to the ideal and realistic cases is Although the diode parameters do not appear in the latter solution of V s (which follows the assumptions that we made at the beginning of Section 4.1), expression (4.22) still coincides with the fact that diode losses reduce the saturation voltage. In order to verify the accuracy of the analytical results, a comparison with SPICE simulations is to be performed and presented in the following section. Figure 10A shows the saturation voltage with different acceleration amplitudes. The simulation results that use idealized diodes and those obtained by analytical solution (3.11) are compared. The figure also exhibits that low-loss diode such as BAS716 performs close to that of the mathematically idealized diode. In the same manner, Figure 10B presents the analytical solution given by (4.22) compared against the numerical simulations with the use of different nonideal diode models. Despite disparities in the reverse current I s , the junction capacitance C j , and the built-in junction voltage V j , both diodes 1N6263 and BAT41 give almost the same saturation voltages. The agreement between theoretical and numerical results in both cases verifies our approach and the predictions of the analytical solutions.

| Numerical verification
The simulations also show that diodes with very high reverse current and large junction capacitance, for example, BAT54LPS, cause the average charging current through the storage capacitor C s to be negative, which leads to the discharge of C s and drop of V out to zero (not shown in the figure). Those diodes, therefore, are not of interest for doubler configuration. Diode parameters used in the simulations are listed in Table 2. All simulation results are obtained from the LTspice.

| Effect of diode operation on mechanical dynamics
The Q-V cycle is a useful geometrical tool that enables us to realize the operation of the voltage doubler circuit at the steady-state. However, the performance of a harvesting system is more sophisticated in the transient regime. Therefore, considering a dynamic simulation may be more appropriate to explore the system behavior. Figure 11A shows waveforms of the normalized proof mass displacement ðx=X max Þ, the normalized external forceâ ¼ sinðωtÞ, and the electrostatic force ðF e =mAÞ along with the diode currents at the first several operating cycles, utilizing ideal diodes. We observe that the phases of F, x, and F e are initially different. However, those differences gradually decrease due to the effects of the diode states (i.e., blocking and conducting). This phenomenon is most clearly present in the shift of phase of the electrostatic force. Examples of such behavior are marked by the vertical dash lines in the same figure. This variation process leads to the negligible phase shift between F and F e at the steady-state that we presented in Section 3 and allows us to describe the electrostatic force as the form F e ¼ F 0 ð1 þ sinðωtÞÞ. In other words, the dynamic motion of the proof mass also strongly depends on both the transducing force and the diode operation mechanism. This statement is also valid when a realistic diode model is utilized, as seen in Figure 11B.

| CIRCUIT TO IMPROVE THE SATURATION VOLTAGE
Analyzing Bennet's doubler circuit operation, we realize that there are several promising techniques to enhance the saturation voltage with the same harvester. The main objectives of this section are to introduce and study these alternative configurations. The Q-V cycle is still a useful tool to explore some important properties of the saturation voltage under certain conditions.

| An alternative voltage doubler with single switch
The diode D 2 plays a vital role in initially charging C 1 . However, in principle, it could be removed after a few transient vibration cycles without causing negative effects on the operation of the circuit. Disconnecting D 2 also enhances the charging current through the storage capacitor due to the relation I Cs ¼ I D3 À I D2 . The performance of the harvester, in this case, becomes of interest to investigate.
As shown in Figure 12, an electronic switch SW in series with D 2 is utilized to disconnect this diode when needed. With the use of mathematically ideal diodes, the operation of the circuit can be described by two rectangular Q-V cycles as in Figure 13. The only constraint of V s extracted from the Q-V diagram is V m ≤ V s ≤ V I , where V m and V I are the minimum and maximum voltages across the capacitor C 1 ðxÞ. Any value of V s ½V m , V I satisfies the circuit operation. Thus, V s cannot be solved for an explicit form of system parameters (e.g., C 0 , C p , and b) and input excitation. However, based on the fact that the displacement at the steady-state is limited, X s ≤ X max , the maximum possible saturation voltage is estimated as The detailed analysis is shown in the Appendix D.
In the simulation, switch SW is only ON in the first several vibration cycles. It then is turned OFF to eliminate the effect of D 2 on I Cs . Two different models representing so-called lossless (or low-loss) and lossy SW are utilized with the model parameters listed in Table 3. Figure 14A shows the evolution of the output voltage in various cases, including without and with the presence of lossy SW . The saturation voltage in the latter case is about $ 15:60 V, which is a significant improvement over the 13.84 V achieved for the circuit topology in Figure 2. As expected, the output voltage is further increased when the power loss of the switch is neglected and an ideal switch model is used. Similar results are obtained with different acceleration amplitudes in Figure 14B. It is important to note that since switch SW only changes its state from ON to OFF only once, R on does not yield any effect on the saturation voltage V s . On the contrary, V s increases with the increase of R off . Therefore, a high R off switch is always preferable. In comparison with dynamic simulations, max V s obtained from expression (5.1) is higher since the steady-state displacement X s in the analytical solution is assumed to attain its maximum possible value (see Appendix D). The corresponding displacement in LTspice simulation may not reach this maximum with the given harvester parameters.
T A B L E 2 Diodes parameters: reverse saturation current I s , zero-bias junction capacitance C j and built-in junction voltage V j .

| Greinacher's doubler
Another topology of the voltage doubler developed from the Greinacher circuit 31 is depicted in Figure 15, in which the feedback diode D 2 is added to connect the storage capacitor and the two transducers. The roles of the three diodes D 1 , D 2 , and D 3 are the same as those in Figure 2. Both theoretical operation analysis and simulation results show that the performances of Bennet's doubler and the Greinacher configuration are identical. Therefore, all results obtained in the previous sections hold for this circuit topology. The steady-state operation of the voltage doubler circuit was approximated by a right-angled trapezoidal conversion cycle. The use of mathematically idealized and nonideal diode models was investigated, resulting in different analytical solutions for the saturation voltages. The theoretical approach was verified by circuit simulation results obtained from a complete model of the energy harvesting system. We discussed the effects of the diode operation mechanism on an important behavior of the system, in which the input mechanical vibration and the electrostatic force are in-phase. A similarity between Bennet's doubler and the resistive flyback charge pump circuit was highlighted by comparing their Q-V diagram. A variation circuit of Bennet's doubler with a single switch was introduced, where the saturation voltage was significantly improved in comparison with the conventional configuration. One limitation of the presented approach is that it only relies on the shape and consistency of the Q-V cycles, which makes the analytical solutions not include the diode nonideal properties. Despite that, the findings can provide convenient tools to predict the saturation voltage, especially when using low-loss diodes.

DATA AVAILABILITY STATEMENT
The data that support the findings of this study are available from the corresponding author upon reasonable request.

ORCID
One solution of (A.3) is and therefore is eliminated. The positive solution is Substituting (A.5) into (2.4) along with xðt 1 Þ ¼ X s , we get ðA:7Þ The solution of V II is then From (3.10), F 0 can be expressed as Substituting X s and F 0 from (2.7) and (3.6), respectively, into (B.1), we have that 2 þ ffiffi ffi 5 p With the use of the mathematically ideal diode model, the relations of charge and voltage at the saturation regime for both transducers are approximated as a rectangular in Figure 13. The Q-V cycle is very similar to that of the case presented in Section 2, except that the saturation voltage V s is unknown and V m ≤ V s ≤ V II . All the following computations are only based on the Q-V diagram. Stage I: The charges q 1 , q 2 and the voltages V 1 , V 2 when t ½t 0 , t 1 are expressed as follows: Stage II: At t ¼ t 1 , xðt 1 Þ ¼ x 1 , V 1 ðt 1 Þ ¼ V II , V 2 ðt 1 Þ ¼ V I and diode D 3 starts to conduct, which yields The net charge pumped from C 1 into C 2 is considered negligible ΔQ ≈ 0. Stage III: From t 2 ! t 3 , q 1 and q 2 are constant, At t ¼ t 2 , V 1 ðt 2 Þ ¼ V 1 ðt 1 Þ and xðt 2 Þ ¼ X s , we get x 0 ðD:9Þ , x 1 ¼ X s : ðD:10Þ The Equation (D.6) then becomes The charge on C 1 at t ¼ t 4 is Thus, the state of the circuit at t 4 is identical to that at t 0 , and a new cycle starts. The aim of analyzing the Q-V diagram is to express V I and V II in terms of V s for further investigation. Unfortunately, the exploration above only leads to one equation (i.e., (D.11)) for two unknowns V r ¼ V s =V m and X s ; therefore, such a goal cannot be done. However, due to the fact that 0 < x r ¼ X s =x 0 ≤ X max =x 0 , a closed-form expression for maximum V s (denoted as max V s ) as a function of transducer parameters and external input is possible.
Denote C 0 =C p ¼ C r , from Equations (D.5) and (D.11), V I , V II and V r are written as γ ¼ 1 þ C r þ C r x r 1 þ C r À C r x r > 1, ðD:15Þ The harmonic forms of V 1 and V 2 are then V m ðγ À 1Þ sinðωtÞ, ðD:19Þ ( 1 is negligible, the electrostatic force is The derivative of V s with respect to x r is The optimal values of x r as a function of the input acceleration is