A novel active‐input cascode current mirror with high precision and low power dissipation

In this article, a novel active‐input cascode current mirror (CM) with high precision and low power consumption is proposed. First, the cascode input structure is employed upon the active‐input CM to reduce the requirement of high‐gain op‐amp. In addition, the extra branch to the ground is designed. Subsequently, the resistance adaptive loop is separated from the current replication loop to eliminate the matching obstacle between two op‐amps. The proposed CM fulfilled in 0.18 μm CMOS technology, is able to operate with a supply voltage of 1.0 V, wide input range of 100 nA–1 mA, low power dissipation of 40 μW, and lower replication error (below 1.4%) than the same configuration using the conventional active‐input mechanism.


INTRODUCTION
A current mirror (CM) is a unity gain current amplifier which replicates proportionally the input current at its high impedance output node. It is widely adopted as one of the most critical blocks in integrated analog or mixed-signal circuits such as current-mode A/D converters, 1-3 low-dropout regulator, 4-6 operational amplifiers, 7,8 voltage level shifter, [9][10][11] and analog filters 12,13 and so forth. Therefore, the performances of CMs could directly influence system performances. 14 At the same time, with the rapid development of biomedicine, more and more CMs are used in the fields of biomedical circuits, bio-amplifiers and implantable microstimulators and so forth, [15][16][17] which puts forward higher requirements for the accuracy and power dissipation of CMs. To improve the CM performance and make it compatible with the present industry trends, various high-performance topologies have been proposed. The active-input CM proposed by Serrano and Linares-Barranco could realize adaptive input impedance which decreases with the increasing of input current. Thus, high replication accuracy in active-input CM could be obtained over a wide input range. 18 Bhawna Aggarwal et al. reported a very high-performance current mirror in 2014. 19 By using super cascode configuration at the output side, the output current accurately copies the input current without any offset component, and the output resistance increases considerably. In 2016, Stefan Leitner and Wang Haibo proposed a current mirror with two feedback loops based on op-amps, which eliminates the requirements of high impedance and wide swing for its input node, and ensures the accuracy of current replication. 20 However, the principle of active feedback lies in the test of input current changes to control the gate voltage generating the output current. 21 In such structure, the input node, which is mainly the drain of transistor, is connected to the gates through an active device such as Operational transconductance amplifiers and op-amps. Therefore, the op-amps with high gain and excellent matching performance would be required, which increases the design difficulty of op-amps and reduces the applicability of the circuit.
In this article, a novel active-input cascode current mirror with high precision and low power dissipation is proposed, which employs the cascode input structure to reduce the gain requirement of the op-amps. In addition, an extra branch to the ground is inserted to separate the adaptive input impedance loop from the current replication loop to eliminate the op-amp matching problem. In summary, the proposed CM combines the advantages of cascode input stage and active-input CM to improve its overall performance.

PROPOSED CURRENT MIRROR
The schematics of the conventional active-input CM 18 and the proposed CM are respectively depicted in Figure 1A,B. Different from the conventional active-input CM, the proposed CM contains three branches X, Y, Z to the ground and two negative feedback loops. In Figure 1B, M1 and M2 work in critical subthreshold region to obtain lower quiescent current and the maximum gate source voltage swing, and M3-M9 work in saturation region. The adaptive input impedance loop (loop1) is composed of branches X, Y and op-amp A 1 , which ensures the input voltage V 1 is identically equal to the reference voltage V ref . Thus, the input impedance of the proposed CM decreases with the increasing of the input current. Subsequently, we further illustrate how the input voltage V 1 is forced to equal the reference voltage V ref by the loop1. We assume I in increases by i in . Then, V 4 (the input of op-amp A 1 ) increases, which results in an increase of M1 gate voltage. As a result, the drain-source equivalent impedance of M1 decreases and input voltage V 1 remains constant. The small signal model of the loop1 is shown in Figure 2.
Here, g mi and r oi represent the transconductance and source-drain equivalent impedance of transistor M i , respectively. By analyzing this model, it can be found that Then, from Equations (1) to (2), it is easy to induce that (4) can be written in simplified form as: where A d1 represents the gain of op-amp A 1 , A d1 g m1 g m4 (r o4 ||r o6 ) is loop gain of loop1. From Equation (5), the input impedance of the proposed CM is inverse of loop gain, which is very low (less than 1 Ω). Therefore, the cascode input structure of M1 and M4 increases the loop gain by g m4( r o4 ||r o6) times compared with the active-input CM when the gain of the op-amps is constant. As the gain of the op-amps is an important part of the loop gain, the gain requirement of the op-amps is reduced while performance requirements remain unchanged. The current replication loop (loop2) is consisted of branches Y, Z and op-amp A 2 , which eliminates the influence of mismatch in drain to source voltages of basic CM pair. In the loop2, the input and output of the proposed CM are connected by the amplifier A 2 via negative current-voltage feedback which further increases the output impedance and improves the stability of output current. In addition, two-stage topologies are adopted for op-amp A 2 to achieve moderate gain and relatively large output swing. M8 and M9 constitute the source follower, and (M3, M4), (M6, M7) respectively constitute a common gate amplifier with current mirror as load. In the output stage, M2 and M3 form cascode structure to provide high output impedance. In the ideal state (A d1 , A d2 infinity), I out and I in are equal under the static equilibrium condition. However, because the gain of A 1 , A 2 is limited, there is an error between I out and I in , that is, replication error. It is equivalent to the difference between the small signal variation i in and i out . Ignoring the bulk effect, it could be seen that where A d2 represents the gain of op-amp A 2 . Meanwhile, (M1, M2), (M4, M5), (M6, M7) are transistor pairs and respectively have the same W/L ratio. Then r o1 = r o2 (10) g m4 (r o4 ||r o6 ) = g m5 (r o5 ||r o7 ) Then, from Equations (6) to (11), it can be calculated that Combining Equations (10) and (12), the relationship between output current i out and input current i in is obtained as: Since A d2 g m3 r o7 > > 1, Equation (13) can be simplified as: It is noted that the loop2 makes i out equal to i in by regulating voltage v 2 equal to v 1 . Subsequently, the replication error can be given as Then, from Equations (10), (14) and (15), it is easy to show that = g m3 r o2 + 1 A d2 g m3 g m4 r o2 (r o4 ||r o6 ) + g m3 r o2 + 1 × 100% (16) where A d2 g m3 g m4 r o2 (r o4 ||r o6 ) represents the loop gain of loop2. From Equations (6) and (16), by replacing common source input stage in Figure 1A with cascode structure in Figure 1B, the loop gain of loop1 and loop2 are increased by g m4 (r o4 ||r o6 ) times. Equation (16) shows that the replication error is very low due to the enormous loop gain of loop2. Meanwhile, since I in and g m4 are positively correlated, the replication error decreases as I in increases. Subsequently, the output current i out can be derived as: Combining Equations (7) and (17), we get: Since g m5 (r o5 ||r o7 )> > 1, the output impedance of the proposed CM can be approximated as From Equation (19), the output impedance of the proposed CM is very high (in GΩ range) through the cascode input structure. Furthermore, when the gain of A 1 and A 2 in Figure 1A are the same with that in Figure 1B, respectively, lower input impedance, lower current replication error and higher output impedance in Figure 1B are achieved than that in Figure 1A. The details of the circuit analysis are shown in Table 1.

Structure
Active-input CM Proposed CM

The loop gain of loop1
The loop gain of loop2 A d2 g m3 r o2 A d2 g m3 r o2 g m4 (r o4 ||r o6 )

Output resistance
A d2 g m3 r o2 r o3 A d2 g m3 g m4 r o2 r o3 (r o5 ||r o7 ) Replication error 3  Figure 1A are the same with that in Figure 1B. The current replication error is shown in Figure 3. It is obvious that the proposed CM has a lower replication error than that in the conventional active-input CM. The " " decreases with the increase of the current I in , and the larger the gain of loop2, the smaller the " ", which is consistent with the trend shown in Equation (16). When the input current is 10 μA, the replication error of conventional CM is about 18 times more than that of the proposed CM. The input resistance of the proposed CM along with that of the active-input CM is depicted in Figure 4. The input resistance curves show that the input impedance of the proposed CM and active-input CM are 0.04 and 73.21 Ω in the low frequency range, respectively. This shows that the loop1 and the cascode input stage effectively reduce the input impedance of the proposed CM. The output resistance curves of the proposed CM and the active-input CM are shown in Figure 5. In the current-voltage negative feedback loop, the greater the loop gain, the higher the output impedance. Due to the higher loop gain as shown in Table 1, the output impedance of proposed CM is higher than that of conventional CM, as shown in Figure 5. Therefore, the improvement of the proposed CM is effective.

RESULTS AND ANALYSIS
According to the transfer function of Table 1, the proposed CM is a system with two poles and a zero point. The main poles of active-input CM and proposed CM are A d1 g m1 /C db1 and A d1 g m1 /C db4 , where C dbi represents the parasitic capacitance between the drain of M i and the substrate. Since the parasitic capacitance between the drain of the MOS transistor and the substrate is proportional to the channel width, and the channel width of M4 is lower than that of M1, C db4 is lower than parasitic capacitance C db1 . Therefore, the dominant pole location of proposed CM is further shifted away from the imaginary axis in s-plane. As given out in Figure 6, the bandwidth of proposed CM is slightly wider to that of conventional CM.
In order to better demonstrate the performance of CMs, Table 2 lists comparison of multiple parameters. These comparative results illustrate the fact that the proposed CM has lower replication error, smaller input impedance and lower power dissipation.

CONCLUSIONS
A novel active-input cascode current mirror has been presented in this article. Different from the traditional current mirror with two cascaded operational amplifiers, the proposed CM inserts an extra branch to the ground, which separates resistance adaptive loop from the current replication loop. This technique not only solves the matching problem of cascaded op-amps but also decreases the difficulty of circuit design. Additionally, the proposed CM with cascode input structure increases the loop gain of active-input CM and reduces the gain demand of the op-amps. Simulations on a practical implementation along with numerical computation based on the proposed modeling have been carried out, displaying good correlation between the two. Realized in the CMOS 0.18 μm technology under 1.0 V supply voltage, the CM achieves low replication error (below 1.4%) and low power dissipation of 40 μW with the wide input range of 100 nA-1 mA, which makes it well candidate to the realization of the high accuracy and low power dissipation biomedical circuits.