Two‐terminal III–V//Si triple‐junction solar cell with power conversion efficiency of 35.9 % at AM1.5g

III–V//Si multijunction solar cells offer a pathway to increase the power conversion efficiency beyond the fundamental Auger limit of silicon single‐junctions. In this work, we demonstrate how the efficiency of a two‐terminal wafer‐bonded III–V//Si triple‐junction solar cell is increased from 34.1 % to 35.9 % under an AM1.5g spectrum, by optimising the III–V top structure. This is the highest reported efficiency to date for silicon‐based multijunction solar cell technologies. This improvement was accomplished by two main factors. First, the integration of a GaInAsP absorber in the middle cell increased the open‐circuit voltage by 51 mV. Second, a better current matching of all subcells enhanced the short‐circuit current by 0.7 mA/cm2. Two different growth directions, upright and inverted, were investigated. The highest cell efficiency of 35.9 % (Voc = 3.248 V, jsc = 13.1 mA/cm2, FF = 84.3 %) was achieved with an upright grown structure. Processing of upright structures requires additional bonding steps, which results in a reduced homogeneity of cell performance across the wafer. A detailed comparison with the currently best triple‐junction solar cell reveals future improvement opportunities and limits, considering voltage and current, respectively.

costs of around 60 $/W DC 4 which is more than two orders of magnitude larger compared to single-junction silicon (Si) cells. Strong efforts are being undertaken to reduce the cost of III-V solar cell fabrication. One important breakthrough towards this goal are demonstrated growth rates above 120 μm/h. 5,6 The substrate costs amount to around a third of the total costs for III-V multijunction solar cells. Substrate removal and reuse approaches can help to reduce these costs. 7 Here, the expensive substrate is used for epitaxial growth, and then, the solar cell is transferred to a carrier wafer consisting of a cheaper material.
Another possibility is to use a less-expensive substrate material, for instance, silicon, as the bottom cell of a multijunction architecture. The III-V cell layer stack can be grown directly on the Si cell using a metamorphic buffer structure 8,9 to overcome the mismatch in lattice constants between Si and the III-V cells, for example, 4 % for the case of GaAs on Si. The highest power conversion efficiency was reported for a triple-junction GaInP/GaAs/Si solar cell with a value of 25.9 %. 10 This cell suffers from a voltage loss due to nonradiative recombination at the threading dislocation defects introduced by the metamorphic buffer growth. This loss mechanism can be avoided if the III-V top structure is grown lattice matched on GaAs and then either mechanically stacked on the Si cell (fourterminal configuration) 11 or monolithically connected to the Si cell (two-terminal configuration). The latter can be achieved by using either a direct wafer bond 12,13 or a transparent conductive adhesive. [14][15][16] The four-terminal configuration does not require balanced current densities between the top and the bottom junctions. Consequently, though, the electrical interconnections of cells on a module level become more challenging. With a four-terminal design, the maximum conversion efficiency demonstrated amounted to 35.9 % for a triplejunction GaInP/GaAs/Si solar cell. 11 This has so far been the highest conversion efficiency of any silicon-based multijunction solar cell. 17 The two-terminal configuration allows for a direct integration into modules and the exploitation of existing technology for Si solar panels. The previous wafer-bonded triple-junction GaInP/AlGaAs//Si champion device, however, achieved a lower maximum conversion efficiency of 34.1 %. 18 Other promising developments for cost reduction in multijunction solar cells include the combination of a perovskite/Si dual-junction. This technology has recently obtained a record conversion efficiency of 29.1 %. 19 Hence, combining the high-efficiency multijunction concept with the mature and cost-effective silicon technology is a promising route for redefining the practical solar cell efficiency limit. In this work, we explore the experimental efficiency potential of monolithic  25 With a higher In-and P-concentration, this quaternary material has also been shown to be a promising candidate for applications in a bandgap range of 1.6-1.8 eV. [26][27][28] From the theoretically ideal bandgap combination, we have calculated the actually required subcell thicknesses and bandgaps with an optical model of measured quantum efficiency results of previous III-V//Si batches. 29 The resulting layer structure of the triple-junction solar cell is presented in Figure 3.

| Epitaxial growth of the III-V top structure
The III-V top junction solar cells were grown using metalorganic The III-V dual-junction subcells were grown in two different growth directions, upright and inverted. For both cases, the growth started with a GaInP etch stop layer to allow for selective chemical etching of the substrate. Then, for the upright grown samples, the bond layer was grown first followed by the middle junction, the top junction and the cap layer. In the case of inverted growth, the top junction was grown before the middle junction, and the bond layer was grown last as the uppermost layer.

| Silicon bottom cell
Float zone-grown p-type silicon wafers with a bulk resistivity of 4 Ω cm and a thickness of 280 μm, which had been polished on both sides, were used for the fabrication of the silicon bottom cells.
Tunnel-oxide passivating contacts (TOPCon) 30 were formed on the n-type front and p-type back side. These layers passivate the surface very well and thus allow for a high voltage. A thin oxide was grown in HNO 3 . A 100 nm thick intrinsic amorphous silicon was deposited by low-pressure chemical vapour deposition (LPCVD) on both sides. This layer was then doped by ion implantation of phosphorus at the front and of boron monofluoride at the back side. The amorphous layer was eventually annealed to polysilicon at 850 C. Last, the samples were exposed to a remote hydrogen plasma at 425 C. The front side was polished by chemical-mechanical polishing (CMP) to remove particles and thin the poly-Si layer to around half its thickness. No optimisation of the silicon bottom cell was performed as the largest potential was expected from the III-V top structure improvement. More details of the silicon subcell can be found elsewhere. 12

| Solar cell processing
The two sets of samples were processed differently according to their respective growth direction. In Figure 4, the processing chains for upright and inverted grown samples are illustrated. The upright grown samples were first temporarily bonded to a sapphire carrier wafer.
Then, the GaAs substrate was etched away, and the uncovered bond surface was smoothened by CMP. Next, a direct wafer bond between the III-V layer stack and the silicon bottom cell was performed in an Ayumi SAB100 high vacuum direct wafer bonder. The native oxides resist. 32 Finally, a 1 μm thick silver contact layer was deposited on the nanostructured grating.

| Voltage gain by improved subcell absorber material
The improvement in open-circuit voltage compared to the previous champion device 18   Therefore, if the growth direction is reversed and the GaInP junction is grown last, the detrimental effect of the temperature-induced diffusion processes is less severe.

| Comparison between upright and inverted grown solar cells
Due to the more complex processing chain of the upright route, which included additional steps such as the temporary bond to a sapphire wafer, the demands on the homogeneity of each process step are higher. As can be seen in the lower part of Figure

| Comparison to other champion devices
The presented III-V//Si triple-junction device is limited in its performance by the bandgap constraint of the Si bottom cell. In Figure 9, the open-circuit voltage W oc,tot ¼ P i E g,i À V oc is higher by 30 mV for the wafer-bonded case. In the radiative limit the bandgap-voltage F I G U R E 8 Top: Photograph of the wafer X633 with the upright grown record cell structure (left) and of the wafer X672 with the inverted grown cell structure (right). Under white light illumination, the GaInP top junction emits visible red light where the wafer was not harmed during the processing. This is a sign of high external radiative efficiency and thus high material quality. Bottom: Open-circuit voltage of all working cells on the wafers. This measurement was conducted under an uncalibrated AM1.5g spectrum resulting in slightly higher voltages for all cells than for the calibrated measurement shown in Figure 6. Given the agreement of the absolute height of the EQE in the areas without absorption limitation, that is, in the short-wavelength part of each junction peak, there is little opportunity for improvement of the III-V//Si device in terms of current. However, the voltage benefit could still be further exploited if the loss to the radiative limit in each subcell is further reduced, the top cell bandgap is increased, and additionally, the mesa trenches are passivated which will be implemented in a future batch. If a constant current density and the fill factor of the IMM3J are assumed, then a voltage increase of 86 mV would suffice for equal efficiency as the IMM3J, which is realistic with the improvements mentioned above.

| CONCLUSION
We have shown how the efficiency potential of silicon-based multijunction solar cells can be further exploited. By choosing III-V semiconductor materials that can be deposited with a high crystal quality at the right bandgap and by improving the MOVPE growth conditions for these materials, we were able to present a two-terminal wafer-bonded triple-junction solar cell which sets a new efficiency record with 35.9 % under an AM1.5g spectrum. In particular, the employment of a GaInAsP middle junction resulted in a significant voltage gain. Two growth directions, upright and inverted, were evaluated. High efficiencies of 34.5 % along with a reliably high yield of equally well-performing cells per wafer can be achieved with inverted grown top cells that are directly bonded to a silicon bottom cell. The highest efficiencies with a slightly less uniform performance on a wafer could be realised with upright grown top cells that had to be processed with an additional temporary bonding step. If the degradation of the top cell can be solved, for instance, by lower growth temperatures or different p-type doping agents, the inverted route would be the preferred alternative due to the simpler processing and the higher yield.
It was demonstrated that a monolithic, two-terminal silicon-based multijunction can achieve at least the same efficiency as the currently best performing four-terminal device with 35.9 %. 11 No separate interconnection of the mechanically stacked subcells is required for the two-terminal configuration as it is the case for the four-terminal configuration. Hence, installation costs of modules made from such cells are lower. If the costs can be reduced in the future, the presented results may therefore increase the market entrance chances for III-V//Si solar cells. Life-cycle analyses have shown that the III-V//Si technology has the potential to be comparable or even superior in environmental impact compared to single-junction silicon solar cells of today. 42 From comparing this cell to the currently best triple-junction device, we found that despite the nonoptimum bandgap combination, the silicon-based cell compares well with the best-in-class device in terms of voltage even after the different bandgaps are considered.
The current can likely not be improved much further with a Si bottom cell because of the constant transmission losses at photon energies below 1.12 eV. There is still some room for improving the subcell F I G U R E 9 (A) External quantum efficiency and (B) current-voltage characteristics of the record inverted metamorphic triple junction (IMM3J) by SHARP 40 (black, squares) compared to the presented III-V//Si solar cell (red, circles). In the insets of the left diagram, the bandgaps and the difference in short-circuit current density of each subcell are given. The grey shaded areas indicate the advantage in photocurrent generation. The sum of the subcell EQEs is shown with a solid line. The external quantum efficiencies of the subcells were scaled according to the calibrated AM1.5g short-circuit current density from the IV characteristics absorbers, though, for example, by increasing the top cell bandgap and thus voltage with the use of AlGaInP, integrating a rearheterojunction into the middle cell, and passivating the mesa trenches to reduce edge recombination losses in the silicon bottom cell.