Double‐sided nano‐textured surfaces for industry compatible high‐performance silicon heterojunction and perovskite/silicon tandem solar cells

Nano‐textured surfaces are an intriguing approach for optimizing the optical characteristics for monolithic perovskite/silicon tandem solar cells. Here, the development of different textures of silicon surfaces using various commercial additives is presented and their performance in silicon heterojunction (SHJ) and SHJ–perovskite tandem solar cells is discussed. After optical and electrical characterization, we show that nano‐textured surfaces can easily compete with standard textured surfaces, yielding higher average efficiencies in single junctions. In addition, their compatibility with solution‐processed perovskite top cells is demonstrated, yielding a perovskite/silicon tandem solar cell efficiency of >28% on a bottom cell with nano‐texture on both sides.


| INTRODUCTION
For many solar cell types, optimizing light in-coupling by textured surfaces is not compatible with electronically optimal growth of subsequent layers on top of the textured surface. Therefore, nano-textured silicon surfaces became an appealing approach to enhance light trapping in the silicon bottom cell absorber for metal-halide perovskite/ silicon tandem solar cells. 1,2 Moreover, in commercially available silicon heterojunction (SHJ) solar cells, nano-textured surfaces might also have the potential to replace standard textured surfaces that normally feature random pyramids with heights in the range of 1-5 μm.
Especially for cell production, where the expenses for the silicon wafer represent the highest cost factor in production, 3 a reduction in silicon loss due to lower etching abrasion of the wafer could be an interesting option to reduce costs. Since the texture not only is crucial to enhance light trapping but also has a high impact on the surface defect density, electrical properties of the c-Si wafers, such as the lifetime of the minority charge carriers, are influenced as well. It was shown previously that a reduced pyramid size still results in excellent passivation and minority carrier lifetimes. 4,5 To allow the wet processing of the perovskite absorber, which normally has a thickness of 0.5-1 μm, the pyramid height must be well below 1 μm to prevent the generation of local defects or shunts in the top cell. 1,4 Different methods can be used for the deposition of the perovskite film, such as blade-or slot-die coating, physical vapor deposition, or spin coating. Until now, the latter is the most successful technique at lab scale, providing high film quality on flat surfaces as well as on mild textures. [6][7][8] For example, Hou et al. 6 combined a mild silicon texture with pyramid heights around 2 μm with a solutionprocessed wide-band gap perovskite layer in the micrometer range yielding 25.7% power conversion efficiency in a perovskite-textured SHJ tandem solar cell. Recently, the KAUST group even reported a 29.3% efficient tandem cell by wet processing on mild Si texture. 9 Sahli et al. 10 reported on a top cell deposition process on standard textured surfaces. A conformal coating of this Si texture was obtained by using evaporation and a solution-based hybrid process reaching an efficiency of 25.2%. Recently, the EPFL group improved it to 29.2%. 11 To yield nano-textured Si surfaces, different approaches have been published. Most commonly, such textures are obtained by anisotropic surface etching 1,4 but, as recently shown, also by nano-imprint lithography, where reactive ion etching combined with wet chemical etching yields sinusoidal nanostructures with adjustable heights. 12 However, etching in alkaline solution with KOH or NaOH is the most relevant to industry, being a cost-efficient and well-established process. 13 Moreover, the nano-texturing process presented in this paper enables a leaner production of the bottom cell for perovskite/silicon tandem solar cells, since to produce the front polished and textured rear side, multiple additional processes would be necessary.
The optical characteristics of a pyramid-textured surface and hence their impact on the solar cell performance strongly depend on different parameters like pyramid density, height, and homogeneity. 14 To decrease pyramid height, different approaches are possible, such as decreasing etching time, increasing KOH concentration, or adding an increased amount of isopropyl alcohol (IPA) to the etching bath. 15 However, these processes often do not ensure a very uniform texture but show a broad pyramid-height distribution. One important reason for such an inhomogeneous etching result is the development of H 2 during the etching process. 14,16 Namely, in a redox reaction, silicon reacts with KOH in the presence of water as follows: The gaseous hydrogen reaction product aggregates to bubbles of different sizes that act as pseudo-masks on the hydrophobic silicon surface, retarding the etching process at some points on the wafers, which disturbs a uniform transport of reactants and products from the silicon surface. This leads to inhomogeneous initiation of the etching reaction on the surface and, consequently, to different pyramid densities and heights. The more hydrophobic the silicon surface, the bigger the H 2 bubbles and the bigger the pyramids after etching. 14,16 To avoid such inhomogeneous results, surface-active chemicals are used as additives during etching. It was shown that using IPA, the wettability of the surface was increased 17 and, hence, H 2 bubbles were avoided, yielding a higher homogeneity of the textured surface.
The pyramid heights depend also on the etching rate, that is, the amount of etched material over time. The higher the etching rate, the larger the resulting pyramid height. Counter-intuitively, by adding more KOH, the etching rate slows down due to a self-liming etching process at the Si surface, leading to the formation of smaller pyramids.
Etching small pyramids in such way, however, holds the chance of an incomplete coverage of the surface by the pyramid texture. 15,18 Another possibility to influence the etching rate is adding other additives, such as potassium silicate (K 2 SiO 3 ) or sodium silicate (Na 2 SiO 3 ).
It was shown in 4 that the addition of K 2 SiO 3 slows down the etching rate and ensures improved control of growth and nucleation kinetics.
Following Equation (1), the equilibrium of the reaction is shifted to the educts, which leads to slower etching. This can be seen in the decrease in pyramid height when adding more K 2 SiO 3 . 4 To yield excellent performance in solar cells, nano-textured surfaces must show low reflectivity, for which it is crucial to ensure the complete coverage with pyramids with a uniform pyramid height.
Therefore, although the pyramid height can be adjusted by the concentration of KOH and silicate in the etching solution, many published studies use commercially available surface-active additives.
The exact composition of such additives mostly remains undisclosed, which makes it difficult to unravel the chemical processes involved.
Nevertheless, since these have surfactant components, they are of great importance for good surface wetting during the etching process.
In this work, we investigate three different texture processes (A, B, and C), which all contain different commercially available additives. First, the texture process A for nano-textures is shown, containing an anionic surfactant as an additive. Furthermore, texture processes B and C are investigated in detail, of which the latter is split in processes C. 1  First, all samples have been subjected to a standard saw damage etching (SDE) step with high KOH concentration at 90 C.
The subsequent texturing step was carried out in an alkaline solution consisting of DI water, KOH, K 2 SiO 3 , and a commercial additive at 75 C. Three different additives were used, in the following referred to as texturing processes A, B, and C. Since for our standard texturing process for micro-pyramids the same commercial additive is used as in the process C, we denote the process for nano-textures "C.1" and for micro-textures "C.2." The texturing process C.2 for the standard micro-texture contains DI water, KOH, and the commercial additive C. It is carried out at slightly higher KOH volume fraction, at lower additive concentration, and at a higher temperature (80 C) with a texturing time of 8 min.
First, we developed texturing process A. Here, we investigated the influence of the ratio of concentration F = KOH/K 2 SiO 3 , the etching time, and the concentration of the commercial additive on the pyramid structure. Having optimized texture process A in an extensive parameters study in terms of a promising process for tandem solar cells applications, namely, small pyramid height (<1 μm) and low standard deviation, we then applied the commercial additives B and C with the same parameters, to investigate the impact on the texture. Here, we assumed that the variation of the additive will not drastically change the picture and will not require a complete reoptimization of the process. The focus of this work, however, is not to find the best additive but to correlate the wafer texture with solar cell performance. After the texturing step, all samples were cleaned by an RCA final cleaning procedure. The different textures were characterized by scanning electron microscopy (SEM) imaging. An in-house developed software tool was used to determine the distribution of pyramid heights.

Optical reflectivity was measured by using a Perkin Elmer
Lambda 1050 spectrophotometer in the wavelength range 250-1200 nm.

A. Silicon heterojunction solar cells
To investigate the impact on device performance, we integrated differently textured wafers in rear-junction, bifacial SHJ solar cells.
We used wafers X, having an initial thickness of 130 μm and a base resistivity of 5 ΩÁcm, for all the texturing processes. In addition, for texturing process A, a set of samples on the 160-μm-thick wafers of type Y with a resistivity of 1.2 ΩÁcm were used. 3 | RESULTS

| Nano-textured silicon surfaces by anisotropic etching in KOH solution
For optimizing the nano-texture, we first adjusted the volume fraction The resulting topography clearly emphasizes the critical dosing of the commercial additive for homogeneous pyramid formation (cf. Figure 1). Both too low (φ A = 1.07Á10 À2 ) and too high (φ A = 1.27Á10 À2 ) volume fractions result in a large fraction of flat areas, which will increase reflection and reduce the ability to couple light into the Si wafer and, potentially, will lead to a more inhomogeneous passivation layer thickness. A medium volume fraction of 1.17Á10 À2 is found to be optimal for a good wetting during etching and, hence, a high coverage with pyramids.
Therefore, for the rest of the experiment, this commercial additive in process A was used with a constant volume fraction of In the next steps, we addressed the optimization of the ratio of volume fractions F = K 2 SiO 3 /KOH and its impact on pyramid height, pyramid density, and reflectivity. Figure 2 shows SEM images of the texture achieved by etching with different ratios F = 0.4, 1.0, 1.4 and without the addition of any K 2 SiO 3 (F = 0). Our standard micro-textured surface (later on referred to as texturing process C.2) is shown for reference. In addition, the height distribution of pyramids is displayed in Figure 2.
Increasing F, that is, by increasing the K 2 SiO 3 volume fraction, the pyramid density increases and the average pyramid height decreases.
Adding the same amount of K 2 SiO 3 as KOH, the pyramid density increases by a factor of 1.  removed. This allows to use thinner wafers if the aim is a certain final thickness, or if using the same starting material, this will lead to an increased final wafer thickness and hence a better NIR response.
Since for F = 1.0 yields an average height of the pyramids (490 nm) with a fraction of pyramids that are below 1-μm height of 98%, and in addition, reflection was still very low, we decided in the next step to stick to this ratio, that is, K 2 SiO 3 volume fraction, keeping all other parameters constant but exchanging the commercial additive, while always using the same volume fraction of φ = 1.17Á10 À2 .
F I G U R E 2 Histograms of the pyramid heights and interquartile ranges of the distributions (above) of a standard micro-textured surface (C.2 = reference) and surfaces etched with different ratios F but constant volume fraction of the additive A φ A = 1.17Á10 À2 and their corresponding scanning electron microscopy images. All samples were etched for 20 min at 75 C.
The samples characteristics of the texture processes A-C.2 are shown in Table 1 for both wafer types, X and Y. Next, the samples shown in Table 1 were passivated with a stack Comparing nano-texture and micro-texture, the importance of the surface topography becomes apparent. Keeping in mind that volume recombination and surface recombination coexist, and the bulk recombination should be comparable for all wafers of the same type and from the same batch, it is most likely that the difference in lifetime is due to the different surface recombination velocities. Therefore, we propose that nano-textures lead to lower surface recombination, hence higher lifetimes.
Comparing wafer types X and Y, the lower resistivity (and larger thickness) of type Y wafers comes with higher bulk recombination, which is reflected in a lower iV OC and a lower lifetime, in particular for low injection (2.5 ms vs. 4.2 ms at Δn = 10 15 /cm 3 ), as can be seen in Figure 4B. In addition, not shown here, type Y wafers yield the highest saturation current densities J 0e in solar cells, which also correlates with lower lifetimes.

A. Silicon heterojunction solar cells
Wafers with the different texture processes A, B, C.1, and C.2 were used for SHJ solar cells. Figure 5 shows the cell parameters as determined from the JV curves. The short-circuit current density J SC , the open-circuit voltage V OC , the fill factor FF, and the power conversion efficiency η are shown for all texture processes.
As expected from the lifetime measurements, type Y wafers yield cells with the lowest V OC , with a median of 739.2 mV being in average 4 mV smaller than for cells on type X wafers. Not only is lifetime lower for type Y, but also recall that the wafer is thicker by $20 μm, which explains the higher J SC . However, iV OC values after PECVD and   Despite the higher reflectivity, the nano-textures do not show a significant difference in EQE in the NIR range compared to the microtexture. In the short wavelength range, both textures perform similarly.
Next, the results of the (20 nm thicker) type Y wafer are compared to those of type X wafer, both with the same texture process A. For type Y wafers, a small loss at short wavelengths is overcompensated by the increased EQE in the NIR range (800-1200 nm), leading to an overall gain of 0.2 mA/cm 2 , resulting in the highest value of J EQE = 39.9 mA/cm 2 . The gain in the NIR range is expected and ascribed to the thicker wafer.
In conclusion, nano-textures do not lead to a loss in current and exhibit high pFF, resulting in high efficiencies. All JV parameters were similar or even slightly better as compared to those of cells with our standard micro-texture C.2. In particular, the potential current density loss in the NIR range, most relevant for the application as bottom cells in tandems, is very low.

B. Perovskite/silicon tandem solar cells
To demonstrate their high potential as bottom cells, we processed perovskite/silicon tandems using monofacial SHJ cells on type Y wafers using texture process A for both sides. A monofacial SHJ cell using float zone material ($260-μm Si thickness) featuring a polished front and a micro-textured rear side, as usually used in our best tandem cells, serves as reference. For the top cell, a similar process was used as that presented by Al-Ashouri et al. 22 Despite the textured surface of the bottom cell, spin coating of the self-assembled monolayer (hole transporting material) and the perovskite absorber was achieved with complete coverage of the nano-pyramids.
The JV scans and the JV results from maximum power point (MPP) tracking of the best tandem devices are shown in Figure 7A.
A power conversion efficiency of 28.4% is reached with nano-texture. The EQE presented in Figure 7B shows that the sub-cells of shunted areas in the active area. This is also indicated by SEM images as shown in Figure 7C. The cross-section image shows that the (small) pyramids are well covered by the perovskite layer, with thicknesses ranging between 400 and 750 nm, due to the nonplanar substrate.

| CONCLUSION
To summarize, we showed that anisotropic surface etching of random pyramids in the sub-micrometer range is an appealing process for industrial SHJ single junction solar cells and even more interesting for industrialization of high-efficiency monolithic perovskite/SHJ tandem solar cells. For tandem cells, a uniform and small-sized Si texture is crucial in order to be able to wet process the perovskite top cell. We showed that sub-micrometer sized random pyramids by an adjusted wet etching process are an interesting approach not only for such tandem solar cells but also for SHJ single junction solar cells. By finding an optimum composition of the etching solution, the pyramid height and distribution can be adjusted. We confirm the results previously shown in 4 that by adding K 2 SiO 3 and increasing its volume fraction, the etching reaction is retarded, resulting in smaller pyramids. Strongly depending on the type of commercial additive, the pyramid height and density change significantly, leading to different electrical and optical performance of SHJ solar cells. The reflectivity of wafers can be kept similar and current losses in cells are completely avoided as compared to micrometer-sized standard textured Si. Excellent passivation quality was measured on nano-textured and passivated surfaces with lifetimes in excess of 5 ms, which we propose is due to lower a-Si:H/c-S surface recombination. All JV parameters were similar or even slightly better as compared to those of cells with our standard micro-texture.
Finally, we demonstrated the high potential of nano-textured SHJ cells in perovskite/silicon tandem solar cells, reaching an efficiency of 28.39% with a both sided nano-textured surface on Cz-Si-based bottom cell, compatible with industrial production. We successfully developed a textured surface with small pyramids and a narrow height distribution that is suitable to be covered completely with a solution-processed perovskite layer. We expect that the presented processes will be easy to be implemented in industrial production and, hence, will contribute to the development of a production process for highly efficient tandem solar cells.
funding enabled and organized by Projekt DEAL.

CONFLICT OF INTEREST
The authors declare no conflict of interest.

DATA AVAILABILITY STATEMENT
The data that support the findings of this study are available from the corresponding author upon reasonable request.
F I G U R E 7 Perovskite/silicon tandem solar cell (A) JV data and (B) external quantum efficiency (EQE) measurement of the champion device; (C) scanning electron microscopy image of the crosssection of a tandem with a nano-textured bottom cell. FF, fill factor; PCE, power conversion efficiency.