Field‐representative evaluation of PID‐polarization in TOPCon PV modules by accelerated stress testing

Potential‐induced degradation‐polarization (PID‐p) can reduce module power, but how to project the extent to which PID‐p may occur in field conditions considering the factors of system voltage, condensed moisture, temperature, and illumination has not been clarified. Using tunnel oxide passivated contact (TOPCon) modules, this work demonstrates a method to test full‐size crystalline silicon PV modules for PID‐p to provide field‐representative results. In initial screening tests with positive or negative 1000 V electrical bias applied at 60°C for 96 h using Al foil electrodes on the glass surfaces, the module type exhibited reversible PID‐p only on the front face when the cell circuit was in negative voltage potential. No PID was detected on the rear after testing in either polarity. We then evaluated the PID‐p sensitivity on the front side under different UV irradiances while maintaining the glass surface wet to estimate real‐world susceptibility to PID‐p. The magnitude of the observed behavior was fit using a previously developed charge transfer and depletion by light model. Whereas power loss with −1000 V applied to the cell circuit at 60°C for 96 h in the dark was about 30%, testing the module front under 0.051 W·m−2 nm−1 at 340 nm UVA irradiation using fluorescent tubes, the mean degradation was only 3%. When the modules were tested in the dark for PID‐p with in situ dark current–voltage (I‐V) characterization, the thermal activation energy for degradation was 0.71 eV; for recovery in the dark, it was 0.58 eV. Whereas recovery from the degraded state at 60°C in the dark without voltage bias was 5% absolute in 38 h, rapid recovery of about 5% absolute was observed with 1000 W·s/m2 exposure at 25°C using a flash tester.


| INTRODUCTION
Potential-induced degradation (PID) occurs when charges migrate under an electric field associated with system voltage potential, accelerated by moisture and elevated temperature, leading to power loss and sometimes delamination in the module package.2][3] Polarizationtype PID (PID-p) in Si cell technologies occurs when charge drifts within the passivating dielectric antireflective coating toward or away from the Si in such a way that it increasingly electrostatically attracts photogenerated carriers in the Si to the dielectric interface promoting their recombination, resulting in a loss of photocurrent and cell voltage. 4,5[7] There are several reports of PID-p in the field, 4,8 including an instance where field performance decreased 20% after several months of operation. 4The extent and rate of PID-p recovery under illumination may vary between PV cell technologies. 6,9A method to forecast the conditions for the occurrence, magnitude, and recovery of PID-p as it may occur in the field has not been established, including in standards.Therefore, a laboratory test for the characterization and modeling of the real-world PID-p behavior of commercial full-size modules is required.Further, the PID sensitivity of modules with TOP-Con cell technology has only been minimally studied. 10rst, we perform a screening test to assess the susceptibility to PID-p of both faces of a TOPCon module in both polarities.We then demonstrate a method for PID-p testing with the factors of voltage, condensed moisture, temperature, and light with the TOPCon module.
We evaluate the PID-p rate with three levels of irradiation simultaneously applied using UVA fluorescent lamps and apply a previously developed charge transfer and depletion by light model to the results.
We also quantify PID-p rates in the dark at different temperatures and recovery rates with the factors of temperature and light separately to quantify the sensitivities and to model the effects.

| Test samples and PID screening test (dark)
We obtained three identical 405-W bifacial glass-glass TOPCon modules with ethylene vinyl acetate encapsulant for the various testing in this work.The TOPCon cell structure is shown in Figure 1 and has been described previously. 11,12The characteristic standard test condition (STC) short-circuit current (I sc ) was 10.1 A, open-circuit voltage (V oc ), 50.4 V, and fill factor (FF), 0.796.We first tested a module for PID on both the front and back, with the cell circuit in positive and negative polarity, in four separate tests in the dark at 60 C and about 5% relative humidity.We placed aluminum foil on the module faces to obtain a voltage potential between the À1000 V biased cell circuit and each module face being stressed with voltage potential separately.The 1000 V system voltage level was chosen according to the nameplate rating of the module under test.Testing with this technique, which has been introduced in several previous publications, 6,13 is intended to limit the electric field stress and degradation to one module face only.To implement this, the Al foil placed on the unstressed side was maintained at the same voltage potential as the cell circuit to limit the electric field and the PID effect to the face being tested, which had the Al foil connected to ground with leakage current monitored.Polyimide tape was placed on the module frame where it meets the glass to electrically isolate it with the objective to limit conduction from the Al foil through the frame between the module's two faces.

| PID-p stress test under UV irradiation
Next, we performed PID-p testing under UV irradiation.PID-p testing with the application of UV irradiation is motivated by studies on interdigitated back contact, 4,9 n-base passivated emitter and rear totally diffused (n-PERT), 7 and passivated emitter and rear cell (PERC) modules, 6 where the rate of recovery of PID-p in PERC modules showed a maximum with irradiation in the range of 300-340 nm. 6nsitivity to UV irradiation has been reported based on the photoconductivity of silicon nitride antireflective coating, which adds a shunt resistance over the cell surface, bleeding off PID-p-causing charge. 5It should be considered that the spectral dependence of PID-p recovery may differ among different PV technologies.For crystalline silicon technologies, several factors influence the properties of silicon nitride and the resulting optical properties.Generally, UV absorption in silicon nitride increases approximately exponentially as the wavelength is reduced into the UV. 14 Higher silicon content in the silicon nitride leads to a higher index of refraction, 15 a higher threshold wavelength, and increased absorption for UV. 14,16Cell makers may balance the choice of index of refraction to reduce absorption for a higher photocurrent with some level of UV absorption in the lower wavelengths in the incident solar spectrum, which provides photoconductivity to reduce PID 17 and for improved matching to glass for better optical performance on the module level. 18r testing PID-p under light, an array of Q-Lab UVA-340 fluorescent tubes adhering to the solar spectrum below about 365 nm 17 combined with fine steel meshes used as neutral density filters were used to achieve the specified irradiation level.The apparatus was contained in a thermostat-controlled heated and fan-cooled fiberboard from ASTM G-173-03 at 340 nm).The modules were flash tested before the PID testing and subsequently removed for flash testing at 3, 24, and finally 96 h with the gel and transparent film applied.Any bubbles that formed under the transparent film were driven out with a plastic spatula before flash testing.We found more bubble formation from volatizing gel under the PFA film than under the PET film, tentatively attributable to PFA's lower water vapor transmission rate and water solubility, 19 but we also found reduced UV transmissivity over multiple uses of the PET film due to its susceptibility to UV degradation.Between 96-h PID-p tests, modules were exposed with the gel and transparent film removed to sunlight of 20 kWh/m 2 dose, more than is required to verifiably recover the PID-p and repeatably restore the module to within a range of ±0.5% (relative) power over the course of more than 10 different PID test and recovery cycles.This recoverability also suggests minimal UV degradation of the encapsulant and cells within the scope of this testing.
Using our previously published model, we analyzed the maximum extent of degradation observed in each of the aforementioned 96-h test segments. 7That work quantitatively showed that as encapsulation resistance and illumination increase, the rate and maximum extent of PID-p decrease, respectively.According to that analysis, the charge density Q developed over time t within the dielectric passivation stack that causes PID-p is the equilibrium between charge migration into the cell's dielectric due to the electric field from the system voltage, V, and the depletion of charge by UV irradiation, E.
This can be expressed as where ρ and l are, respectively, the terms for resistivity and thickness of the encapsulation.The rate constant k describes the efficiency at which incident UV irradiation depletes, or, more descriptively said, facilitates the removal of charge from the dielectric by photoconductivity.This is a first-order differential equation that was evaluated numerically in this work.Charge density is then used in an empirical sigmoidal equation to describe the power loss due to PID-p that is discussed in the results below.

| PID-p recovery test under illumination
Recovery of PID-p after PID stress testing under light was examined using a Sinton FMT-500 flash tester.The lamp source was class C for spectral adherence.Figure 2 shows the UV portion of the spectrum that was provided by the vender with the irradiance scaled to that of the AM1.5G spectrum between 300 and 1200 nm. 20 F I G U R E 2 Visualization of the lamp spectrum in the ultraviolet range that was used for recovery and flash testing compared to the air mass 1.5 global (AM1.5G)spectrum.

| PID-p stress and recovery test under dark conditions
Degradation by PID-p and recovery tests, both in the dark, were also performed at several temperatures to evaluate the activation energies for these processes.While testing for PID-p in the dark, we took dark I-V curves on an hourly basis and analyzed them using superposition to determine the normalized maximum power with the aid of ex situ flash testing.Flash testing at STC was performed (1) initially, from which the short-circuit current was obtained and used for superposition; (2) during the course of the stress test, only as a check of the analysis; and (3) after the stress testing, to obtain the final maximum power point to construct STC degradation and recovery curves.The present analysis is done in a manner similar to the methods described in 21 and. 22In principle, the fraction maximum power remaining evaluated using superposition of the dark I-V curves measured at each hour is scaled by the difference between the end-of-test maximum power degradation point in chamber (at test temperature) and the final STC degradation point measured by flash testing.All maximum power points P in the analysis are normalized to the initial that is measured before the start of degradation, both for STC measurements and for those obtained at the stress temperature by means of superposition of dark I-V curves.The equation used to obtain the normalized STC maximum power degradation curves and recovery from the dark I-V curves is  We first performed a screening test to evaluate the PID-p susceptibility of the front and back of the TOPCon module; see Figure 3. Flash testing was performed on the side of the module stress tested in each polarity.We can see significant degradation after 96 h of 60 C stress testing with the electric field on the front face with À1000 V potential applied to the cell circuit only.The power loss from PID-p on the front face results from loss of I sc (16.4%) and V oc (11.1%), though some change in FF can also be seen (1.3%).The total power loss is 27%.
There was no clear PID-p in any of the other three test configurations.
The PID-p susceptibility of the front face of the TOPCon module is attributable in part to the use of boron emitters with sheet resistivity around 180 Ω/◻ 23 and the low solubility of B in Si, which leads to relatively low peak concentration (1 Â 10 19 cm À3 range) of B in the p + emitter. 24An emitter with low p + concentration produces a weaker surface field, reducing the repulsion of minority carrier electrons from the front interface with the dielectric.Then, under negative system voltage, more front surface recombination results from positive charge migrating through the front-side encapsulation toward the dielectric that can further attract minority carrier electrons from the underlying p + emitter. 7On the other hand, we speculate that because the rear is highly doped n + polysilicon, 25 rear surface recombination is minimally affected by changes in the charge state of the dielectric, as has been proposed previously. 10Because of the absence of degradation on the front face with the cell circuit in positive bias and on the rear with bias in either polarity, the focus of the remainder of the study is the PID-p on the front face with the cell circuit under negative voltage bias.

| PID-p stress tests under UV irradiation
Here, we explore the effects of accumulation of charge while the module face is wet with conductive gel and under a PID-p-inducing electric field simultaneous with the removal of that charge by UV irradiation.The TOPCon module was tested with À1000 V bias applied to the cell circuit at 60 C module temperature under three different UVA irradiation levels on the front face and in the dark.
Testing at each condition was performed twice.Figure 4 shows the results of flash testing at STC after 3, 24, and 96 h to measure the degradation.Degradation was usually a maximum at the 96 h measurement point, whereas the degradation at the 3 and 24 h points was less significant and in the range of measurement error in the case of the PID testing at the highest irradiance level.The results in Figure 4 are consistent with the PID-p observed in n-PERT mini modules with negatively biased cells, which also have a p + /n front emitter. 7The greater irradiation level causes more depletion of the positive charge in the front dielectric, which reduces the extent of the PID-p.
The Al foil tests in the dark may potentially apply a differing distribution of electric field over the module glass than the gel with a covering UV-transmitting film, which has a lower conductivity.Mean equilibrium leakage currents measured at the 60 C module temperature with the irradiance levels (units of WÁm À2 nm À1 ) 0, 0.051, 0.085 and 0.089 (combined), and 0.154 are, respectively (units of μA), 0.385, 0.388, 0.350, and 0.318 where the 0 WÁm À2 nm À1 level is achieved with Al foil on the face being tested and gel with transparent polymeric film covering is used with the other irradiation levels.The results show no significant difference in leakage current characteristics between the contacting methods, though the trend may suggest lowest leakage current at highest UV irradiance.There was however no indication of conductivity change effects from drying of the gel during the testing that would be expected to appear as a decrease in leakage current magnitude toward the end of the test.
Figure 5 shows the maximum degradation by PID-p at each of the three irradiation levels along with the results of the 96-h testing without any irradiation.These test show that for this module type, under the 0.1-sun-equivalent level with UVA illumination corresponding to 0.051 WÁm À2 nm À1 at 340 nm, the maximum loss in power observed is 3.3% and on average, 3.0%.This result suggests that if such a TOPCon module front face is continuously wet from rain or dew in low irradiance conditions in the field, the module power would be expected to be reduced modestly because of the PID-p during that time of low irradiance and wetness.Under very low irradiance, system voltage may be reduced from that of the usual operating voltage as controlled by the maximum power tracking of a connected inverter, 26 so actual voltage stress driving PID-p would usually be reduced.On the other hand, as PV system voltage increases to reduce system cost, modules would need to be designed more robustly and tested to the levels of those system voltages to avoid PID driven by the increasing voltage potential.The extent of PID-p evaluated here under the factors of voltage bias, irradiation, and temperature is significantly less than that reported in the field for n + /n fronts of interdigitated back contact cell modules (20% power loss) 4 and p + /n front emitters of PERT modules (15% power loss) 8 that have a similar p + /n front emitter structure as the TOPCon modules examined here.We may speculate, in accordance with previous PID studies on TOPCon-type modules, 10 that the industry migration from SiN x /SiO 2 /p + /n (as reported in 8 ) to SiN x A-lO x /p + n passivating dielectrics and emitters in modern TOPCon modules 27 may provide better stability to PID-p stress from voltage bias with illumination.One possible reason is that AlO x contains a built-in negative fixed charge that repels minority carrier electrons from recombining at the front surface, 28 counteracting to some extent the developing positive charge from the PID stress.The detailed effects of the passivating scheme with respect to PID-p resistance under the factors of temperature, voltage bias, and illumination require more study, however.
We applied the empirical model introduced previously 7 to the data collected in Figure 5  Power loss by PID over time under constant stress conditions is sometimes described by a sigmoidal curve, 7,30,31 as is done here.
Power loss is initiated, ramps to a maximum rate, and then levels off: The empirical fitting parameters used are A = 14.37 and B = 4.09 ⨉ 10 7 cm 2 /C, based on prior reports. 7,32As is the case in those prior reports, P ∞ is taken as 0.7, approximately the maximum degradation of the module type tested here without illumination.
Results of the fitting with Equations ( 1) and ( 3) are superimposed on the plot in Figure 5 to quantify how the increased illumination depletes net PID-p-causing charge in the dielectric.
The lower level of degradation may be limited by the surface recombination velocity, 7 or more fundamentally, the number of defect states at the Si interface with the front dielectric.Others have proposed that it relates to the finite number of states, such as K-centers, that can be converted to positive charge in the SiN x dielectric. 32Consistent with the depletion of the charge by light term of the model, when increased UV irradiation is incident on the module during application of À1000 V bias, less PID-p is observed.Under conditions of increasing system voltage of PV modules and PV module strings, we would expect the rate of coulomb transfer according to the V ρl term in Equation 1 to lead to greater net accumulation of PID-p causing charge.

| PID-p recovery under illumination
We seek to understand the rate that modules undergoing PID-p recover under illumination, as when they are removed from stress testing for flash testing.This can provide us with information about the recovery during such a procedure and the rate of recovery in the field after damp, low light conditions that promote PID-p end, and the sun comes out.Multiple flashes of light from a flash tester (having the irradiance spectrum shown in Figure 2) to induce PID-p recovery at 25 C resulted in a rapid rate of recovery of module power; see Figure 6.
The rate of recovery is quantified as a function of the light dose irradiating the module.A linear fit from the degraded state for the range 0.78-0.82fraction power remaining as a function of the total irradiation dose H (Wh/m 2 ) is P max /P max0 ffi 0.778 + 0.207ÁH.We characterized each flash, each of which lasted about 20 ms to produce 2.4 mWh/m 2 .There were 21 flashes producing a total of 0.051 Wh/ m 2 between each measurement point shown in Figure 6.The results suggest that flash testing the module during PID-p testing could lead to non-negligible recovery as can handling the module under illumination with UV content.The results also suggest that in the field, after the module dries out (dew evaporates, rain stops) and the sun comes out, PID-p recovery on the front face should be very rapid for this module type.While it must be considered that the UV spectrum of the flash lamp employed here has excess irradiance in the 300-325 nm range compared to the solar spectrum (Figure 2), the F I G U R E 6 Recovery after PID-p of cell parameters at 25 C with multiple flash tests.A linear fit (hashed line) is applied to the power data.trajectory of the data suggests that, for the power recovery range examined, this module type would experience 5% absolute power recovery with 1000 W/m 2 solar exposure in slightly less than 1 s.

| PID-p stress and recovery test under dark conditions
Degradation under À1000 V bias in the dark was performed at four temperatures and recovery was also performed at three temperatures to evaluate the activation energies of these processes.The determined activation energies allow for comparison with other PID processes and help provide information about the charge conduction mechanism.These results also indicate which processes are important and thus must be included in a comprehensive PID-p model and which are minor (not rate controlling) and may be neglected.For the activation energy analysis, we set the failure level to 5% degradation, which occurred in about 6.4 h at the 60 C condition.
Based on the degradation rates that were measured at four different temperatures (Figure 7a), the activation energy for the degradation process was 0.71 eV.This value is similar to that of conventional PID-shunting (i.e., 0.726 eV), 33 suggesting that similar ionic conduction such as Na + through the module packaging is rate-controlling in both the PID-p seen here and PID-shunting (although the degradation mechanisms at the cell level differ).This, however, differs in behavior from some previously examined PERT cell modules that also have a p + /n front emitter.In such PERT cell modules, the described PID-p is speculated to differ because of the much faster degradation rate and time to saturation of the degradation, which was reported to be on the order of a few minutes at 60 C and less than a minute at 85 C in the dark. 7,32Therefore, technologies with differing elements, including cell structure, dielectric stack, and encapsulant materials, may potentially exhibit different PID-p charge transport mechanisms, nature of charge states developed in the dielectric, and kinetic behavior.
Recovery in the dark from PID-p was also examined; see box.The module front face was covered with a thin layer of conductive water-soluble electrolyte gel (Cone Instruments Clear Wave high viscosity ultrasound transmission gel #17903) using 110 g on the 1.99 m 2 module face to achieve a wet module surface.The gel was connected to the high-voltage DC power supply at several places F I G U R E 1 Cross session of industrial tunnel oxide passivated contacts (TOPCon) bifacial cell.Adapted from Chen et al. 11 using strips of Al conductive adhesive tape adhered to the glass face and then covered by either highly UV-transmitting polyester (PET) or perfluorovinyl ether (PFA) film of 51 μm thickness to keep the gel from evaporating.Modules were tested under UV irradiation at 60 C with irradiance levels of approximately 0.051, 0.089, and 0.154 WÁm À2 nm À1 at 340 nm (equivalent to 0.10, 0.18, and 0.31 suns based on the air mass 1.5 global [AM1.5G]spectrum Figure 2 shows that the lamp exceeds the irradiance of the AM1.5G spectrum in the UV range between 300 and 400 nm.It should also be considered that the irradiance spectrum shape may change during the flash as a function of intensity.Using such a flash, we measured recovery in power after a PID-p stress test as a function of total energy per unit area delivered by the flash tester over multiple flashes. Ti is the measured power fraction remaining during PID testing at each hourly interval i at stress temperature T using superposition of the dark I-V curves with offset I sc measured at STC before the start of the test.P Ti is 1 at the start of the test, and the final such measured value is designated P TF .P STCF is the corresponding final STC flash testdetermined power fraction remaining at the end of the test.Single intermediate STC flash test points taken during the course of the test were used as a check for the calculated STC degradation curve.Data for the second half of each test (after the intermediate STC flash test point) were displaced in time slightly to align and be continuous with the data from the first half of testing, because some PID-p recovery occurred during the module removal.

F I G U R E 3
Screening test to evaluate PID-p sensitivity on each module face.The electric field is applied using grounded Al foil applied to the face being tested, with the voltage and polarity applied as indicated on the plot legend to both the cell circuit and to the opposing face of the module for 96 h at 60 C. Standard test condition (STC) module flash test results indicated in the figure were measured on the face that was stressed.F I G U R E 4 Fraction power remaining, P max /P max0 , determined by standard test condition flash testing of a TOPCon module with À1000 V applied to the cell circuit at 60 C with the module front face wet with gel and grounded over a period of 96 h for different UVA irradiance levels measured at 340 nm as shown on the plot.Results of tests in the dark using grounded Al foil on the module front face are shown referencing the right axis due to the greater magnitude of degradation.F I G U R E 5 Maximum degradation in fraction power remaining, P max /P max0 , observed with À1000 V applied at 60 C over a period of 96 h versus simultaneously applied UVA irradiance level at 340 nm.For reference, air mass 1.5 global spectrum according to ASTM G173-03 contains 0.502 WÁm À2 nm À1 at 340 nm.Two repetitions were performed per irradiance level shown with markers (•).Modeling results are shown by the blue curve on the plot.
to understand whether the observed PID-p behavior can be described using a charge transfer by voltage and depletion by light model described by Equation (1).Considering the polarization charge density Q (t), key terms include the charge depletion, kEQ, where k = 0.065 m 2 /J and E is the irradiance.Lacking resistivity data or a representative encapsulant sample from the commercial module used experimentally, we used measured timedependent resistivity data from a prior study 29 to model the charge transport through the glass-encapsulant laminate with a total frontside thickness 0.345 cm.

Figure 7
Figure 7 shows the degradation and recovery curves of normalized STC P max /P max0 versus time obtained with dark I-V measurements.In some cases, gaps in the data exist due to measurement hardware communication failure.Following a method described previously 21 that uses the principle of superposition, we shifted the dark I-V curves to the fourth quadrant with ex situ I sc measurements taken at the beginning of each degradation or recovery path and scaled the resulting relative maximum power remaining using the final degradation or recovery STC maximum power measurements with Equation (2).The obtained STC P max /P max0 degradation curves were validated with an intermediate flash test point.In many cases, the intermediate flash test point lies slightly above the dark I-V-based curve, which, despite best efforts to keep the module in the dark as much as possible, may be attributable to some recovery during the flash testing process.

Figure 7b .
Figure 7b.For the analysis, the recovery level was set as 5% absolute power recovery, which occurred in 38 h at the 60 C condition.Long

F
I G U R E 7 Results of PID stress testing with À1000 V bias and recovery, both in the dark.(a) Degradation curves obtained by in situ dark I-V measurements and activation energy plot for the rate to failure to the 95% power level, activation energy = 0.71 eV (inset).(b) Recovery curves and activation energy plot for rate of recovery of 5% (absolute) to the 85.5% level, 0.58 eV (inset).Flash test results are indicated by black markers.Round points (•) are used for transforming the dark I-V curves into STC power, and intermediate square markers (◼) are used for validation.