A study on flare minimisation in EUV lithography by post‐layout re‐allocation of wire segments

Indian Statistical Institute, under the aids of the Ministry of Statistics and Programme Implementation Govt. of India. Abstract The feature size in Integrated Circuits (ICs) has been scaling down aggressively, thereby posing more challenges in their manufacturability. Conventional immersion lithography using a laser of 193 nm wavelength produces layouts having distortions that degrade performance significantly. To overcome this bottleneck, Next‐Generation Lithography (NGL) technologies are being developed. Extreme Ultraviolet Lithography (EUVL), one of the popular NGLs, which uses a light of 13.5 nm wavelength. However, irregularities on the photo reflective surface of clear‐field masks used in EUVL, scatter the incident light and cause flare that in turn results in layout pattern distortions and critical dimension (CD) violations. One of the approaches to counter the effect of flare is to utilise dummy metal fills. But this incurs additional mask cost. Herein, a method to reduce the flare variation as well as the average flare distribution for a layout by perturbation of wire segments, without affecting performance at the post‐layout phase, is proposed. The results show reductions of 20% and 11% on an average in the flare variation and flare mean, respectively, compared to that for the original layout for two different flare models studied on three standard sets of benchmark suites. Consequently, a reduction in the dummy fill demand of a similar magnitude is thus obtained.


| INTRODUCTION
IC fabrication in the current technology nodes of 14 nm, is a complex elaborate process which has evolved through many decades. Conventional immersion lithography uses a laser beam of 193 nm wavelength to print the layout features. However, printing sub-20 nm features without distortion is a major challenge due to the huge sub-wavelength Lithography gap [1].
Various mitigation techniques have been developed in order to continue with the immersion lithography system. Multiple Patterning (MP) [2][3][4] and Optical Proximity Correction (OPC) [5][6][7] are popular techniques to mitigate the distortions due to sub-wavelength feature printing. However, all of these mitigation techniques are reaching their limitations with aggressive scaling down of the feature size leading to the development of Next-Generation Lithography (NGLs) techniques.
A popular NGL is Extreme Ultraviolet Lithography (EUVL) with EUV light of 13.5 nm wavelength for printing sub-20 nm process technology nodes [8,9] but the light gets absorbed by most of the substrate materials. So EUVL systems require clear-field masks coated with reflective material for printing on the wafer. On the clear-field mask, areas designated for the layout patterns are covered by the absorbers which absorb EUV light to print the patterns [10].
Irregularities in the reflective material on a clear field mask cause light to scatter from the vacant regions as shown in Figure 1, and is termed as flare in EUVL [10]. Flare changes the contrast between the dark and the bright regions, resulting in severe pattern distortions on the printed layout. Minimisation of the flare is a challenging problem for fabrication using EUVL.
The distribution of flare significantly depends on the density distribution of the layout metal patterns [11]. While uniform distribution of pattern density does not result in reduced flare over the entire layout, it is observed that flare in the central region of the chip is typically much higher than that of the peripheral regions [11,12]. This phenomenon is referred as flare periphery effect [12]. Conforming the pattern density map of the layout to the flare distribution helps to minimise the global effect of flare. Since vacant regions are the source of flare, reduction of the vacant regions on a layout is typically used to minimise the flare. However, region filling strategies such as OPC and dummy filling incur additional mask overhead while degrading the performance of the chip. Moreover, such local mitigation techniques do not always improve the effect of flare significantly [11].
Previous works such as Refs. [10,13] have reduced flare significantly by using extra dummy (non-functional) metal features which are typically introduced in the vacant regions to enhance mechanical robustness. However, these larger number of dummy fills increases the mask cost and the coupling capacitance between the metals if the dummies are placed without considering cross-talk as stated in Refs. [14,15]. Effectively, this may affect the circuit speed.
In this study, the goal is to minimise flare by perturbation of already routed wire segments with no compromise in wirelength. A preliminary version of this work [16] based on Integer Linear Programing (ILP) to reduce flare by reallocation of certain post-routed wire segments, has shown promising results on a set of randomly generated small synthetic circuits but track assignment was not addressed. The main contribution reported here is the total flow for flare reduction for a given layout with the following steps: • An ILP-based solution is obtained to reduce flare by reallocating certain routed wire segments. • A graph-theoretic method is proposed for assigning tracks to these wire segments considering Design Rule Check(DRC).
Furthermore, the flare periphery effect has been studied with two bell-shaped pattern density distribution, namely Gaussian and sigmoidal, in the absence of an accurate model. The corresponding results of reduction in flare and estimated dummy fill requirement for the post-perturbed layouts for the circuits in MCNC, Faraday and ISPD 0 15 benchmark suites have been compared.
Our wire perturbation-based method can facilitate fast and cost effective migration of large volumes of highly optimised complex designs already in production under traditional Immersion Photo-lithography process at fabrcation facilities to the next-generation EUVL system. The proposed method not only preserves the original wirelength in the layout but also reduces the demand for dummy fills to reduce flare further which is corroborated by our experimental results.
The rest of the article is organised as follows. Section 2 includes preliminaries and the problem formulation. Section 3 gives the overview of our proposed method. Section 4 describes our ILP-based density redistribution method for minimisation of flare. Section 5 elaborates our post-perturbation track assignment method. Section 7 illustrates our method of relaxing the ILP to enhance the minimisation of flare. Section 6 discusses the computation of pre and post perturbation dummy demands. Experimental results are presented in Section 9 and concluding remarks in Section 10.

| Flare model
The layout to be printed is given as an image. For an EUVL system, previous researchers [17,18] have computed flare based on the intensity map of layout image. The flare distribution is modelled as a Point Spread Function (PSF) specific to the EUVL projection system. Hence, the flare map of a layout is obtained from the convolution of the applicable PSF with the intensity map of the layout image. However, such computation is very time consuming. Thus the entire layout is divided uniformly into suitably sized rectangular grid cells where each grid cell is denoted as (i, j). The intensity map of the layout image is approximated to the pattern density map of the gridded layout. The values of the PSF considered are also discretised for each of the grid cells.
In the post-routing phase, the interconnection patterns of each net comprise a sequence of vertical and horizontal wire segments placed in different metal layers. Typically, each metal layer has a preferred orientation of the wire segments to be printed on it. As mentioned above, the entire area of a layout is divided into fixed sized orthogonal grid cells where each grid cell can accommodate a fixed amount of pattern area obeying the design rules, and is termed as available area for that grid cell. Few of the terms defined in our earlier work [16] needed to describe our proposed flow, are given below.
Definition 1 For a cell (i, j) the pattern density D p (i, j) is the ratio of the sum of areas of its existing patterns to its available area.
Definition 2 For a cell (i, j) the vacancy density is given as For EUVL with clear field masks, as the vacant regions of the layout contribute to the flare, the vacancy density map D v is used to approximate the intensity map, instead of the pattern density map, during computation of flare map F [10] as follows: F I G U R E 1 Light scattering from irregular reflective surface of the Clear-field mask PAUL ET AL.
where F(i, j), D v (i, j) and PSF(i, j) are, respectively, the value of flare, the vacancy density and the discrete PSF corresponding to the cell (i, j) in the gridded layout.

| Problem statement
Flare mitigation can be achieved by a change in the pattern density distribution of a layout. The pattern density of the layout can be changed by either (i) introducing dummy metal fills, or ii) moving (perturbing) certain wire segments of the nets to other predefined parallel routing tracks on the same metal layer. We formulate the problem considering the latter approach of moving the segments to obtain a new pattern density map for flare minimisation without sacrificing the wirelength of the layout. Without loss of generality, ae set of patterns for wire segments on only one metal layer is processed at a time for flare reduction and referred as the layout in the remaining article. A few definitions are needed first.
Definition 3 A wire segment s in a layout is said to be movable if it can be moved to another predefined parallel routing track without increasing the wirelength of its net.

Definition 4
The perturbation range r(s) of a wire segment s in a layout is the set of routing tracks, parallel to s on either side of s, on which s can be moved without increasing the wirelength of its net.
A wire segment s which is not movable is termed as fixed. A target pattern density map D t p is modelled for a given layout in order to minimise flare. The goal is to achieve D t p by perturbation of wire segments in the layout. The problem of flare reduction by wire perturbation can be stated as in Ref. [16]: Problem 1 Given a uniformly gridded layout with W � H cells, the PSF and the target pattern density map D t p , determine the set of movable segments S = {s i |1 ≤ i ≤ k}, and re-allocate each of these to a grid cell within its perturbation range r(s i ), such that the sum of the difference between the pattern density map D p after reallocation and the target density map D t p , that is,

| OVERVIEW OF OUR WIRE SEGMENT PERTURBATION
Here, an overview of the proposed method is given that includes computation of flare conforming target density map and the perturbation range of a movable wire segment. The details of ILP formulation and the track assignment are described in Section 4. Figure 2 illustrates the overall flow of our proposed method. A gridded layout and the relevant PSF, typically a 2D-Gaussian distribution, are the inputs. The pattern density map D p and the corresponding vacancy density map D v are computed from the input layout. Equation (1) is used to compute the flare map F for the input layout. In order to capture the flare periphery effect of EUVL systems, we have used bell-shaped curves, obtained from 2D Gaussian and sigmoidal distributions, as target pattern density maps. In the next step, all the movable segments are identified and their perturbation ranges are computed. We then employed our Integer Linear Programing (ILP) based formulation proposed in Ref. [16] with an enhancement to re-assign the movable wire segments in order to satisfy the target pattern density map with no increase in wirelength. Re-allocation of the movable wire segments to the grid cells is followed by their track assignment using an improved version of the method proposed in Ref. [19]. The new flare map is computed for the post-perturbed layout. Finally, the flare variation and the mean flare of the perturbed layout is reported. We also compute the dummy fill demand map corresponding to the pattern density map of both the input and the modified layout generated after the perturbation for comparison.

| Estimation of target pattern density
In order to guide the wire segment perturbation, a target pattern density map has to be used. Higher pattern density at the centre of the chip results in the reduction of flare due to the flare periphery effect as stated in Refs. [11,12]. Hence, layout density needs to be high for a range over the centre and low in the peripheral region of the layout. Similar observations are also stated in previous researches such as Refs. [10,13]. Consequently, a concave bell shaped target pattern density distribution is used to capture the flare periphery effect suitably. In this work, we have considered two models of pattern density distribution, namely, (1) Gaussian and (2) sigmoidal as considered by us in Refs. [16,19], and studied extensively the effect on flare reduction. The Gaussian and sigmoidal distributions used for target density estimation reaches their maximum heights at the centre of the layout. The changes in the gradient of sigmoidal distribution is lower than the same in the Gaussian distribution up to a certain range from the centre of the layout. However, sigmoidal distribution changes abruptly outside that range from the centre, where as gradient of Gaussian distribution changes gradually. Figure 3

| Gaussian target pattern density
The target pattern density distribution is generated from a Gaussian function as in Equation (2), where the mean is considered to be 0. The values of i and j represent the indices of the cells in a gridded layout. Therefore, the co-ordinate system is such that the origin (i = 0, j = 0) lies at the centre of the chip. For a 2D normal distribution with σ as the standard deviation, it can be easily shown that the volume within 2σ distance of the mean covers 95% of the total volume of the distribution. Hence, the distance from the centre of the layout to its boundary is chosen as 2σ of the desired normal distribution for representing the flare periphery effect. This Gaussian distribution function with its maximum at the centre of the layout normalised to one is given by: 3.2.2 | Sigmoidal target pattern density A sigmoidal function as given below in Equation (3) is used to generate a target density map. Figure 4(a)-(c) shows the steps of generating the final 2D-Sigmoidal distribution as given in Equation (4). The final sigmoidal target density map M(i, j) is shown in Figure 4(c) with the maximum value at the origin, that is, at the centre of the chip.
ffi ffi ffi ffi ffi ffi ffi ffi In Equation (4), the parameters α and β, respectively, determine the sharpness of the curve, and the offset to translate the curve to the centre of the first quadrant. The 2Dsigmoidal curve shown in Figure 3(c) has the value of α same as that of σ in Figure 3 The generation of the target density map varying the values of α and σ is revisited as explained later in Section 9 for better reduction of flare parameters.

| Computation of perturbation range
A routed net has vertical and horizontal segments laid out onto the predefined routing tracks at uniform intervals on the layout. The different segments of a net are typically connected by vias. A wire segment of the routed net on the layout is perturbed by shifting it to a new routing track along its original orientation without any change in its wirelength. Note that, the wirelength of a net increases if a segment having fixed pins on either side is moved in left-right (for vertical) or up-down (for horizontal) directions. Perturbation range cannot be defined for these fixed segments. For each movable segment, we compute the perturbation range similar to Ref. [16] which preserves its wirelength. A few wirelength preserving patterns similar to Ref. [20] as shown in Figure 5 are identified for this purpose. In Figure 5, the vertical segments in all these patterns can be perturbed within a perturbation range X bl to X tr , preserving the connectivity and wirelength of the pattern.
The perturbation range is computed as the smallest rectangle enclosing a segment and the segments that are orthogonally connected to it. Once the perturbation range r i is defined for a segment s i , it can be moved to any valid routing track within r i = {(X bl , Y bl ), (X tr , Y tr )}. Such a movement preserves the connectivity of the net and does not increase the wirelength as well. Here, (X bl , Y bl ) and (X tr , Y tr ) are the coordinates of the bottom left and top right corners of the perturbation range, respectively.
The effect on wirelength due to the perturbation of a movable vertical segment s within the perturbation range r is elaborated in Figure 6(a)-(d) and Figure 7(a)-(c). The figure illustrates the perturbation of vertical segments of patterns in Figure 5(a) and (b) to the left or right (dotted arrows) within the perturbation range, respectively. Note that, a wire segment is either movable or fixed depending on the presence of vias or fixed pins at its end(s).
For every pattern in Figure 5, a perturbation range can be computed similarly.

| PROPOSED METHOD FOR ILP-BASED WIRE SEGMENT PERTURBATION
We propose an Integer Linear Programing (ILP) based approach in order to redistribute the density of patterns on the layout conforming to the target pattern density map. As stated before, we divided the input layout into same sized rectangular grid cells for this formulation. Our ILP is formulated for each horizontal or vertical panel of grid cells. The following parameters are computed to formulate the ILP in this paper.
� The current pattern density distribution D p computed from the input layout. � The set of movable segments S P = {s j } to be perturbed within the panel. � The perturbation range r j for each segment s j as computed in Section 3.3 mapped to grid cells. � The target pattern density map D t p computed using Gaussian or sigmoidal distribution as shown in Section 3.2 The objective of the ILP formulation is to minimise the flare. Hence it distributes the layout patterns such that the difference between the target density map D t p and the new pattern density map D p over all the grid cells g in the panel, (c) segment s cannot be moved to its right without increasing the wirelength due to fixed pin (marked red) but can be moved left within dashed rectangle defining its perturbation range; (d) movements not allowed due to a fixed pin that is, ∑ g |D t p ðgÞ − D p ðgÞ| is minimised for the corresponding panel. In order to realize the layout patterns during perturbation, all the density maps in the objective function are converted to the area maps (product of density and total area of a grid cell) in the ILP formulation.
In order to explain the ILP formulation for a panel P (vertical or horizontal) of grid cells a few notations are used as follows: • n c : number of grid cells in the panel • Γ : sequence of grid cells in the panel from left to right, <g 1 ; g 2 ; ……; g n c > • n s : number of movable segments in the panel • i : index of a grid cell in the panel • j : index of a segment in the panel • S P : set of movable segments fs 1 ; s 2 ; ……; s n s g in the panel P • A v i : area in cell g i available for allocation of the segments excluding the area of fixed segments • A s j : area of movable segment s j • A a i : total area of the segments allocated to cell g i given by Equation (5).
• A t i : target pattern area for cell g i given by Equation (6). • w : user defined parameter. • x ij : a binary variable defined as otherwise � For all grid cells g i ∈Γ, A a i and A t i are given as follows, The objective function and the constraints are given in Eqs. 7 8 9 and 10 11, respectively.
subject to: The objective function in Equation (7) provides maximisation of the assigned wire segment area A a i in a grid cell which in turn minimises the term A a i − A t i . Thus, it makes the assigned segment area closer to the target area.
If the area of the segments assigned to a grid cell exceeds the available area, it causes an overflow. The constraint given in Equation (8) prevents such overflow of segment area in a grid cell.
The constraint in Equation (9) keeps the entire segment together inside a single cell. Otherwise, a segment can get split into multiple segments, requiring insertion of connecting segments in different metal layers, thus can introduce multiple design rule violations as well as additional wirelengths.
Equation (10) corresponds to the set of constraints for a pair of segments for preserving the topological order of the movable segments. The set contains constraints for each pair of segment s p and s q such that s p ∈ G P , s q ∈ G P and p ≤ q. Changing the order of certain pair of segments can potentially introduce overlaps (termed conflicts) during their track assignment. An example of the potential conflict that can appear in the perturbed layout after track assignment is shown in Figure 8(a) and (b) and hence taken care by Equation (10). The vertical segments s 1 and s 2 in Figure 8(a) belong to two different nets in the metal layer M i and can move either to the left or to the right within their perturbation range. Both their connected horizontal segments h 2 and h 4 belong to the metal layer M j . The order of the segments s 1 and s 2 is reversed due to perturbation along dotted arrows causing overlapping of h 2 and h 4 as shown in Figure 8 In the set of constraints represented by Equation (10), x kp (x lq ) is a binary variable which is 1 if the left(right) vertical segment s p (s q ) is assigned to grid cell g k (g l ), and 0 otherwise. Segments s p and s q are the vertical segments that cause conflicts if their order is changed. The indices k and l take the indices of grid cells from the perturbation range of s p and s q , respectively. Note that, the reversal of segments are represented only by the constraints where k > l.
A conflicting pair of segments in a metal layer M i can be identified by following conditions: � At least one of the corresponding end point is collinear; � Perturbation ranges of both segments overlap; � The corresponding connected orthogonal segments belong to the metal layer M j and M k , such that one of the following is true Perturbation of vertical segment s in patterns of Figure  5(b) is not allowed towards left in order to preserve wirelength; (b) s can be moved right causing a 2L decrease in wirelength due to the presence of vias at both ends of s; (c) movement of s not allowed to the right due to the presence of fixed pins at both ends of s PAUL ET AL.
Our objective function is piece-wise linear as it contains modulus. The objective function is approximated to a linear function as in Ref. [21]. (7)). In order to linearise the objective function, two more constraints are added as given in Eqs. 11 and 12.
The final objective function is,

| TRACK ASSIGNMENT OF RE-ALLOCATED SEGMENTS
The ILP formulation for perturbation of wire segments redistributes the movable segments in order to conform to the target pattern density. Hence, the result of our ILP provides only the assignments of a set of wire segments tot he given grid cells. The perturbed wire segments need to be assigned to the available free intervals, denoted by (y tp , y bt ), on tracks in the designated grid cells preserving the design rules. The free intervals are computed considering the fixed segments that are already placed entirely or partially on a track in a panel. We developed a method based on bipartite graph matching, similar to Refs. [19,22], to assign wire segments to tracks within each grid cell. The segments that fail to obtain a free interval by bipartite matching are then assigned to tracks using a local refinement method. Note that, we have taken care of design rules for vias and metal wires spacing during perturbation and track assignment. Brief explanation of the implementation details are also added in the later part of this section.

| Track assignment by bipartite matching
A bipartite graph B g (U ∪ V, E) is constructed for each grid cell g where: corresponds to a wire segment assigned to the grid cell g by ILP. � V = {v j }, 1 ≤ j ≤ n: v j corresponds to a free interval on a routing track in g.
exists if the length of the interval corresponding to v j is greater than the segment u i and v j is within the perturbation range of segment u i in g.
A maximum matching on the bipartite graph B g (U ∪ V, E) constructed for each grid cell g is performed in order to obtain the assignment of all movable segments to tracks.
Figures 9(a) and (b) and 10(a)-(c) illustrate an example of track assignment. Figure 9(a) presents a row with three grid cells g 1 , g 2 and g 3 , and the list of wire segments assigned to them. The perturbation range of their segments are shown as blue dotted rectangles. It may be noted that some of the tracks are occupied by the fixed segments. For example, t 3 is partially occupied by a fixed segment which is in the perturbation range of u 2 . Consequently, t 3 cannot have a free interval for u 2 in spite of being within its perturbation range. Figure 10(a)-(c) shows the bipartite graphs for g 1 , g 2 and g 3 , respectively, along with the assignment of segments to free intervals by bipartite matching. Figure 9(b) represents the final layout after track assignment by bipartite matching.

| Track assignment for unmatched segments
The bipartite matching given above may not succeed in assigning all segments to tracks due to dearth of free intervals of adequate length in the assigned grid cell. In Figure 11(a), two segments u 1 and u 2 are assigned to the grid cell g 2 by the ILP, and both have edges to the same interval v 1 in the bipartite graph. As a result the maximum matching fails to find a track assignment for u 2 . Although g 2 has enough total free area to accommodate u 2 in it, the entire length u 2 does not fit in a single free interval due to the presence of fixed segments in g 2 .
In order to assign such unmatched segments to tracks, we use a local rectification strategy, as shown in Figure 11(b), by applying one of the following two options: (1) split the segment into two adjacent tracks with an appropriate connection obeying design rules for all the grid cells in a panel, or (2) allocate the segment into an interval available in an adjacent grid cell within the perturbation range of the segment. Option (1) is preferred over Option (2), even though the wirelength may increase by one pitch unit due to insertion of an extra metal segment. In Option (1), the grid cell assignment generated by the ILP is preserved. Option (2) is applied when option (1) fails to assign the segments into tracks.
The problem of a segment not being assigned to a track potentially may still exist even after using options (1) or (2). However, the track assignment for all of the circuits in the three standard benchmark suites has been completed successfully using bipartite matching followed by the above

| Avoiding DRC violation in via spacing
We have maintained the design rules during track assignment of the segments. Since routing tracks are placed with a pitch distance gap among them, wire segments placed on those tracks cannot incur design rule violations. However, we explicitly maintained the via spacing rules during assignment of the segments to the tracks using bipartite matching based method and also for the assignment of unmatched segments.

| COMPUTATION OF DUMMY DEMAND
The flare in EUV lithography can also be reduced by introducing extra dummy metals in the layout as proposed earlier in Refs. [10,11,13]. However, dummy metals can cause interference with metal wire segments for signal nets, resulting in increased coupling capacitance or crosstalk [14,15,23]. In Ref. [23], the authors have proposed a formulation of the coupling capacitance for various types of dummy fills. The study in Ref. [14] uses a pre-computed look-up table for coupling capacitance between two metal fills with respect to their distance. -317 Thus introduction of additional dummy fills compromises the effectiveness of flare reduction. The redistribution of density on the layout by our ILPbased wire perturbation decreases the flare on the layout. For further decrease in flare, dummy metals can then be added along the lines of the earlier works. In order to study the effects of wire perturbation followed by dummification on a layout, dummy fill demand is computed as in Ref. [10]. The flare map and the PSF are the inputs. Flare on a layout surface is a global phenomenon. The flare of one grid cell is affected by that of its neighbouring grid cells. Hence, quasi-inverse lithography technique [5] is used to model the propagation of dummy demand of neighbouring cells to a grid cell. The quasi-inverse PSF is generated by the convolution of the PSF with itself as shown in Equation (14).
Next, the dummy demand density map is obtained by convolution of the flare map and the quasi-inverse PSF map using Equation (15).
Here, f and g run over all the values that lead to legal subscripts in both Eqs. 14 and 15 for the inputs under consideration. First, the initial dummy demand density map is computed with Equation (15) for the initial layout. Next, two final dummy demand density maps are generated for each final layout obtained after wire perturbation by ILP followed by track assignment considering (a) Gaussian, and (b) sigmoidal target pattern density maps. Finally, the initial dummy demand map is compared with the two final dummy demand maps to study the reduction in dummy demand due to wire perturbation. The results of the experiments given below in Section 9 indicate that the dummy fill demand after wire perturbation significantly reduces, thereby resulting in lower dummy cost compared to that for flare reduction by dummification alone.

| IMPROVED FLARE REDUCTION BY ILP WITHOUT ORDER PRESERVING CONSTRAINTS
The ILP solution gives order preserving assignments of wire segments in grid cells by the constraint given in Equation (10) such that the values of flare are minimised. Since the ILP is solved at grid level with no track information, it does not assign any conflicting pair of segments to the same grid cell although it is observed that the order of those segments can be preserved in the same grid cell provided the track information is given. This over-restriction results in less reduction in flare. Furthermore, the order preserving constraints in the ILP slow down the solver. Hence, relaxed version of the ILP which is without the order preserving constraints is also solved to speed up the method and to further enhance the flare reduction. In order to improve the solution quality and resolve conflicts, the conflicting pair of segments are pre-processed to preserve the order.
Conflicting pairs of segments are identified by following the three criteria given in Section 4, and their corresponding perturbation ranges are shrunk accordingly such that these ranges do not overlap any more. This scenario is explained in Figure (13a) and (b). Then those segments are assigned to tracks as any other segment during track assignment. In Section 9 below, the results of flare reduction by using this relaxed version of ILP are referred as Relaxed ILP.

| COMPLEXITY ANALYSIS OF OUR PROPOSED METHOD
Our proposed method of wire perturbation is based on ILP which is NP-Complete. We have used lp_solve package which uses primal simplex method and branch and bound technique for finding the optimal solution. For our track assignment step by bipartite matching, we have used the networkX library which uses Hopcroft

| EXPERIMENTAL RESULTS
The proposed method is implemented using C on a system having Intel(R) Xeon(R) CPU E5-2609 v2 @ 2.50 GHz processor and 24 GB memory. The PSF used in flare computation is modelled as the 2D-Gaussian distribution function. The convolution function in MATLAB [25] is used for computation of flare and dummy maps. The user defined balancing parameter w is set to 0.5 to balance the objective function of ILP for maximisation of segment assignment, and the minimisation of the gap between the assigned and target area map. The standard library lp_solve package [21] is used to solve the ILP. Since the central area of the chip contributes to a higher level of flare than the periphery, the ILP for the middle panel is solved first. The method processes panels starting from the centre and then gradually the periphery in subsequent iterations. Finally, flare variation (computed as the difference between maximum and minimum flare) and mean flare are reported corresponding to both Gaussian and sigmoidal target density maps. In addition to that, we have used the Python networkX library [26] to solve the maximum bipartite matching problem for the track assignment.
We have performed our experiments on fully routed circuits of three standard benchmark suites MCNC [27,28], FARADAY [29,30] and ISPD 2015 [31]. Moreover, it is implicit to state that our formulation is applicable to any value of pitch distance for the circuits. Hence, the formulation will remain same for any technology nodes. Our experiments were performed only for the vertical metal layers. However, the method is applicable to the horizontal metal layers also, keeping the vertical segments fixed.
Choosing a Suitable Target Density Map: In our experiment, we have kept the PSF fixed, generated with a value of σ equal to one fourth of the size of the layout. For this example, the value of σ used in the PSF is 15 for a 61 � 61 grid layout. However, we revisit the estimation of target pattern density map presented in Section 3.2 in our experiment to enhance the reduction in flare. The value of the standard deviation (σ) is varied in order to change the 2D-Gaussian target density map. The 2D-sigmoidal target density map is similarly revisited for the same reason by modifying the sharpness of the function controlled by the value of α. It has been observed that the value of σ of Gaussian target density map closest to that of PSF, gives best results for the benchmarks considered by the proposed method. Moreover, an α with a value equal to σ of PSF provided the best result for minimisation of flare. Increase or decrease of σ and α was found to be degrading the reduction of flare as shown in Figure 14.
The experimental results presented in the paper for L � L gridded layouts uses the value of σ as 1 4 L for Gaussian target density map to enclose the central region of the layout within 2σ as explained in Section 3.2.1. The value of α for the sigmoidal target density also uses the same value, whereas β is assigned to −L 2 ffi ffi ffi 2 p to translate the centre of the distribution to the origin as explained in Section 3.2.2. Section 9.1 presents the detailed specifications of the benchmark suites. Section 9.2 elaborates the experimental results using the Gaussian and sigmoidal target density map, respectively. The dummy demands at the post-perturbation stage is reported and compared with the dummy demands of the initial layout in Section 9.3. Finally, Section 9.4 gives a summary of our results.

| Description of the benchmark circuits
Tables 1 to 3 specify the details of MCNC, FARADAY, and ISPD 0 15 benchmark circuits, respectively.
In Tables 1 to 3, the columns headed Circuit, Area, #Nets, show the name of the circuit, die area in μm 2 and the total number of nets in the circuit, respectively. The MCNC circuits in Table 1 have three metal layers in each case, M2 being the vertical layer. The Faraday circuits in Table 2 have six metal layers with M2, M4 and M6 being the vertical layers. Each of the ISPD 0 15 circuits in Table 3 has five metal layers, M2 and M4 being the vertical layers. The columns Nets_M2 and Segs_M2 in Table 1 represents the number of nets with wire segments in the corresponding metal layer and total number of segments in that metal layer. The remaining Tables 2 and 3 report the same as a pair (#Nets, #Segs) in the column under corresponding metal layers.

| Results for wire perturbation-based flare minimisation
A detailed study on flare minimisation is reported by applying our proposed method for wire perturbation and track reallocation on the three sets of benchmark suites with Gaussian and sigmoidal target density maps generated as illustrated in Sections 3.2.1 and 3.2.2, respectively. Table 4 shows the initial and final pattern density and flare maps obtained by our proposed wire perturbation method for the three circuits DSP2, s13207 and mgc_edit_dist selected as F I G U R E 1 4 Reduction of flare variation (Y-axis) versus standard deviation σ and parameter α (X-axis) of Gaussian and Sigmoidal target density map, respectively, for a 61 � 61 grid layout of the circuit DSP2 in Faraday benchmark suite  Wire perturbation using sigmoidal target map shows more significant minimisation in flare levels than that with Gaussian target density map. Appendix I (Table A1)  in detail for minimisation of flare with Gaussian and sigmoidal target density map. A summary is given in Figure 15(a) and (b) as plots of the normalised reduction using Gaussian and sigmoidal target density map of flare variation and flare mean for metal layer M2 of each of MCNC, FARADAY and ISPD 0 15 benchmark suites, respectively. It can be seen that on average 14% and 18% reduction in flare variation compared to the initial layout for metal layer M2 over all three benchmark suites is obtained as a result of our ILPbased and relaxed ILP-based methods, respectively, using Gaussian target density map. In case of sigmoidal target density map, on average 21% and 26% reduction in flare variation is achieved for the same methods, respectively. Similarly, on average 7% and 8% reduction in flare mean for metal layer M2 is obtained for ILP-based and relaxed ILP-based methods, respectively, using Gaussian target density map. However, when using the sigmoidal target density map, about 10% and 12% reduction on average can be achieved in flare mean similarly. It can also be observed from Table A1 that the reduction of flare variation and mean is highest in the vertical metal layer M2 and gradually decreases for the upper metal layers.

| Results for post-perturbation dummy demand
Next, we have studied the reduction in dummy fills demand on the post-perturbed layout compared to the initial layout, as described in Section 6. Appendix II (Table A2) has the results for the circuits in all three benchmark suites. A summary is given in Figure 15(c) and (d) as plots for the normalised reduction over all circuits in each benchmark using Gaussian and sigmoidal target density maps.
Results of our ILP-based and relaxed ILP-based methods, using Gaussian target density map show, on an average a reduction of 16% and 20% in dummy demand variation compared to the initial layout for metal layer M2 for all three benchmark suites. Similarly, on an average a reduction of 24% and 27% in the dummy demand variation is achieved using sigmoidal target density map for the same methods, respectively. The dummy demand mean reduces 9% and 12% on an average for ILP-based and relaxed ILP-based methods, respectively, using Gaussian target density map, whereas sigmoidal target density map obtains a reduction of 15% and F I G U R E 1 5 (a, b) Summarised results of flare reduction by ILP-based wire perturbation followed by Track Assignment (TA) of re-allocated segments for circuits of three different benchmark suites: x-axis represents the three benchmark suites MCNC, Faraday and ISPD 0 15; y-axis represents the reduction for (a) Flare variation and (b) Mean flare compared to the initial layout. Each value is normalised with respect to the initial values. (c,d) Similarly summarised result for reduction in dummy demand variation and mean dummy demand for all three benchmark suites 17% in the mean dummy demand on average reduction for the same methods.

| Summary
The results of our study established significant decrease in flare values by the proposed method of perturbing the wire segments.
Our observations from this study are listed as follows: � The global flare distribution depends on the density distribution of the layout patterns. Minimisation of flare by density redistribution method depends greatly on the target pattern density map. Our study with two different types of bell-shaped target density map explores the strength of choosing an appropriate target pattern density model for flare minimisation. As described in the Section 3.2, the sigmoidal distribution has slower change in the gradient within a certain range around the centre, compared to the Gaussian distribution. Hence, the volume under the sigmoidal distribution is more compared to Gaussian distribution within that range. As a result sigmoidal distribution accommodates more layout patterns within the said range around the centre of the layout. The results clearly show that a sigmoidal target pattern density map reduces flare more than a Gaussian map. � The segment ordering of conflicting pairs are preserved either by certain constraints in the ILP or by modification in the perturbation ranges. Removal of the order preserving constraints along with restriction of perturbation ranges led to better reduction in flare and on an average 40% reduction in the time requirement, as observed from our experimental results. � While experiments were performed only for the vertical metal layers, the method is applicable to the horizontal metal layers also, keeping the vertical segments fixed. � Almost all segments were assigned to a track by bipartite matching as described in Section 5. However, for some of the circuits we required Option (1) and Option (2) as mentioned in Section 5.2. Table 5 has the list of those circuits and the corresponding change in their wirelength in terms of pitch unit. The columns Benchmark, Circuits, Opt-1, Opt-2 and WUnit represents the name of the benchmark, the name of circuits, number of times Option (1) and Option (2) are used and the corresponding change in wirelength due to the inclusion of extra metal wire for connectivity. � Since no information regarding delays of the circuits from the benchmarks were available to us, the delay before and after perturbation of the wire segments could not be compared. However, perturbations within the defined range values do not change the wirelength except only in a very few cases as given in Table 5 . Thus, change in the wirelength due to our perturbation method may not have a noticeable effect on the delay. � The lower metal layers have more wires which provides more options to the wire perturbations. Hence, our results show better improvement for the lower metal layers than that for the higher ones. � There is a notable reduction in dummy demand in the final layouts obtained by our proposed method thereby reducing metal costs for dummy fills along with other issues associated with them. � Previous works [10,13] have shown that the impact of dummification on reduction of flare is more compared to that by post-layout wire perturbation. Our proposed perturbation based method decreases flare with no additional overhead. Thus, in order to obtain further flare reduction, dummification can be applied as a post processing step of our perturbation method, which would definitely require less dummy fills than by dummification alone, and thereby reduce the layout cost and flare. � In Ref. [19], a method has been reported to include dummification upto a user-specified bound simultaneously with wire perturbation, by which flare reduction obtained is more than that by wire perturbation alone. However, our results of the flow proposed here indicate that wire perturbation followed by dummification can yield better flare reduction.

| CONCLUSION
To the best of our knowledge, this is the first study on minimisation of flare values by perturbation of wire segments at the post-layout stage using EUV lithography. A detailed study of perturbation-based method is performed using two types of target pattern density distribution models, namely Gaussian and sigmoidal. The results show significant minimisation of flare values for each of the benchmark suites. Moreover, we have also computed the dummy demand map before and after the wire perturbation which reflects reductions in dummy demand in the post-perturbed layouts. Both dummification and segment perturbations of highly optimised routed layout may introduce crosstalk. Hence, crosstalk aware perturbation and dummification needs to be done in the future for better circuit performance.

ACKNOWLEDGMENTS
The authors thank Prof. Shao-Yun Fang of National Taiwan University of Science and Technology for providing Benchmark suites for this work and sharing her valuable insight, and also DST-GITA, and MoSPI, Government of India for the funding of this project.

Sudipta Paul
https://orcid.org/0000-0001-8699-5341 Susmita Sur-Kolay https://orcid.org/0000-0002-2052-3779 APPENDIX I Table A1 shows the results of wire segment perturbation on all benchmark circuits using Gaussian and sigmoidal target density maps. Columns Circuit and ML# give the name of the circuit and the vertical metal layer on which wire segment perturbation is performed. The major Column Initial shows the flare values for the input layout. The major Columns Our ILP-based method + track assignment and Relaxed ILP + track assignment show the flare values for the final layout achieved by our proposed ILP, and ILP with constraints relaxation, respectively.

Reduction in F lare
The minor columns labelled Variation and Mean under the three major columns show the corresponding values of flare variation and mean.
Columns %Pert and Time represent the percentage of the wire segments perturbed, and the execution times for Initial, Our ILP-based method + track assignment and Relaxed ILP + track assignment. Circuits in the same benchmark suite are grouped under the row header with the name of the benchmark suite. The layer wise improvement over all the circuits in a benchmark suite is computed using the geometric mean, and normalised with respect to initial values. The rows showing overall improvements for each benchmark suite are highlighted. Table A2 lists the reduction of post-perturbation dummy demand for MCNC, ISPD 0 15 and FARADAY benchmark circuits, respectively. The structure of the table is same as that of Table A1 . The minor columns named variation and Mean represent the variation of dummy demand and average dummy demand density. The columns Circuit and ML# and represent the name of the circuits and the vertical layer number. The major column Initial shows the total requirement of dummy fills in terms of density for the input layout. The columns named Our ILP-based method + track assignment and Relaxed ILP + track assignment report the dummy fill demand density in the final layout after perturbation using Gaussian and sigmoidal target density maps. In this table, layer wise overall improvement is similarly computed using geometric mean and normalised with respect to initial values. The overall improvement values are highlighted for every benchmark suites.