Stabilisation of multi‐loop amplifiers using circuit‐based two‐port models stability analysis

Abbas Pasdar, The Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran. Email: abbaspasdar@alum.sharif.edu Abstract This article applies a systematic approach based on the normalized determinant function (NDF) theory to analyse stability in multi‐loop circuits and to design the required stabilization network. Presenting several provisions, the return ratios are extracted by employing immittance or hybrid matrices (Z, Y, G or H) of active two ports. Using these matrices, instead of the S‐parameters, facilitates the selection of an appropriate stabilizer network. As a practical case, a non‐uniform distributed amplifier (NDA) is designed and inspected for potential instabilities. The presented procedure detects instability associated with one of the NDA circuit's loops, and an appropriate stabilization circuit is accordingly devised. In order to validate the procedure, the designed NDA is implemented in a 0.1‐μm GaAs pHEMT process. As predicted, the measurements show oscillations, once the on‐chip stabilization circuit is disabled.


| INTRODUCTION
Scrupulous detection of potential instabilities and stabilization in any microwave circuit plays a pivotal role to ensure proper functionality, among the entire design considerations. The troubles caused from instability issues pose more challenges in microwave circuits where there is not an exact lumped model for distributed components, such as transmission lines. As a result, in such cases, stability analysis must be performed in the frequency domain [1].
Numerous treatments addressing the instability issue are provided in the literature [2][3][4][5][6][7][8][9][10][11][12][13][14]. Linville or μ-factors are useful implements for checking the conditional stability of a linear two-port network which is intrinsically stable [2][3][4]. These methods do not ensure the stability of a network since they presume the intrinsic stability [1]. Two rigorous stability analyses, which are extended to both small-signal and large-signal regimes, are the pole-zero identification technique and the open-loop approach. In the pole-zero identification technique, the impedance observed from each node of the circuit is measured [5]. Accordingly, the calculated impedance response should be fitted to a rational polynomial transfer function. Providing that this polynomial transfer function contains no RHP poles, the stability of the circuit is guaranteed. Methods for stabilisation based on pole-zero location are presented in the articles [9,10]. The main drawback of this method is discovering an accurate estimation of the rational polynomial transfer function order. An inaccurate estimate may result in a misleading stability assessment [9].
The open-loop approach in [12][13][14][15][16] originates from the concept of return ratio, introduced by Bode [11]. This approach is utilised in literature [12] as the concept of NDF for analysing the stability statues of multi-loop linear circuits. The use of this technique requires a modified linear model of the active devices, composed of lumped elements and dependent sources. The main drawback of this method is its arduousness in implementation. To overcome this, a rigorous method was presented in [13] which considers transistors as black boxes and utilizes their S-parameters to calculate the NDF, assuming that the transistors are intrinsically stable when they are terminated to Z 0 . While the method provides a proper approach to facilitate the procedure of stability analysis, it does not provide circuit intuition since there is no any equivalent circuit model for the utilized S-parameters. Therefore, as it will be shown, the stabilization network design. The assumption of intrinsic stability of transistors is discussed in [14,15], which suggest extra considerations.
The stability analysis and stabilization by means of immittance or hybrid matrices (Z, Y, G or H) have been presented for linear multi-loop circuits under mandatory provisions. In Section 3 it is shown that unlike S-parameter, these circuitfriendly matrices provide black-box analysis which gives circuit intuition and facilitates the stabilisation network design. The presented procedure has been utilized for stability analysis in an NDA, revealing that one of the circuit's loop sustained instability. Consequently, an appropriate stabilization circuit is simply designed based on the insights available by the applied circuitbased models. The designed NDA is implemented in a GaAs pHEMT process. A novel approach has been utilized to demonstrate the stable and unstable mode of the implemented circuit by a controllable stabilizer network. Instability, in terms of oscillations at a frequency closely predicted by theory, is clearly observable when the stabilization circuit is deactivated. Activating the stabilization circuit results in stable operation.

| STABILITY ANALYSIS
The concept of return ratio (loop-gain) analysis arises from the fact that the instability in linear circuits is caused by the feedbacks generated by dependent sources (transconductances). By removing these sources, the circuit becomes passive and stable. For instance, the characteristic function (Δ) of the circuit shown in Figure 1, with N dependent sources, can be decomposed based on g 1 and be written as.
where Δ 1 is the characteristic function of the circuit when g 1 is set to zero, Δ g1 is a partial of Δ generated by g 1 , and RR 1 is the return ratio caused by g 1 . Based on the Nyquist stability criteria, the circuit is stable if Δ 1 does not possess any RHP zeros and RR 1 does not encircle the point -1 + j0. However, Δ 1 itself consists of several depended sources and it can be similarly decomposed based on the remaining loops. If the decomposition procedure in Equation (1) is continued for all g i s, Δ will be obtained as in which NDF is the normalized determinant function and RR i is the return ratio for the i-th dependent source when the dependent sources from g 1 to g i−1 are eliminated (i.e. g k = 0, for k = 1, …, i − 1), while the other dependent sources are active. Δ 0 is the characteristic function when all dependent sources are set to zero and it does not have any RHP zeros.
Therefore, the circuit is stable if all RR i do not encircle the point -1 + j0 or the NDF does not encircle the origin. The return ratios in Equation (2) can be extracted with CAD tools. For example, as explained in [12] and by the procedure shown in Figure 2, the return ratio generated by g 1 can be achieved, using a test voltage source V T , as Any linear network parameter such as immittance or hybrid matrices (Z, Y, G or H) can be utilized to calculate the NDF. However, utilizing these models needs several considerations which will be discussed in the following. Figure 3a exhibits a single transistor circuit, as an example, with its Y parameters model. The characteristic equation is given by where Δ u is the determinant function for the unilateral circuit without feedback (i.e. y 12 = 0), and Δ y12 is a part of Δ that y 12 creates. If the first provision of unconditional stability is established for the Y matrix, that is Y has stable elements (known as intrinsic stability), and Re y ii ðjωÞ where ω is the angular frequency, then Δ u has no RHP zeros and is unconditionally stable. The intrinsic stability of Y can be investigated by statistical analysis [14]. Equation (4) can be rewritten as The term y 12 Δ y12 /Δ u is the return ratio (loop-gain) created by y 12 and the circuit is stable if it does not encircle the point -1 + j0.
The extraction of this ratio can be easily implemented in CAD tools, as depicted in Figure 3b. A test current source (I T ),

F I G U R E 1 A network consisting of N dependent sources (transistors transconductances)
F I G U R E 2 Return ratio calculation created by g 1 opposite to y 12 , is placed in parallel with it. Subsequently, the current caused by y 12 is read after disconnecting it from the circuit. As will be noted in Section 3, this implementation of return ratio extraction provides suitable circuit intuition for stabilization. Finally, the return ratio for the circuit in Figure 3b is derived as By eliminating y 12 , in this example, the circuit becomes unilateral. Then, although y 21 still exists the forward pass in Figure 3b, it cannot cause instability, because it does not create any loop. As a result, in stability analysis, we do not need to eliminate all the dependent sources. Eliminating a set of dependent sources will be sufficient, if the remaining sources do not create loops.
While the conditions in Equation (5) must be satisfied to conduct the stability analysis, there is a great flexibility in selecting an appropriate model to meet the requirements. For instance, to analyse the common-gate structure in Figure 4a, it is also possible to consider a common-source configuration along with Z parameters, as shown in Figure 4b, provided that the diagonal elements of the matrix have positive real parts. There are three different configurations for a transistor with respect to which the pin is opted as the common port (gate, drain or source) and four possible two-port models (Z, Y, G and H), resulting in 12 possible candidates. In many cases, the Z matrix for the common-source configuration satisfies the provisions.
Multi-transistor circuits consist of several dependent sources that can create active loops. As illustrated in Figure 5, the stability analysis procedure can be generalized for these circuits until the active loops are entirely eliminated. First, a proper two-port model for each of the transistors is found that is intrinsically stable and satisfies Equation (5) for the main diagonal elements. Then, the dependent sources of the transistors' two-port models (that create active loops) are determined, as shown in Figure 5a. Extracting the return ratios will be done by successively eliminating the dependent sources and applying independent test sources of the same type (current or voltage) in the opposite direction, as shown in Figure 5b,c. Once all active loops are eliminated, the remaining circuit is stable with the characteristic function Δ u . The overall characteristic function is then given by The circuit is stable if all return ratios do not encircle the point -1 + j0 or the NDF does not encircle the origin in the clockwise direction.
In feedback systems, the relative stability can be considered by stability margins (phase and gain margins) of return ratios. In Equation (8), each parenthesis has its phase and gain margin, and they should have enough margin to ensure that the circuit will be stable after process variation during fabrication. However, depending on the order in which loops are opened, different return ratio sets will be achieved. Since the stability condition of circuits is independent from the sequence of opening the loops, all the return ratio sets are unanimous about stability condition, but their corresponding margins are different. Therefore, in multi-loop circuits, the stability margin of the entire circuit cannot be investigated by each return ratio individually. In this case, the characteristic function can be written as: where RR T = NDF − 1. Since Δ u is stable, the relative stability condition can be investigated by the Nyquist diagram of RR T . Accordingly, during the design procedure, the diagram of RR T   should be considered to analyse the relative stability condition of the designed circuit.

| STABILIZATION
In the microwave circuit design, using series or shunt stabilization networks is a fundamental practice. In the open-loop stability analysis, these networks are utilized to control the return ratios. Once the unstable or susceptible loop is identified, the amplitude or phase of the return ratios must be altered around the sensitive frequency to meet the Nyquist criteria.
In the interest of demonstrating the stabilization procedure, let us assume that in the single-transistor amplifier of Figure 3, the Z matrix satisfies the condition in Equation (5) expressed for Z parameters, that is Re[z ii ] > 0, for i = 1, 2. The loop gain created by z 12 can be extracted, as shown in Figure 6. In order to control the loop gain, the current in port 1 (I 1 ) or port 2 (I 2 ) need to be manipulated. In many cases, it is best to stabilise the circuit at the input, for the sake of performance. As depicted in Figure 7, by considering the matching circuit structure and the desired features (low noise, high gain, etc.), a proper y C or z C network can be designed to control the current I 1 around the sensitive frequencies. For example, suppose that in Figure 7, the reduction of the loop-gain at high frequencies is desired while z S behave inductively at those frequencies (mostly in broadband applications like distributed amplifiers). Therefore, a proper capacitive y C in parallel with z S can be utilized to reduce the loop-gain because it resonates with the inductive z S and reduces I 1 .
It should be noted that the stabilizer circuit can also be placed between the test source and the two port, as depicted in Figure 8. However, the model will be changed from Z to If Z is stable and the condition (Equation 5) holds for it, then Z 0 would be also stable, but an inappropriate z b can demolish (Equation 5) for z 0 22 . Accordingly, z b which alters the configuration should not be located between the test source and the two port, unlike z a in Figure 8a, which its substitution with V T does not alter the configuration.
By using circuit-based models instead of S-parameters, the presented procedure provides circuit intuition which facilitates the process of stabilizer network design. For comparison, stability analysis based on S-parameters from [13] is illustrated in Figure 9a, for a simple case. The loops are examined at input and output ports. Figure 9b shows the return ratio extraction at port 1 (RR 1 ) by means of an ideal circulator. Subsequently, as shown in Figure 9c, the return ratio at port 2 (RR 2 ) is extracted while port 1 is unilateralized. Finally, the remaining circuit is attained as Figure 9d which is stable, if the S-parameters of the transistor has stable elements and S ii (for i = 1, 2) do not encircle the point 1 + j0.
Once these conditions are met, the circuit is stable, if RR 1 and RR 2 do not encircle the point 1 + j0. Assuming RR 2 is unstable, either Γ O or Γ L have to be manipulated to stabilize the circuit. As aforementioned, in many cases, it is desired to stabilize the circuit at the input, that is, Γ O should be modified. However, since the input is unilateralized in Figure 9c, Γ O will be independent of Γ S , and the stabilizer network Γ C should be placed between the circulator and the transistor, as shown in Figure 10a. This, however, alters the S parameters of the circuit (Figure 10b) and may ruin the necessary stability conditions. As a result, stabilizing from input needs extra considerations and may involve additional iterations. As depicted in Figure 11, however, the stabilisation for this circuit by Z matrix can be easily done at the input, while the loop is opened at the output, using the same procedure described for stabilising the circuit in Figure 7.

| APPLICATION TO AN NDA
Distributed amplifiers (DAs) are prone to instability thanks to many loops formed by their innate structure. Based on the preceding, discussed methodology, stability analysis of a NDA will be carried out.
A monolithic microwave integrated circuit (MMIC) NDA is designed and implemented in a 0.1-μm GaAs pHEMT process. An average gain of 13 dB and a 3-dB bandwidth of 20 GHz has been achieved. The optimum weighting of transistors width as well as the optimum tapering of the lines are determined by circuit optimization. Figure 12 shows the schematic of the NDA.

| Stability diagnostic
For stability examination, proper two-port models for all transistors should be chosen which are stable and satisfy condition (Equation 5). In the regarding case, the impedance parameters for the common-source structure of all transistors (Q 1 -Q 4 ) provide this term. By merely analysing z 12 of the transistors, all active loops will be removed. Therefore, only four return ratios need to be calculated. Figure 13a illustrates the Nyquist plots of the extracted return ratios. The Nyquist plot of the third return ratio (RR 3 derived by z 12 of Q 3 ) indicates instability associated with the corresponding loop. The plot intersects the negative half-axis at 27.3 GHz with a return-ratio magnitude greater than one. Hence, instability in shape of intrusive oscillation can be expected around this frequency. Before proceeding to stabilize the loop, it is noteworthy to consider the μ-factor of the NDA's overall two-port for the moment. As depicted in Figure 13b, we have μ > 1 in the considered frequency range. Therefore, discarding the proviso of positive-impedance-based techniques can be misleading in terms of stability assessment.

| Stabilization circuit
To stabilize the NDA, RR 3 in Figure 13a should be decreased at high frequencies. Using the insight obtained in Section 3, this can be done by inserting a reactance in parallel with the  Figure 12. The plot has been drawn from 1 to 40 GHz.
-5 gate of Q 3 . Inserting a stabilizer network can adversely change the desired frequency response of the circuit. As a result, in many cases, the optimization needs to be repeated after imposing the stabilizer. Fortunately, distributed amplifiers are quite insensitive to small variations in components or bias conditions [17]. Based on this feature of DAs, the stabilizer is designed so that the circuit can operate in both stable and unstable modes. Figure 14 depicts the schematic of NDA with the incorporated stabilisation circuit. Q C acts as a switch which makes it possible to activate or deactivate the stabilisation circuit. As shown in Figure 15, for V C = −3 V, C C does not participate and the circuit is unstable, while for V C = −0.5 V, the circuit is stable due to strong impact of C C .

| Experimental results
The designed NDA is implemented in an AlGaAs-InGaAs pHEMT process with 0.1-μm gate length and 50-μm substrate thickness. The unity gain frequency f T and the maximum oscillation frequency f max of the process are 130 and 180 GHz, respectively. The passive components offered by the process include the MIM capacitors with capacitance density of 400 pF/mm 2 , thin film and mesa resistors with sheet resistances of 50 and 150 Ω/□, two metal layers with 1-and 4-μm thickness, air bridges and ground back-vias. The chip micro-photograph of the fabricated NDA is depicted in Figure 16.
As it is depicted in Figure 17, the gain of return ratios is very small for frequencies greater than 30 GHz because of the low-pass nature of loops in distributed amplifiers. As a result, the loops cannot become unstable for frequencies greater than 30 GHz. The output spectrum of the circuit around critical frequencies is shown in Figure 18 while the input was terminated to 50 Ω without any stimulation. The oscillation can be