Fault current limiting method based on virtual impedance for hybrid high‐voltage direct current with cascaded MMC inverters

impedance for hybrid high-voltage direct current with cascaded MMC inverters Qin Jiang,1 Baohong Li,1,✉ Tianqi Liu,1 and Peng Wang2 1College of Electrical Engineering, Sichuan University, Chengdu, People’s Republic of China 2School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, Singapore ✉Correspondence Baohong Li, College of Electrical Engineering, Sichuan University, Chengdu, People’s Republic of China. Email: scu_lbh@163.com

The hybrid high-voltage direct current (HVDC) with cascaded multiinfeed MMC inverters is proposed in recent years, and it will be put into reality in near future. But the commutation failure of the linecommutated converter (LCC) inverter will make the whole HVDC system to be blocked because the DC fault current could reach beyond the safety region of the MMC inverter. To solve such problem, this letter proposes a novel fault current limiting method based on the LCC control strategy, namely, the virtual impedance method. Such method can limit the fault current effectively and need no extra devices, which can avoid the block of the whole HVDC system on one side, and save the cost of the construction on the other side. The theoretical analysis shows that the proposed method can improve the high-frequency characteristic of the DC system and realise the fault current limitation effect. The simulations validate the analysis finally.
Introduction: The hybrid high-voltage direct current (HVDC) technology provides an attractive option for long-distance and bulk power transmission in modern power system. By combining the advantages of the line-commutated converter (LCC) and voltage-sourced converter (VSC), the power transmission reliability and efficiency can both be improved [1].
Actually, the structure of the hybrid HVDC is various and a lot of topologies have been studied in past years [2], such as classical twoterminal hybrid HVDC with single LCC rectifier and single VSC inverter, extended hybrid HVDC system with multiple VSC inverters, and so forth. To further reduce the cost and enlarge the capacity of the hybrid HVDC technology, a new hybrid HVDC with cascaded modular multilevel converter (MMC) inverters is proposed recently and will be put into reality in China as shown in Figure 1.
Although such hybrid HVDC has many advantages, there is a key problem that should be solved before construction, which is the LCC inverter commutation failure (CF) that will lead the MMC inverter to be overcurrent and overvoltage because of the soaring DC current during the fault period. One solution to such a problem is to add extra fault current limiter devices. Thus, the safety of the MMC inverter can be guaranteed. However, such a method will increase the cost of the hybrid HVDC and reduce its advantages. Most importantly, the extra devices always need the power transmission of the hybrid HVDC system to be temporarily stopped, which also harm the power system safety operations.
To suppress the fault current caused by the LCC inverter's CF in hybrid HVDC with cascaded MMC inverters, this study proposes a novel current limiting method without adding extra devices, which is realised through the introduced virtual impedance methods, where the virtual impedance is designed based on the LCC control strategies. The final simulation results show that the proposed virtual impedance method can limit the MMC fault current and voltage into safety band, such that the block of the hybrid HVDC can be avoided when LCC inverter CF occurs.

Configuration of hybrid HVDC with cascaded MMC inverters:
The structure of the hybrid HVDC is presented in Figure 1. The rated power and voltage of the hybrid HVDC are 4000 MW and 800 kV, where three 400 kV/677 MW MMC inverters are in series with a 2000 MW LCC. The MMCs are all half-bridge inverters and infeed into different AC areas.
As for the control mode of each converter, the LCC rectifiers are in DC constant current control, while the LCC inverter is in constant DC voltage control (CVC), and the MMC inverters are in master-slave control as shown in Table 1.
Virtual impedance for fault current limitation: For a classical LCC-HVDC, its DC current can be obtained as shown in Equation (1): where I d is the DC current, U dr and U di are the DC voltage of LCC rectifier and inverter, Z inv , Z rec and Z L are the impedance of rectifier, inverter and DC transmission line, respectively.
However, for fault current analysis in hybrid HVDC system, the above expression needs to be rewritten as Equation (2) because the LCC inverter is modified to LCC-MMC inverters. The U dLCC and U dMMC in Equation (2) denote the DC voltage of LCC inverter and MMC inverters, R inv , R rec and R L and L inv , L rec L L are the resistance and inductance of impedance in Equation (1); thus, Equation (2) is expressed in the frequency domain for analysis: Considering the ignition angle α r of rectifier and α i of inverter, the following Equation (3) can be obtained, where Z(s) = R rec + sL rec + R L + sL L + R inv + sL L and the U d0r and U d0i are the ideal open-circuit voltages of LCC converters, respectively: When CF happens, the DC voltage at the LCC inverter-side decreases quickly. DefiningŨ d0i (s)as the decreased voltage after CF, we can finally obtain the fault current It can be seen that the DC-side fault current is decided by the LCC rectifier voltage, LCC inverter voltage and MMC voltage together, and the ignition angle α i also influence the fault current simultaneously. As the voltage of MMC converter is constant and the voltages of LCC converters are mainly determined by the AC-side parameters, only the ignition angle can be designed for current limitation. On the other side, the fault current is very sensitive to time delay, thus α i is much more suitable for adjustment rather than α r of the rectifier.
Thus, assuming the LCC inverter ignition angle α i is changed to α i + α i with additional control signal α i , then Equation (4) can be rewritten as To reveal the specific effect of α i on the impedance of the system, Equation (5) can be deduced and represented in another form through some transformations, and the final fault current expression can be given by Ud0r cos αr−Ũd0i cos(π−αi− αi )−UdMMC (6)

Fig 4 Detailed virtual impedance controller diagrams
Comparing Equations (6) with (4), the impedance is actually increased after changing the ignition angle. Here, we define the newly introduced component as the virtual impedance Z virtual as indicated by Equation (7): In fact, it is known that the high-frequency characteristic decides the system's initial time performance [4]. Figure 2 presents the comparison results of the DC system impedance with and without virtual impedance control (VIC). The virtual impedance can obviously enlarge the whole DC impedance in high frequency; thus the fault current can be suppressed.
Fault current limiter design based on virtual impedance: The control diagram of CVC applied in LCC inverter is as shown in Figure 3 to realise VIC. The measured DC current I di_m and the additional firing angle α i are the input and output of the VIC strategies, respectively. And the other control loops and parameters in Figure 3 are the classical constant extinction angle control and constant current control, where PI means proportional integral controller The detailed VIC is presented in Figure 4. The control is triggered by the CF signal. Once the LCC inverter has a CF, the extra ignition an- gle α i is generated and added to the original control. And the washout component guarantees that there is no output when the system is in normal operation. The rate detector is used for fault current increasing speed calculation and sends it to the PI controller to output the additional angle for fault current limitations.
Simulation verifications: To validate the previous analysis, the simulations are implemented. The model of the hybrid HVDC is established in Power Systems Computer Aided Design (PSCAD) software. The topology of the hybrid HVDC is the same as Figure 1, and the detailed parameters are presented in Table 2.
To investigate the fault current limitation' effect, a 0.01 s singlephase grounding fault at LCC inverter-side AC bus is added to make the CF occur. The LCC and MMC inverters' changing situations with and without VIC are presented in Figures 5 and 6, respectively. As can be seen with the control of proposed VIC, the whole DC voltage is increased by 35.6%, which is because the LCC DC voltage is improved such that the reactive power demand is decreased. Simultaneously, the maximum line DC current of LCC inverter, namely, line DC current, is reduced by 22.5%, which is below 10 kA. In other words, the fault current is limited to the safety region. Table 3 gives specific values of the DC fault current and voltages, which further proves the effect of  the proposed virtual impedance method. Actually, the proposed method in this letter can not only limit the fault current but also guarantee the power transmission during the fault period. The simulation results are presented in Figure 7. Both LCC and VSC inverters can transfer more power with VIC, and the block of the hybrid HVDC system is avoided. Moreover, the high-frequency characteristics of the hybrid system are verified by impedance scanning as shown in Figure 8. Finally, comparisons with recent non-linear voltage dependent current order limiter (VDCOL), which is usually to control CF, are conducted to show the benefits. Figure 9 shows the effectiveness of both response speed and control performance.
Conclusion: Based on the theoretical analysis and simulation results, the following conclusions can be obtained.
1. The fault current in hybrid HVDC with cascaded inverters caused by the CF can be impacted by the LCC control. Thus, it is possible to limit the fault current through the control strategy design, which can be realised by shaping the high-frequency characteristics of the equivalent DC impedance. 2. The proposed virtual impedance method can improve the highfrequency performance of the DC system. And the simulation results prove that the virtual impedance can suppress the fault current effectively, where the block of the HVDC system can be avoided and the cost of the extra current limiting device can be saved.