A Schottky diode and FET‐paralleled analogue predistorter for 5G small‐cell base stations

This letter presents an analogue predistorter (APD) named Schottky diode (SD) and field effect transistor (FET)-paralleled APD (SDFPAPD) for the fifth-generation (5G) mobile system, which is composed of an FET paralleled with two SDs. The simulation results show that the SDFP-APD has the best compression compensation for the radio frequency power amplifier (RFPA) among the SD-APD, the FET-APD and the SDFP-APD. Furthermore, the measurement results illustrate that the SDFP-APD can improve the adjacent channel leakage ratio of the RFPA with the best linearisation performance among the three APDs and reduce the error vector magnitude while applying a 100-MHz bandwidth 5G new radio signal. The proposed SDPF-APD can be a promising linearisation technique for 5G small-cell base stations.

The SDFP-APD: The block diagram of the proposed SDFP-APD is shown in Figure 1, which consists of two modules, that is, the FET and the SD modules. The FET module can generate predistorted signals by adjusting the direct current (DC) bias of the FET to the non-linear region. According to the simplified equivalent circuit model, the FET can be expressed as a paralleled combination of a capacitance (C gs ), a resistance (R i ), and a current source. The current source is a drain-source equivalent resistance (R ds ) varying with I ds and V ds . The S 21 of a FET-APD can be expressed as where Z 0 is the characteristic impedance of 50 . It can be seen from Equation (1) that the FET-APD can achieve positive gain and positive phase expansion as R ds expands. In addition, we assume the electrical length of the microstrip line before the FET as θ 1 , which is marked in Figure 1. By adjusting θ 1 , the gain and the phase of the FET will compress or expand. When θ 1 = 2π /9, the gain and the phase of the FET module will all expand, which can be applied to compensate for the compression of the RFPA. The SD module consists of two paralleled SDs, a bias network, and two DC blocks. The predistorted signal is generated by controlling the bias voltage of the SDs. Ignoring the parasitic parameters, an SD can be equivalent to a conductance G d and a capacitance C j paralleled. The S 21 of an SD-APD can be expressed as where G d = ∂I d /∂V d = qI s /nKT e (q/nKT )Vd and Z 0 is the characteristic impedance of 50 . K is the Boltzmann constant, q is the electron charge, I s is reverse saturation current of SD, T is the absolute temperature (K), I d is diode current. When the input power increases, the bias point of the diode will be changed and moved from the small-signal operating point to the large-signal operating point because of the voltage drop at the bias feed resistance R3 [7]. With the point movement, the node current I d of the diode increases and the node voltage V d decreases, and thus the conductivity G d decreases. Therefore, with the increase of the input power, the conductance G d decreases. Accordingly, as shown in Equation (2), the S 21 shows an expanding trend at the same time. Further, we assume θ 2 , which is marked in Figure 1, as the electrical length of the microstrip line before the SD. By adjusting θ 2 , the gain and the phase of the SD will compress or expand. When θ 2 = π /3, the gain and the phase of the SD module will all expand. Therefore, the FET-APD and the SD-APD are all effective to expand the gain and the phase. Furthermore, combine FET-APDs and SD-APDs, as shown in Figure 1, can increase the gain and the phase expansion while making the circuit more adjustable. Moreover, due to the fact that different PAs have different non-linearity, the DC bias of the APD needs to be adjusted to meet the requirements of the different types of PAs. In Figure 1, the input RF signal is equally divided into two parts v 1 (t) and v 2 (t) by a 3 dB coupler with 90°phase shift at the input port, where the phase of v 2 (t) lags 90°behind that of v 1 (t). v 1 (t) and v 2 (t) are fed into the FET and the SD modules, respectively. Then, two predistorted signals v 1 (t) and v 2 (t) are generated, respectively, by the FET and SD modules, which are combined by another 3 dB coupler with 90°phase shift near the output port. In the coupler, the 90°p hase shift between v 1 (t) and v 2 (t) is compensated, and the vector superposition of the two signals makes the analogue predistorted signal generated.
Simulation validation: Figure 2 shows the simulation results of the amplitude modulation (AM)/AM and the AM/phase modulation of the RFPA with and without APD, that is, the RFPA output without APD, with FET-APD, with SD-APD and with SDFP-APD. The bias settings are exhibited in Figure 2. The RFPA model used in the simulation is the gallium nitride high electron mobility transistor CGH40010 (CREE) with an output power of 10 W. It can be seen that the phase is After adding the SD-APD and the FET-APD before the RFPA, the P1dB is moved forward from the input power of −2 to −1.1 dBm and 0.8 dBm separately and the phase shift is 1.3 and 2°, respectively. Comparatively, by plugging the SDFP-APD before the RFPA, the input power of the RFPA at the P1dB is put forward from −2 to 0.5 dBm and the phase shift is just 0.4°. The simulation comparisons illustrate that the RFPA with the SDFP-APD can make the input power of the P1dB of the RFPA put forward and the minimum phase shift among the three APDs. Though the input of the P1dB of the RFPA with the FET-APD can reach 0.8 dBm, the phase is overcompensated. Therefore, the proposed SDFP-APD has the best compression compensation among the three APDs.
Experimental validation: As shown in Figure 3, to fully validate the feasibility of the proposed APD technique, according to the theory in Section 2, the FET-APD, the SD-APD, and the SDFP-APD working at 3.5 GHz are designed and fabricated, respectively. The substrates employed by the three APDs are all Rogers4003C with a thickness of 20 mil and the dielectric constant of 3.55. The experimental setup includes a vector signal generator (VSG, R&S SMW200A), a spectrum analyser (R&S, FSW), a 3.5-GHz RFPA (CGH40010), a drive amplifier, APDs, power suppliers and a computer. Corresponding experimental verification is carried out at 3.5-GHz frequency, using a 100-MHz 5G new radio (NR) signal with a simultaneous quadrature phase-shift keying (QPSK) modulation and a 256-quadrature amplitude modulation (QAM). It should be noted that the bias settings of the APDs are same to those of the simulation validation in Figure 2.

Results:
The experimental results are shown in Figures 4 and 5   RFPA is improved by 4.7, 7.2 and 11.8, respectively, by adding the FET-APD, the SD-APD and the SDFP-APD. Thus, the linearisation performance of the proposed SDFP-APD is the best among the three APDs. Furthermore, after adding the SDFP-APD, the error vector magnitude (EVM) of the RFPA is improved from 5.93% to 3.42%. Table 1 exhibits the performance of some previously reported APDs, which indicates that the SDFP-APD is the most competitive among them in terms of the bandwidth and the modulation.
Conclusion: An APD named SDFP-APD is reported in this letter. The simulation results illustrate that the proposed SDFP-APD owns the best compression compensation among the SD-APD, the FET-APD and the SDFP-APD. Furthermore, the experimental results show that the SDFP-APD can not only improve the ACLR of the RFPA with the best linearisation performance among the three APDs but also decrease the EVM with a simultaneous QPSK and 256-QAM 5G-NR signal, making the SDPF-APD a very promising linearisation technique for 5G small-cell base stations.