Improved charging phenomenon with a modiﬁed barrier structure for ﬂexible displays fabricated on polyimide substrates

Inapreviousstudy,theauthorsinvestigatedthatabnormal V th behaviour could occur due to polyimide charging when a voltage was applied to the gate in thin ﬁlm transistors fabricated on polyimide substrates. The authors propose a barrier structure that could prevent this charging effect when fabricating ﬂexible thin ﬁlm transistors on polyimide substrates. The barrier layer was changed to an SiOCH/SiO 2 double layer to reduce the inﬂuence of ﬂuorine ions generated in PI by nega- tive bias temperature stress. To conﬁrm the effect of the SiOCH layer, Al/PI/SiO 2 /Al, Al/PI/SiOCH/SiO 2 /Al metal-insulator-metal capacitors were fabricated and electrical properties were measured. When bias stress was applied, changes in current and capacitance were observed only in the device with a single SiO 2 barrier layer. In addition, it was conﬁrmedthrough secondaryionmassspectrometrymeasurementsthat the Si–CH 3 bonds in the SiOCH layer were replaced with Si–F bonds by the ﬂuorine ions originating from PI. It was also veriﬁed that the abnor- mal behaviour of V th did not occur after negative bias temperature stress of the thin ﬁlm transistor fabricated using an SiOCH/SiO 2 double layer.

✉ Email: bdchoi@skku.edu In a previous study, the authors investigated that abnormal V th behaviour could occur due to polyimide charging when a voltage was applied to the gate in thin film transistors fabricated on polyimide substrates. The authors propose a barrier structure that could prevent this charging effect when fabricating flexible thin film transistors on polyimide substrates. The barrier layer was changed to an SiOCH/SiO 2 double layer to reduce the influence of fluorine ions generated in PI by negative bias temperature stress. To confirm the effect of the SiOCH layer, Al/PI/SiO 2 /Al, Al/PI/SiOCH/SiO 2 /Al metal-insulator-metal capacitors were fabricated and electrical properties were measured. When bias stress was applied, changes in current and capacitance were observed only in the device with a single SiO 2 barrier layer. In addition, it was confirmed through secondary ion mass spectrometry measurements that the Si-CH 3 bonds in the SiOCH layer were replaced with Si-F bonds by the fluorine ions originating from PI. It was also verified that the abnormal behaviour of V th did not occur after negative bias temperature stress of the thin film transistor fabricated using an SiOCH/SiO 2 double layer.
Introduction: Flexible displays can be applied to various forms by improving the degrees of freedom of space and shape such as clothing, automobiles, artificial intelligence industries, and combinations thereof [1]. A flexible display requires flexibility to be freely deformable, so a polymer material is used as the substrate. Among the many available polymer materials, polyimide (PI) is mainly used due to its good heat resistance and low coefficient of thermal expansion. PI film with fluorinated groups is used widely because it has excellent optical transparency and high thermal conductivity [2,3]. Prior to depositing the driving element thin film transistors (TFTs) onto the PI substrate, an SiO 2 or Al 2 O 3 barrier layer is often used to prevent oxygen and moisture from penetrating into the organic light emitting diode (OLED) [4]. Since a panel consists of several TFTs to emit one OLED pixel, the fluctuation of V th for a specific TFT makes a difference in luminance resulting in an image-sticking effect in the panel. In a prior study, we confirmed that fluorine ions (F − ) resulting from PI after bias temperature stress (BTS) were charged at the interface between PI and the barrier, affecting the abnormal V th behaviour of the fabricated TFT [5]. The PI/barrier charging phenomenon caused by F − can shift the V th of the TFT, producing a negative effect on stability.
We introduce a structure that can prevent the fluorine ion-induced charging effect by using an SiOCH/SiO 2 double layer as a barrier layer. By fabricating a TFT using this barrier structure, it was confirmed that the abnormal behaviour of V th shift did not occur after negative bias temperature stress (NBTS).
Device Structure: TFTs of three structures were used. Figure 1 shows the schematic cross-section of the top-gate-staggered amorphous indium-gallium-zinc-oxide (a-IGZO) TFT used in the experiment. The difference between Device A and Device B was that the substrate was glass or PI, respectively, and Device B and Device C possessed different barrier layers such as SiO 2 and SiOCH/SiO 2 , respectively. The total

Fig. 2 Variations in transfer characteristics for TFTs according to the applied NBTS. (a) Device A (a-IGZO TFT with an SiO 2 barrier layer on a glass), (b) Device B (a-IGZO TFT with an SiO 2 barrier layer on a PI), (c) Device C (a-IGZO TFT with an SiOCH/SiO 2 barrier layer on a PI), (d) V th before/after under NBTS of the a-IGZO TFTs
thickness of SiO 2 and SiOCH/SiO 2 was controlled to 200 nm. The following processes after the barrier layer were the same for all TFTs. SiO 2 and SiOCH used as the buffer layer were deposited via plasma enhanced chemical vapour deposition (PECVD). An Mo layer was deposited onto the buffer layer and then patterned via photolithography to form source and drain electrodes. A 50-nm-thick active layer of a-IGZO was formed via DC sputtering at 200°C. A 50-nm-thick Al 2 O 3 layer as a gate insulator (GI) was deposited via atomic layer deposition (ALD). Contact holes were formed on the GI layer by photolithography and dry etching. The gate electrode was deposited via DC sputtering.
The channel width (W) and length (L) of the TFTs used in the experiment was 40 um, respectively. To confirm the charging effect more intuitively, electrical characteristics as I-V and C-V measured with Al/SiO 2 /PI/Al, Al/SiO 2 /SiOCH/Al metal-insulator-metal (MIM) capacitors using the barrier layer of the TFT device as an insulator were evaluated under NBTS. Finally, after NBTS, a secondary ion mass spectrometry (SIMS) analysis was carried out to confirm the interface between the barrier and PI.
Results and Discussion: Figure 2 shows the I D −V G plot measured over time while applying NBTS. NBTS was performed with −10 V applied to the gate at 70°C; the duration of stress was 4000 s. To increase the reliability of the experimental data, five samples were evaluated for each device. After NBTS, the V th shift of each device can be seen in the box plot in Figure 2(d); the V th shifts of Device A, Device B, and Device C were −0.48 V, 0.21 V, and −0.47 V, respectively. The direction of the V th shift was negative for Devices A and C but positive for Device B. In general, when NBTS was applied to a-IGZO TFT, holes became trapped in

Fig. 3 C-V plots before/after NBTS of the MIM capacitors. (a) C-V plots and the structure of the Al/SiO 2 /PI/Al capacitor, (b) C-V plots and the structure of the Al/SiO 2 /SiOCH/PI/Al capacitor, (c) Charge density of Al/SiO 2 /PI/Al according to voltage, (d) Charge density of Al/SiO 2 /SiOCH/PI/Al according to voltage
the active channel and GI, resulting in a negative shift of V th [6]. It was found in a previous study that the cause of the abnormal V th behaviour in Device B was because F − was generated from PI and charging occurred at the interface between PI and the barrier [5]. Although Device C was fabricated onto the PI substrate, the abnormal V th behaviour did not occur by NBTS.
To verify that the barrier structure proposed here controlled the charging phenomenon by F − , the C-V of the MIM capacitor was measured prior to and after NBTS. Figures 3(a) and (b) show the C-V characteristics for various PI structures under NBTS. Stress voltages of −10 V, −20 V, and −30 V were applied to the upper electrode. As the voltage intensity increased, the capacitance of the Al/SiO 2 /PI/Al capacitor decreased; however, the Al/SiO 2 /SiOCH/Al capacitor was negligible. The same evaluation was performed with four samples for each capacitor. Figures 3(c) and (d) show the change in charge density (Q) of the MIM capacitor according to voltage. The change in charge density was 6.0 (C/cm 2 ) when a single SiO 2 layer was used as a barrier; however, when an SiOCH/SiO 2 double layer was used, the change in charge was insignificant to less than 0.72 (C/cm 2 ). It could be inferred that this change in charge density caused an increase in the electric field as in Equation (1): where E is the electric field between capacitor, σ is the charge density, ε 0 is the permittivity of free space, Q is the charge, and A is the capacitor area. This change in charge density resulted in a substrate bias applied to the a-IGZO TFT. This implied that the change in charge density represented the generation of substrate bias in a-IGZO TFTs. During the NBTS evaluation, it was estimated that increase in voltage stress caused a positive V th shift through accumulation of holes in the active bulk layer of a-IGZO due to charging between the PI/barrier rather than hole trapping at the GI/a-IGZO interface in Device B. Figure 4 shows the I-V characteristics of the MIM capacitor under NBTS conditions. The current value of the device using SiO 2 as a barrier layer increased as the voltage stress increased; however, the change was insignificant for the device using SiOCH/SiO 2 . It could be estimated that the leakage current increased due to the generation of defects as the bonds of the PI layer were broken. Figure 5 shows the SIMS results before/after NBTS of the capacitor structures shown above. It could be seen  Figure 5(a) that the fluorine ions separated from PI were accumulated at the SiO 2 and PI interface after NBTS. It is not known exactly how the polymer chain bond structure is formed in PI, but it can be confirmed indirectly through SIMS results that F bonds are included.
These accumulated fluorine ions at the interface could affect the electrical characteristics of TFT structures fabricated on PI substrates. The SiOCH film is a low dielectric and relatively more Si-CH 3 bonds with weak strength than SiO 2 film [7]. For the device using SiOCH/SiO 2 , there was no change in fluorine ions even after NBTS as shown in Figure 5(b); instead, SiF increased between PI and SiOCH. This can explain why F (328 KJ/mol) has a higher electron affinity compared to C (122 KJ/mol). Thus, the bond of Si-CH 3 is broken due to stress, and the Si-F bond is strengthened by replacing the CH 3 group. Furthermore, unbonded carbon can be replaced by non-polar C-C or C-H bonds, thereby preventing the charging effect [8]. As a result, charging effects were effectively prevented by consuming fluorine ions via introducing the SiOCH layer.

Conclusion:
We proposed a method to improve the charging phenomenon that occurred between the PI substrate and the barrier of flexible TFTs. In such a device fabricated on PI substrates, fluorine ions can be induced from the PI by BTS. A barrier of flexible TFT was proposed as a double layer of SiOCH/SiO 2 and it was found that charging was suppressed by consuming fluorine ions generated from PI. This result was expected to play a big role towards improving the reliability of not only the flexible display industry but also PI-based flexible devices.