Dynamic on-state resistance instability characterization of a Multi-chip-GaN MIS-HEMTs Cascode power module

The dynamic on-state resistance instability of a high-current cascode multi-GaN-chip power module under high frequency and voltage switching conditions is demonstrated in this paper. The presented double pulse test (DPT) topology is utilized to evaluate switching dependencies on voltage, current, and frequency, showing its versatility in investigating the switching instability of the device. The extended defects in the buﬀer layer resulted in a decrease in dynamic on-state resistance (RDS-ON) under hard switching conditions. Despite this, no noticeable RDS-ON degradation occurs under harsh switching conditions due to electron de-trapping. This study comprehensively analyzes the dynamic stability of a multi-GaN-chip cascode module with devices.

Abstract. The dynamic on-state resistance instability of a high-current cascode multi-GaNchip power module under high frequency and voltage switching conditions is demonstrated in this paper. The presented double pulse test (DPT) topology is utilized to evaluate switching dependencies on voltage, current, and frequency, showing its versatility in investigating the switching instability of the device. The extended defects in the buffer layer resulted in a decrease in dynamic on-state resistance (RDS-ON) under hard switching conditions. Despite this, no noticeable RDS-ON degradation occurs under harsh switching conditions due to electron de-trapping. This study comprehensively analyzes the dynamic stability of a multi-GaN-chip cascode module with devices.
Introduction: Gallium Nitride (GaN)-based high-electronmobility transistors (HEMTs) have been superior candidates in power electronics applications for many years due to their low on-resistance, fast switching speed, hightemperature, high power, and high frequency operating characteristics [1,]. Currently available single-chip E-mode GaN power devices usually have a restricted gate voltage swing, requiring precision control in power conversion applications to avoid spikes [2]. Therefore, paralleling GaN HEMTs in cascode configuration has become a practical choice to achieve high power capability with large gate swing for GaN-based power devices [3,4].
In earlier studies, a comprehensive analysis of the multi-GaN-chip cascode power module fabrication method, thermal performance, and the potential use of GaN power switches was presented [5]. As part of the device-level stability analysis, trapping-related instabilities were examined under a specific constant bias, e.g., constant gate bias, constant drain bias, etc. In our earlier studies [6], pulsed, and prolonged gate bias or bias temperature instability are reported. In this paper, a 400 V power module which consists of two switching elements that connect multi-GaN-chips (four GaN chips) with low voltage Si MOSFETs in series is implemented for system-level stability under hard switching conditions, which is shown in  For decades, GaN-based power devices have been developed and commercialized, showing their potential for use in consumer electronics [1]. However, various GaN devices suffer from dynamic on-state resistance (RDS-ON) degradation during system-level operations, which hinders their practical use [7]. Electron trapping or detrapping from surface traps and/or buffer traps caused by the high electric field across the device under hard switching conditions is one of the reasons. Furthermore, hot electron generations in the channel are injected at the surface or in the buffer stack, which could be another cause of RDS-ON degradations. Despite numerous advanced technologies that mitigate the current collapse, dynamic RDS-ON degradation remains a major concern for commercial GaN devices.
In this work, the dynamic RDS-ON degradation of the novel multi-GaN-chip cascode power module is investigated to predict its accurate performance. To assess the switching dependencies of the device under test (DUT) such as voltage, current, frequency, and duty cycle, the double pulse test (DPT) method was employed.

Topology and Methodology:
The DPT is a typical method for assessing the dynamic RDS-ON of power devices for switching under hard conditions [8]. At the second pulse with the required voltage and current, the switching transient response of the DUT can be recorded. Furthermore, the DPT method achieves various switching dependencies for dynamic RDS-ON degradation studies. Fig.  2a shows the DPT schematic circuit for the hard switching conditions used in this study. A bulk capacitor (Cbulk) with a huge capacitance of 520 μF was selected for fast transmission of electric energy and to ensure the input power voltage was steady. The Schottky barrier diode (SBD) provides freewheeling communication for the inductive load in this system. Inductive and resistive loads (RL) were integrated to provide a low resistance and inductance current path to the DUT. An isolated half-bridge driver IC Si8271 was chosen from the test board to offer quick propagation time and a broad supply range [9]. The switching speed is controlled by external resistors such as RG-OFF of 2 Ω and RG-ON of 5 Ω.
A clamping circuit was added to prevent high off-state voltage while accurately determining the low on-state drain voltage, which relies on a Zener diode (DZ1) and a SiC Schottky diode (D1) with high voltage and fast switching and zero recovery [9]. A high voltage is applied between the source and drain, the D1 in the clamping circuit gets reverse biased, and current flows through a DZ1, resistance (R1), and a low-power supply (9 V). The clamping voltage is used as the measured voltage because it is substantially smaller than the off-state voltage of the real DUT. The onstate drain voltage was derived by subtracting the measured drain-to-source value (VDS_m) from the diode D1 turn-on voltage (VF_D1).  . At t1, the DUT switches to on-state and is maintained for 2 μs until t2. The load current (IL) through the DUT keeps rising as the inductive load charges up. At t2, the current through the DUT increased to 4 A. Afterwards, a SiC SBD is used as a freewheeling diode, while the DUT is switched off for 1 μs. Later, the DUT turns on again for another 2 μs under the second pulse and the current increases to 9 A at the end of the second pulse at t4. With a measuring delay time of 300 ns, we observed dynamic RDS-ON of the DUT under the second pulse. With various switching voltages, the load current at the end of the initial on-state pulse can be maintained at the same value by adjusting the load inductance.
Results: To our knowledge, this is the first study demonstrating effective double pulse switching up to 300V using multi-GaN-chip cascode devices at 300kHz and 60% duty cycle. Fig. 4a shows the observed dynamic RDS-ON of the DUT at different off-state voltages from 50 to 300 V with a 50 V step value. By adjusting the external RL-load, the IDS is kept constant at 4 A for each switching voltage. Additionally, a 20 min test interval is utilized to fully release the trapped electrons to evaluate the accuracy of the dynamic RDS-ON for each off-state voltage. A very minimal decrease in RDS-ON devices were observed with increasing off-state voltage.  Fig. 4b shows the normalized dynamic RDS-ON for both devices from the cascode power module over various switching voltages and the differences between them. Normalized RDS-ON decreases from 1 mΩ to 0.85 mΩ as the switching voltage increases. The device has a high RDS-ON despite its low off-voltage (50 V), which correlates with GaN HEMTs in general [8]. As the off-state voltage increases from 100 to 300 V, the dynamic RDS-ON degradation reduces and becomes more stable with the lowest value of 215 mΩ. In addition, the difference between the two devices is negligible (0.032 mΩ), so the cascode power module has the same characteristics regardless of the off-state voltage.  At low switching frequencies, the device exhibits slightly high RDS-ON, but as the switching frequency increases, RDS-ON decreases and becomes stable. Fig. 5b confirms the same characteristics of both devices from the cascode module regardless of various switching frequencies. Furthermore, neither device showed discernible RDS-ON degradation for high frequency switching (400 kHz). Fig. 6a shows the dynamic R-ON of the DUT for different IDS from 2 to 10 A with VDS = 100 V and 300 kHz. In response to an increase in switching current, the RDS-ON decreases as well. Fig. 6b shows the normalized dynamic RDS-ON for increasing IDS at different off-state voltages. When the IDS value was more than 4 A, the DUT observed a reduction of RDS-ON from 1 mΩ (50 V) to 0.6 for 300 V; 6 A, 0.31 mΩ for 300 V; 8 A, and 0.01 mΩ for 300 V; 10 A. The RDS-ON of the DUT decreased and became unstable with increasing off-state voltage and current switching conditions. Additionally, Fig. 6b verifies that both devices from the cascode module have the same characteristics, regardless of the various offstate voltages and currents. Discussions: Recently, researchers have studied buffer, barrier, and surface trapping mechanisms that generate traps during device growth phases [10]. A highly resistive buffer layer is created by doping carbon, resulting in extended defects from carbon compensations [11]. Fig. 7a show the buffer-related traps in GaN HEMT. Trap states that are present in the bulk, near the 2DEG, or at the surface often promote the trapping/detrapping processes that lead to RDS-ON degradation. Under hard switching conditions, the dynamic RDS-ON decreases differently from previous reports. During high current switching, trapped electrons can be reduced. Fig. 7b shows the hole injection from drain due to high channel current. At harsh switching conditions, the observed decrease in dynamic on-resistance can be explained by the "hole injection" approach to charge storage [12]. As a result of a highly carbon-doped buffer layer and leakage path between the source and drain, the hole current can flow from the drain into the buffer layer. Vertical leakage holes from the drain into the buffer layer release trapped electrons under high channel current, resulting in the decrease of dynamic RDS-ON. As channel current increases, the number of emitted electrons rises, which leads to unstable RDS-ON.

Conclusion:
In this paper, we investigated the dynamic onresistance behavior of a multi-GaN-chip cascode power module under hard-switching conditions. With field plate technology in GaN HEMT, the electron trapping effect was minimized. The performance of dynamic RDS-ON appears non-monotonic, indicating constant drops as off-state voltage, switching frequency, and current increase. All the results suggest that RDS-ON is dropped as a result of vertical leakage holes from the drain into the buffer layer releasing trapped electrons under high channel current. A multi-GaN-chip cascode power module requires more quantitative research to fully understand its dynamic characteristics.