Open‐circuit fault‐tolerant operation of permanent magnet synchronous generator drives for wind turbine systems using a computationally efficient model predictive current control

European Regional Development Fund, Grant/ Award Numbers: POCI‐01‐0145‐FEDER‐029494; FCT ‐ Portuguese Foundation for Science and Technology, Grant/Award Numbers: PTDC/EEI‐ EEE/29494/2017, UIDB/04131/2020, and UIDP/ 04131/2020 Abstract Model predictive fault‐tolerant current control (MPFTCC) of permanent magnet synchronous generator (PMSG) drives can make a valuable contribution to improving the reliability and availability levels of wind turbines, because back‐to‐back (BTB) converters are prone to failure. However, MPFTCC suffers from excessive computational burden, because the BTB converter is treated as one system where all feasible voltage vectors (VVs) are used for prediction and evaluation. Accordingly, a computationally efficient MPFTCC algorithm for a PMSG drive is developed and proposed with the ability to handle insulated‐ gate bipolar transistor open‐circuit faults. The candidate VVs of both machine‐ and grid‐side converters are separately predicted and evaluated, which significantly reduces calculation effort. The proposed reconfigurable converter is a five‐leg power converter with a common leg that connects the generator first phase to the grid three‐phase, ensuring proper postfault reconfiguration of the grid‐side inverter. Moreover, a three‐switch rectifier is adopted to achieve fault tolerance of the PMSG‐side rectifier. Performance of the considered MPFTCC strategies is evaluated by experimental means.

redundant topologies force converter oversizing or derating due to the reduced voltage and current capabilities of the converter. Several topologies have been investigated: connecting the DC bus midpoint to the three-phase converter [16,17] or transformer/generator neutral point [18] through three additional TRIACs. Thus, the DC-link voltage must be doubled to achieve the rated power, or the three-phase current amplitude must be increased by a factor of 3 compared with standard BTB converter capability. However, voltage fluctuations and current stresses are imposed on capacitors due to the DC bus split, requiring an extra voltage sensor to limit fluctuations and the proper design of DC-link capacitors. In [19], a reconfigurable BTB topology was proposed to maintain operation under multiple faults. Apart from the split of the DC bus capacitors, six TRIACs are required to achieve fault tolerance, which leads to increased system cost and complexity.
With the aim to avoid the connecting of DC bus capacitors, five-leg power converter (FLC) topologies with a common leg have been adopted by connecting the three-phase machine through three TRIACs to the phases of a similar three-phase grid [20][21][22][23][24][25]. Similar converter topologies were addressed in [26][27][28][29][30][31][32][33] by connecting symmetrical legs in multimotor drives. Apart from the aforementioned advantage, these topologies can be easily implemented and require fewer devices (only three TRIACs). However, the voltage capability of the converter is reduced, and all legs must be designed for twice the rated current. An alternative FLC with a shared leg between the machine phase and the grid transformer neutral point was proposed in [34]. This configuration increases converter voltage capability, but the shared leg current is four times higher than the rated current. Moreover, a transformer is required, and neutral point access must be considered in making the desired connections. In [35], multimotor neutral points were connected for postfault operation where phase currents were increased by a factor of 3. Again, other components should be involved to achieve converter fault tolerance but may not be available.
After hardware modification, a postfault control strategy is required for optimising drive performance. Hysteresis current control with fault-tolerance capabilities was proposed in [18,23,24,30,34] and revealed excellent dynamic performance, parameter independence and low calculation time. On the other hand, simple implementation, low parameter dependence and fast response are achieved by the direct control technique [17, 20 and 34]. However, both control schemes generate substantial current and torque ripples. Pulse-width modulation was widely used in [14-16, 21, 23-29, 34, 35]. Despite the high tuning effort required by proportional integral (PI) controllers, they present high steady-state performance because of the superior modulation strategy. Recently, the development of model predictive fault-tolerant control (MPFTC) has gained considerable interest. It presents several advantages such as fast control dynamics, a straightforward concept and the ability to include multiple constraints into the cost function, thus making it a promising alternative for power converters. For a BTB converter operating normally, both converters are separately controlled, in which case eight predictions and one cost function are needed for each power converter. However, for a shared-leg-based FLC, the constraint imposed by the sharedleg structure must be considered. For FLCs, MPFTC schemes have been developed in [22,[31][32][33]. However, in [31] the FLC was treated as one system to be controlled by a standard MPFTC, where 32 voltage vectors (VVs) are employed for prediction and evaluation in a single cost function, making control computationally demanding. To reduce the number of VVs, an adjacent VV scheme was proposed, but control performance is strongly affected by when VVs are reduced. In [32,33], the simultaneous consideration of both the converters and the FLC as a single system by the MPFTC gives rise to another approach to minimise the number of VVs. Both converters were separately evaluated through two cost-function designs. A third cost function was designed for FLC evaluation. Another approach with fewer predictions and evaluations of only 16 VVs was addressed in [22] by considering both converters and the FLC as a single system. For each shared leg state (0 or 1), the computation of three cost functions were required. As a result, six cost functions must be designed for FLC evaluation. Although the aforementioned approaches reduce the number of candidate VVs, these design procedures are not intuitive and are complicated, therefore increasing algorithm complexity. The application of artificial intelligence algorithms is a significant trend in fault-tolerant control [36][37][38]; however, these algorithms are computationally demanding.
As opposed to the GSC reconfiguration, the semicontrolled machine-side converter (MSC) using a three-switch rectifier (TSR) proposed in [17,34,39,40] does not require extra devices or system oversizing, making it very attractive for MSC fault tolerance. Nevertheless, generator torque ripple due to the TSR's physical limitations, as well as its minimisation, has not been considered. In [18], different control schemes have been proposed for torque ripple reduction. Another converter topology and control approach are proposed in [41] for rectifier fault tolerance with d-axis current injection and a modified PI anti-windup strategy. However, the topology does not consider BTB operation, and the reconfigured currents remain at zero for a short period, resulting in poor control performance. Although direct and vector control techniques have been employed, the use of MPFTC for the TSR has not yet been investigated.
Accordingly, this study's contributions are as follows: -A new cost-effective FLC topology is proposed for GSC fault tolerance that relies on one shared leg of the MSC connected to the GSC's three phases through three TRI-ACs. Only the shared leg must be designed, with a rated current two times as high as the remaining converter legs, avoiding the classical shared-leg-based FLC in [20][21][22][23][24][25][26][27][28][29][30][31][32][33] with twice the current rating in all of the converter legs. -As opposed to the predictive schemes in [22,[31][32][33] that consider FLC as a single converter and require either the evaluation of 32 VVs or the design of at least three cost functions for VV minimisation, a simple model predictive fault-tolerant current control (MPFTCC) with reduced computational effort is developed in this study, where both the MSC and the GSC are separately controlled, 838thus requiring only 16 VVs and two cost function designs for predictions and evaluations. The postfault operation is ensured by comparing both cost functions and giving priority to control of each converter in each sampling period. -A TSR topology without additional devices or system oversizing is adopted for MSC fault tolerance. As opposed to the direct and vector control techniques in [17,18,34,[39][40][41] that require control modifications for selecting the optimum VV of the TSR topology, a simpler MPFTCC is proposed and analysed herein, where the optimum VV is obtained from cost function minimisation without extra control modifications.
The effectiveness of the proposed fault-tolerant converter topologies and control strategies are verified by means of experimental results.

| FAULT-TOLERANT CONVERTER
The considered BTB converter topologies are based on two standard six-switch converters with three additional TRIACs that connect each GSC phase to the first phase of the MSC and remain open under healthy operation, as shown in Figure 1a. The TRIACs are required in order to reconfigure the GSC topology and to allow current flow between the grid and generator phases. For GSC postfault operation, as shown in Figure 1b, the GSC operates by two healthy phases, being the faulty phase connected to the MSC common leg by triggering the corresponding TRIAC, which changes the standard BTB converter from a six-leg converter to an FLC topology. Only one shared leg is needed to support twice the current rating, avoiding the standard connection of similar legs in [20][21][22][23][24][25][26][27][28][29][30][31][32][33], resorting to six common legs. On the other side, to achieve the MSC fault tolerance, a different path for current flow is possible through the anti-parallel diodes of the TSR without extra devices or system oversizing, as can be seen in Figure 1c.

| Finite control set-model predictive control of machine-side converter
Assuming that the dq synchronous reference frame is controlled in such a way that the rotor flux space vector is always aligned with the d-axis, the current dynamic model of a surface-mounted PMSG (L sd = L sq = L s ) is given by where v sdq and i sdq are the stator voltages and currents in the dq synchronous reference frame, respectively, R s and L s are the stator resistance and inductance, respectively, ψ PM is the permanent magnet flux linkage and ω s is the synchronous electrical frequency. Therefore, the generator electromagnetic torque is given by where p is the pole pairs number. Using the standard Euler approximation, the discrete version of (1) at the (k + 1)th sampling period is expressed as where i sdq k are the stator currents at the instant kth, T s is the sampling interval and v sdq k are the stator voltages constructed from the optimal VV applied to the MSC at the instant kth. In real-time implementation, the calculation time of the control algorithm forces one-step time delay that must be compensated [42]. Therefore, i sd k + 2 rather than i sd k + 1 , and i sq k + 2 rather than i sq k + 1 , are used in the cost function. They can be predicted at the (k + 2)th control period in a way similar to (3): where v sdq k + 1 are constructed from the eight VVs that the MSC can synthesise. In a PMSG drive, the torque reference T e * can be obtained from the speed controller. Accounting for the direct relation between the torque and current references (i * sq ¼ 2T * e =3pψ PM ) and imposing i * sd ¼ 0 for a maximum torque per ampere ratio, the cost function is defined as g 1=S 0;::: where ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi The symbol '*' denotes the reference value, the current i sm represents the over current protection term and i smax refers to the current limit value.
If the generator current exceeds the limit value, the corresponding VV is ignored. Thus, the optimal VV for the MSC can be determined by minimising (5): ; l ∈ f0; :::; 7g ð6Þ where g 1/Sl is the minimum current error corresponding to the optimal VV of the MSC.

| Finite control set-model predictive control of the grid-side converter
In the GSC, grid active and reactive powers can be indirectly controlled by evaluating the grid currents in the cost function.
Considering that the dq-axes rotate at the grid voltage frequency and that the grid voltage space vector is always aligned with the q-axis, the grid current dynamic model can be represented as follows: where v gdq and i gdq are the grid voltages and currents in the dq synchronous reference frame, respectively, v cdq are the GSC voltages, R f and L f are the filter resistance and inductance, respectively, and ω g is the grid electrical frequency. The active power p g is indirectly controlled through the current i gq , while the reactive power q g is indirectly controlled through the current i gd . They are given by The predicted current at the (k+1)th instant is given by where v gdq k and i gdq k are the grid voltages and currents at the instant kth, respectively, and v cdq k are constructed from the optimal VV applied to the GSC at the instant kth. The currents at the (k+2)th instant can be expressed as where the v cdq k + 1 are computed from the eight candidate VVs of the GSC. For a small sampling period with respect to grid 840 -JLASSI AND MARQUES CARDOSO fundamental frequency, it can be assumed that v kþ1 gq ¼ v k gq . Therefore, the cost function is defined as g 2=S 0;::: where Current i gm stands for the PMSG over current protection and i gmax refers to the current limit value. It is important to emphasise that i gd * is set to zero to impose a unity grid power factor (q g ¼ 0), while i * gq is generated by the DC-link voltage controller. Finally, the optimal VV for the GSC is selected by minimising (11): ; l ∈ f0; :::; 7g ð12Þ where g 2/Sl is the minimum current error corresponding to the optimal VV of the GSC.

| Finite control set-model predictive control of the five-leg power converter
Accounting for the physical limitations of the FLC topology, both optimum VVs to be applied to the MSC and GSC must have identical states of the shared leg to achieve independent control. To fulfil this condition, a control priority should be assigned to one of the converters every sampling interval. This can be accomplished by comparing both of the minimum current errors g 1/Sl and g 2/Sl resulting from cost function minimisations (6) and (12), respectively. At this stage, the converter with priority should have a minimum error higher than the other. Then, the states of the shared leg and faulty leg must also be compared, with the aim to redistribute the optimum VVs. Accordingly, the converter with priority is controlled with its optimum VV, while the other is subjected to its optimum VV or a zero VV depending on the states of the shared and faulty legs. For instance, considering that leg 'C' is affected (see Figure 1b), if g 1/Sl is higher than g 2/Sl , meaning that the minimum current error from the MSC increases, while the one from the GSC is kept small, priority is assigned to the control of the MSC. In this case, if the switching signal of the shared leg is different from that determined for the affected leg (S a ≠ S C ), the MSC is controlled through its optimum VV, whereas the GSC is subjected to a zero VV by forcing its switching signals to be equal to S a (either {000} or {111}). Conversely, if g 1/Sl is less than g 2/Sl , the control priority should be given to the GSC. Thus, if S a ≠ S C , the optimum VV of the GSC and a zero VV of the MSC are selected. It is important to emphasise that if S a = S C , each power converter is controlled through its optimum VV as in the healthy mode independently of the g 1/Sl and g 2/Sl values. Consequently, a reduced current harmonic distortion is achieved by assigning priority to control each of the power converters. The previous consideration is summarised in Table 1 for the different scenarios of postfault control strategies.

| Five-leg power converter voltage and current capabilities
In FLC, the linear modulation range is defined as where V dc is the DC-link voltage. V c and V s are the GSC and MSC phase-to-neutral voltage amplitude, respectively. Considering that the V c value is fixed by the constant grid voltage and that the V s value is proportional to the PMSG speed; only the V dc value can be increased and/or the PMSG speed can be reduced with the aim to keep the drive operation within the region defined in (13). Assuming that V s = V c , the voltage capability of the converter is decreased by 29%, which requires the V dc to be doubled as well as drive component oversizing. On the other hand, the required V dc can be decreased by limiting the generator speed. Thus, the maximum admissible speed is limited by V s,max , given by where V dc,max stands for the maximum value of V dc . The current value in the shared leg (I sh ) is the sum of the grid phase current (I Grid ) and the machine phase current (I PMSG ), whereas the current values in the remaining legs are the sameasinastandardconverter.Thecommonlegcurrentisgivenby Considering the direct relation between the torque and current, and assuming that the grid current is proportional to the machine mechanical power, the current-per-unit in the shared leg (I sh p.u ) can be expressed as follows: where ω r p.u and T L p.u are the speed and torque per unit, respectively.
To avoid shared leg oversizing by considering system derating, the shared leg current should be limited. Considering the speed limitation restricted by (14), the torque also should be limited according to (16).
It is important to emphasise that to achieve continuous operation under the rated power, the current in the common leg must be twice the value of the current of the standard converter. In comparison with the FLC with the common leg connected to the transformer neutral point and machine phases [34], where the shared leg must assume a current value four times as high, the proposed FLC has improved current capability.

| FINITE CONTROL SET-MODEL PREDICTIVE CONTROL OF THE THREE-SWITCH RECTIFIER
When an O-C fault occurs in the MSC, the fault can be isolated by forcing the command signals to zero for the three bottom or upper insulated-gate bipolar transistors (IGBTs), depending on whether a bottom or upper switch is damaged, respectively, changing the converter topology from a standard rectifier to a TSR. Consequently, the sinusoidal currents cannot be formed in some regions of the complex plane (see Figure 2) due to the limited number of candidate VVs [39]. Let us use TSR with bottom power switches (Figure 1c) as an example and assume that voltage and current are in phase opposition. When one of the IGBTs R4, R5 or R6 is turned on, the current flows through it, while the diode of R1, R2 or R3 from the same leg is reverse-biased. On the other hand, when IGBT R4, R5 or R6 is turned off, the diode R1, R2 or R3 from the same leg is forward-biased, and the current must flow through it. Therefore, two different phase current conditions must be considered depending on phase current polarity (see Table 2). First, when two of the three-phase currents are negative, the TSR has two degrees of freedom associated with the states of the IGBTs corresponding to the two negative phase currents, resulting in four possible switching states. As a result, four of the eight VVs are available. Similar cases can be found in sectors II, IV and VI, where there are four feasible VVs.
Second, if only one phase current is negative, which is the case in sectors I, III and V, only one degree of freedom is associated with the state of the switch in the leg corresponding to the negative phase current, and therefore, only two VVs are feasible.
As opposed to vector and direct control techniques that require redistribution of the suitable VVs according to Table 2, in MPFTCC there is no need for additional changes because all eight VVs that the converter can synthesise are used for prediction and evaluation in the cost function (5). Accordingly, eight errors between the currents and their references are produced in every sampling interval. For instance, considering the TSR in Figure 1c, during sector I of Table 2, both current errors that correspond to the participating VVs V 0 and V 1 are less than the six errors of the remaining candidate VVs. Then, in cost function minimisation (6), only the VV from both candidates that produces the minimum current error will be applied to the TSR during the next sampling period. The previous consideration is also valid for the other remaining sectors, therefore applying the same analysis.
When i * sd ¼ 0, the displacement between the current and the stator flux space vectors is load-dependent, being reduced when the load torque increases. Therefore, such a control technique applied to a TSR leads to high current distortion and torque oscillation as load torque increases. Therefore, to achieve minimum current distortion, the angle between the current and stator flux space vectors should equal 90° [18]. This can be accomplished by imposing a non-zero current reference, i sd * , defined as

Current polarity of i abc -+ + --+ + -+ + --+ + --+ -
Therefore, shifting the current space vector reference i s * is given by As a consequence of a non-zero i sd * , the generator current will increase. To avoid exceeding the PMSG rated current, the i sq * value should be limited by ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffiffi where T n stands for the torque rated value. It should be noted that the procedure for obtaining (17) and (19) is explained in [18].

| EXPERIMENTAL RESULTS
The experimental test rig comprises a 2.2 kW PMSG (Table 3) coupled to a load machine, two Powerex POW-R-PAK VSIs in a BTB topology, a dSPACE DS1103 controller, a TRIAC and a filter of 20 mH. The block diagram of the experimental test bench is shown in Figure 3. Due to the limitation of the experimental setup, all experimental tests were performed for a grid phase-to-phase RMS voltage of 50 V and a DC-link voltage of 290 V, allowing the machine to reach the maximum admissible reference speed of 1100 rpm for normal drive operation. The proposed and standard MPFTCC are implemented in the controller using Matlab/Simulink software. Considering that the execution time must be lower than T s and that control variable ripples highly depend on T s , the T s of the proposed and standard algorithms are set to 50 and 100 μs, respectively. Table 4 shows that the considered algorithm takes only 41.5 μs to complete the code thanks to the reduced number of VVs, proving to be quite a good choice for the fault-tolerant PMSG drives. The standard algorithm is computationally demanding (93.1 μs) because selecting the optimum VV requires prediction of 32 VVs that the FLC can synthesise.
To better evaluate postfault control performance, total harmonic distortion (THD) and total waveform oscillation (TWO) are employed to quantify the current distortion and ripple of a given quantity, respectively. They are given by T HD eq ¼ ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi T W O ¼ ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi ffi where THD eq is the equivalent THD considering the three phases. X eRMS and X eDC are the RMS and average values, respectively. Figure 4 and Table 5 present the experimental results of the reconfiguration process for the MPFTCC strategy under a GSC reconfiguration. A reference mechanical speed of 720 rpm and 50% of load torque are considered. At the instant t = 0.301 s, an O-C fault occurs in IGBT I3. As a result, the current in the affected phase only assumes negative values, generating more distorted current waveforms and pulsating active and reactive power waveforms. Despite this, the fault does not influence MSC performance, but it strongly affects the performance of the GSC, forcing system shutdown if remedial strategies are not quickly triggered. After an imposed time delay equal to one grid current period, remedial procedures are applied by forcing the IGBT gate signals of leg 'C' (I3 and I6) to zero and by turning on the TRIAC TRc, connecting the affected phase to the shared leg, as illustrated in Figure 1b. Simultaneously, the optimal switching vectors to be applied to the MSC and GSC are reformulated with the aim to control both converters with priorities according to able to maintain operations in the range of (16) without overcurrent in the shared leg. As a consequence of the hardware and software reconfigurations, the grid currents maintain a sinusoidal waveform very similar to that of normal operation with approximately the same amplitude. The slight increase in grid current THD and the active and reactive powers of the TWO values are due to the control priority assigned to each power converter. Nevertheless, the three phase currents and DC-link voltage control remain possible under postfault operation, allowing a unity power factor. The PMSG speed follows its. reference value after a transient due to the reconfiguration process. Thus, the machine develops a smooth torque and generates a three-phase current system very similar to the healthy case. The fault-tolerant MSC and its corresponding postfault control modifications are considered in Figure 5 and Table 6.

F I G U R E 5
Experimental results of the reconfiguration process under an O-C fault in insulated-gate bipolar transistor R1 of the machine-side converter 844distortion allows a pulsating torque waveform and a rising speed oscillation that impose large mechanical stresses on the generator shaft and all moving parts, leading to system shutdown if remedial postfault control strategies are not applied to the MSC. Then, at t = 0.422 s, the fault is isolated by turning off the gate signals of R1, R2 and R3, resulting in converter operation as a TSR (see Figure 1c). This leads to a significant increase in current THD and torque TWO values compared with their original values in the healthy mode. Finally, at t = 0.5 s, software compensation is considered by imposing a non-zero direct current reference (17). Consequently, current distortion is minimised as illustrated in the zoomed current. It can be confirmed that a significant reduction in current THD is achieved. As a result, marked reductions in torque oscillation and its TWO value occur. The slight increase in RMS currents is due to the new current reference value. On the other hand, the speed continues to follow its reference after transients due to fault occurrence and isolation. Therefore, considering that extra devices are avoided by employing the TSR, a satisfactory performance is achieved by the proposed MPFTCC, allowing PMSG drive operation under high load torque values as well as under the rated operating conditions.

| CONCLUSION
A computationally efficient predictive scheme is proposed for a BTB converter of PMSG drives with O-C fault-tolerant capabilities. Both the MSC and the GSC are separately controlled and their voltage hexagons independently predicted, and thus, calculation time is significantly reduced. For the GSC reconfiguration, a shared-leg-based FLC is investigated that connects the first MSC phase to the three GSC phases by employing three additional TRIACs. For an independent control, both the MSC and GSC cost functions are compared to assign control to each power converter and redistribute the switching vectors. Thus, the original VVs are applied to the power converter with priority, and the other power converter is subjected to original or zero VVs. For MSC fault tolerance, a simple TSR is adopted without requiring extra hardware. To minimise torque oscillation, a non-zero direct current reference is imposed, whereas no control modification is required to reformulate the switching vectors. Experimental results show that based on the proposed fault-tolerant algorithms, low execution time is achieved, and continuous drive operation is ensured under either the MSC or the GSC O-C, which confirms that the converter and control architectures considered have the required features to be accepted by wind turbine manufactures.