An enhanced full‐feedforward strategy to mitigate output current harmonics in grid‐tied inverters

Correspondence Kiarash Gharani Khajeh, ITEE Department, University of Queensland, St Lucia Queensland 4072, Brisbane, Australia. Email: k.gharanikhajeh@uq.edu.au Abstract The grid-tied inverters are the most vital components in renewable energy-based power systems. Hence, maintaining the power quality of a grid-tied inverter output within the standard range is an ongoing challenge in the power system. The appeared individual harmonics at inverter output current caused by grid voltage harmonics depend on the inverter output equivalent admittance. This consists of a combination of admittance seen from the point of common coupling and the phase-locked loop path. Therefore, the precise calculation of the aforementioned admittance is an inevitable requirement to design a harmonic mitigation strategy. By adding a virtual admittance to the system through modifications in the inverter control loop, the output equivalent admittance can be removed. For this purpose, in this paper, a novel full-feedforward harmonic suppression scheme is proposed which can effectively eliminate individual harmonics injected from the grid. Consequently, the individual output current harmonics of the inverter will be effectively suppressed. Simulation and experimental results have been carried out for a typical single-phase grid-tied inverter to verify the efficiency of the proposed scheme against emitted harmonics from the grid.


INTRODUCTION
The daily increase in clean energy demand at present-day world has led the engineers and researchers to find pioneering solutions for utilizing renewable energy resources in power generation. In this regard, grid-tied inverters as the state change device that intermediate between the solar photovoltaic (PV) panels and power network play a vital role [1]. In other words, the grid-tied inverter, by using pulse-width modulation (PWM) technique, changes the PV panels output from DC to AC voltage. Due to the fact that the PWM technique is based on turning on and off of the inverter switches, a non-negligible amount of ripples and harmonics are produced at the output current of the inverter [2]. To control these ripples and harmonics emission, an output filter is required at the inverter terminal. One of the most advocated filters for eliminating the mentioned ripples and harmonics is LCL filter which not only shows satisfactory highfrequency harmonic attenuation but also leads to thrift in both cost and size in comparison with other types of filters. However, the conventional LCL filter may cause instability in the system because of showing resonance at a specific frequency [3]. Hence, to avoid this shortcoming, a damping method is employed in the system [4]. Among all damping methods, passive damping method is more popular due to less design complexity and investment in comparison with other methods. In passive damping method, the LCL filter is equipped with a resistor in series with the middle branch capacitor which the resistor size should be as large to damp the filter resonance [5]. Ultimately, the current of the inverter's output filter will be a sinusoidal waveform which is suitable to be injected into the power grid. The topology of a single-phase grid-tied inverter equipped with a passive damping type of LCL filter is shown in Figure 1. Basically, the grid-tied inverter output current should be controlled for its stability and quality. The grid-tied inverter output current is stable if its magnitude and phase are close to the desired output current. The quality of the inverter output current is ensured if the level of individual harmonics as well as total harmonic distortion (THD) are limited within international standard [6,7]. In the viewpoint of the distortion source, there are two types of harmonics can appear at the grid-tied FIGURE 1 Single-phase grid-connected inverter with passive damping type of LCL filter inverter output current. First, there are high-frequency harmonics and ripples which are produced by the inverter due to the PWM procedure and inverter switching. These harmonics and ripples are limited within a standard range using the output LCL filter at the terminal of the inverter. In other words, it is expected that a grid-tied inverter equipped with a well-designed LCL filter is not subjected to any power quality problem due to this type of harmonics [8,9]. The grid voltage harmonics are the second type which can be injected to a grid-tied inverter and affect its output current quality. Contrary to the inverter switching harmonics, the level of low order grid harmonics (up to 13 rd order) is considerable while that of higher frequencies is negligible. On the other hand, although the LCL filter is able to effectively damp the high frequency harmonics and ripples, it has a limited capability to attenuate the low order harmonics. In a grid-tied inverter, the total equivalent admittance (Y ot in Figure 1) determines the level and ability of individual grid harmonic rejection of the inverter. In the case that the magnitude of total equivalent admittance of the inverter is high at the low order harmonic frequency, the individual output current harmonic will be significant if the harmonic level is not negligible. Thus, it is necessary to devise a solution to alleviate the effect of grid voltage harmonics on grid-tied inverter output current harmonics [10,11].
A number of methods have been proposed to mitigate the inverter output current harmonics caused by grid distortion. proportional resonant compensator (PRC) method is one of the most popular methods for this purpose. In this method, PR compensators are devised in the inverter current controller for each harmonic order to be alleviated. Considering the frequency deviation as well as the transient response effect, a comprehensive design strategy in order to select the PRCs parameters is introduced in [12]. A similar practice regarding the PRCs has been implemented in [13]. A non-selective current harmonic mitigation method is introduced in [14] for voltage control gridtied inverters. This method enjoys the active and reactive powers to define a reference signal which can suppress the effect of grid distortion on the system. Feedforward method is another type of strategies which is known as an effective way to alleviate the effect of grid distortion on inverter output current. In this method, the impedance of the system is reshaped by applying a feedforward transfer function into the inverter control loop. In [15], the feedforward function has been extracted for three different cases, including stationary -, synchronous d -q and decoupled synchronous d -q, in a three phase grid connected inverter. The proposed feedforward functions alleviate the current harmonics well.
Moreover, it enhance the transient response of the system in the case of grid voltage step changes. In [16], by using a feedforward scheme not only the current harmonics created due to the grid voltage harmonics are suppressed but also it is used to reshape the middle branch of the LCL filter and improve the stability of the system. The application of using a feedforward scheme in voltage source inverter based islanded micro-grid has been proposed by [17].
Basically, there are two paths that the grid voltage harmonics can affect a grid-tied inverter. The first path is when the grid voltage harmonics are entered to the grid-tied inverter via the interconnection at point of common coupling (PCC). The common point regarding the aforementioned feedforward strategies is that they only take the direct effect of grid voltage harmonics into account. However, the second path is through a phaselocked loop (PLL) that the grid voltage harmonics can affect the grid-tied inverter output harmonics. A PLL is a part of a control system a grid-tied inverter which synchronizes the inverter output current and its voltage at PCC. The PLL affects the ability of the inverter for output current harmonic rejection. Hence, the PLL control loop effect on the output equivalent admittance of the inverter should be considered [18].
In this paper, a new full-feedforward strategy, to mitigate the grid-tied inverter output current produced by the grid voltage harmonics, is introduced. In the first step, the inverter output equivalent admittance-considering the PLL control loop effect is calculated using the inverter control block diagram derivations and a synchronous reference frame (SRF) PLL. The proposed full-feedforward strategy relies on a poly-nominal transfer function with a higher order of the numerator. Due to practical constraints to implement the control transfer function (in Laplace domain) in a hardware setup, a time-domain method is presented. By applying the proposed time-domain full-feedforward function into the control loop of the inverter, the total equivalent admittance of the inverter is cancelled and the output current harmonics are effectively alleviated.
The rest of the paper is structured as follows: In Section 2, the output equivalent admittance of grid-tied inverter, considering the effect of PLL, is achieved. In Section 3, the proposed feedforward strategy is initially explained which enjoys the characteristics of full-feedforward transfer function. The result of the proposed feedforward method is a poly-nominal transfer function and its time domain presentation is proposed in the following of this section. To verify the effectiveness of the proposed method, simulation and experimental results are provided in Section 4. Ultimately, conclusion and main contributions of the work is summarized in Section 5.

INVERTER OUTPUT EQUIVALENT ADMITTANCE CONSIDERING PLL
The aim of this section is to calculate the output equivalent admittance of the inverter as one of the crucial factors to design a feedforward strategy in order to mitigate the effect of grid voltage harmonics. Figure 2, shows the control block diagram of the output current of the grid-tied inverter shown in Figure 1. As can be seen from Figure 2, the reference signal (I ref (s)) is initially constituted by the desired output current amplitude (I in ) and the estimated phase angle which is produced by the PLL from the grid voltage input. T PLL (s) is the transfer function of PLL. In the next step, the reference signal is compared with the output current of the inverter and the resulting error is applied to the inverter current controller. G 1 (s) represents the transfer function of the controller considering its computation delay. Hence: where G c (s) and G d (s) are the controller and its computational delay transfer functions, respectively. Nowadays, damped proportional resonant controller (DPRC) is known as a popular current controller for grid-tied inverters. The main advantage of DPRC in comparison with the conventional proportional resonant controller is its better performance against the frequency deviation of the system which is a common phenomenon for grid-tied inverters [19]. Therefore, considering DPRC as the current controller: where K p , K r , D and 0 are the controller proportional gain, resonant gain, damping factor and angular fundamental frequency, respectively. On the other hand, considering T s as the sampling frequency, the computational delay transfer function can be expressed by first order Pade approximation as given in (3).
As mentioned before, the output of the controller is applied to the switches of the inverter using the PWM method and consequently, the inverter terminal voltage appears as a train of pulses. G 2 (s) represents the transfer function of the inverter bridge (PWM function) which can be defined as follows: where M 0 and V dc are the modulation index and DC-link voltage, respectively. Ultimately, the inverter output voltage is exerted to the LCL filter, generating the inverter output current. G 3 (s), G 4 (s) and G 5 (s) are the transfer functions of inverter-side inductor admittance, LCL filter middle branch impedance and grid-side inductor admittance, respectively. As a result: where L 1 and R 1 are the inverter-side inductance and resistance, respectively; C and R c are the filter capacitor and passive damping resistor, respectively; and finally, L 2 and R 2 are the grid-side inductance and resistance, respectively. The characteristics of the grid-tied inverter can be simply extracted from the control block diagram shown in Figure 2. The output current of the grid-tied inverter can be obtained based on I ref (s) and V PCC (s) (as the system inputs) as follows [10,11]: A I (s) = G 1 (s)G 2 (s)G 3 (s)G 4 (s)G 5 (s) 1+G 3 (s)G 4 (s)+G 4 (s)G 5 (s) + G 1 (s)G 2 (s)G 3 (s)G 4 (s)G 5 (s) Y o (s) = G 5 (s) + G 3 (s)G 4 (s)G 5 (s) 1+G 3 (s)G 4 (s) +G 4 (s)G 5 (s)+G 1 (s)G 2 (s)G 3 (s)G 4 (s)G 5 (s) Precise estimation of the grid voltage phase angle is a vital factor to maintain the power factor of a grid-tied inverter close to 1. Therefore, PLL is an inseparable component of a grid-tied inverter to ensure the synchronization of inverter output current and grid voltage. Accuracy and promptitude are the main characteristics to evaluate the quality of a PLL implementation. Among all the introduced types of PLL, SRF-PLL is one of the simplest and most precise types [20]. In Figure 2, the effect of PLL on a grid-tied inverter is determined by its transfer function. The small signal linearized transfer functions of SRF-PLL has been proposed in [21][22][23] as follows: where is the goal power factor angle which is desired to be zero for a perfect synchronization; K P−PLL and K I−PLL are the proportional and integral gains of the loop filter, respectively; and |V g | is the amplitude of the grid voltage. According to Figure 2, the reference signal can be derived as: Based on (13), the reference signal depends on two inputs including V PCC (s) and I in . According to (8) and (13), the inverter output current expression is defined as: In (14), the term I in A I (s)T PLL (s) is the PLL output admittance. So, the output equivalent admittance of the grid-tied inverter will be as: For better illustration of the importance of PLL output admittance on inverter output equivalent admittance, Figure 3 shows the bode diagram of inverter output equivalent admittance with and without considering SRF-PLL output admittance. This diagram shows that PLL output admittance has a non-negligible effect on low order harmonics while it has completely negligible effect on inverter output equivalent admittance at high frequencies.
Based on (14), the output current of a grid tied inverter is only a function of PCC voltage. Accordingly in [21], it is interpreted that a grid-tied inverter should be considered as a variable admittance subjected to I ref (s). Consequently, the literature has modeled the grid-tied inverter as a variable admittance. Although, this model leads to correct results for any application, it is not justifying the performance of the grid-tied inverter. Basically, the first term of (14) (I in A I (s)T PLL V PCC (s)) contributes to a main Simplified control block diagram of the grid-tied inverter current generated by the inverter, while the output current is influenced by the inverter output impedance. Hence, the model shown in Figure 4 which takes the first term of (14) as a dependent current source, can present a better performance of a gridtied inverter.

PROPOSED GRID VOLTAGE FEEDFORWARD STRATEGY
To explain the logic of the proposed feedforward strategy, it is initially necessary to simplify the control block diagram of the grid tied inverter as shown in Figure 5.
The output current of the grid-tied inverter can be derived from Figure 5 as: From Equations (8) and (16): Basically, the feedforward output harmonic mitigation methods, which have been proposed by literature so far, are divided into two subcategories including full-feedforward and selective feedforward methods. In the full-feedforward method, the suppression of all harmonics and interharnonics are applied for all the frequencies. On the other hand, only a few numbers of harmonic orders (usually the third, fifth and seventh orders, i.e. H = {3, 5, 7}) are chosen to be suppressed in the selective Simplified control block diagram of the system with the proposed feedforward function method. Obviously, a full-feedforward method is more preferable rather than selective feedforward method for two main reasons. First, the full-feedforward leads to a lower THD since opposite to selective feedforward, all the harmonics are effectively attenuated simultaneously. Second, extension of the number of harmonics to be suppressed, especially in high orders, is so complex in selective feedforwrad method. In this paper, a novel full-feedforward approach is proposed which suppresses the harmonics resulted from the inverter output admittance using a time domain full-feedforward function into the inverter control loop.

Proposed feedforward transfer function
The aim of a feedforward strategy in a grid-tied inverter is to mitigate inverter output current harmonics produced by those of the grid. According to the fact that there are two paths for the grid voltage harmonics to affect the inverter output current, the proposed feedforward scheme should be devised in a way that the inverter output equivalent admittance is being equal to zero. Thus, a feedforwrad function named by F (s) is applied into the system as shown in Figure 6. By applying this feedforward function, the control loop gain changes and the inverter output equivalent admittance will be different. The output current of the grid-tied inverter in this condition will be as follows: In fact, the inverter output equivalent admittance has been changed from Y ot (s) into Y ot (s) + . To achieve a perfect full-feedforward strategy, I g (s) should be equal to zero for all of the harmonic frequencies. According to (19), such a condition happens when: By substituting of (15), (17) and (18) into (20) and using (1)-(10), the feedforward function is expressed into (21). This fullfeedforward function is comprised of two terms including the F PLL (s) (G c (s)T PLL (s)I in ) which is the PLL admittance compensator and FF (s) which is the inverter output admittance compensator. A main advantage of the proposed method is that the harmonic rejection strategy is independent from the grid admittance. In practical power systems, the grid admittance permanently changes due to various contingencies. By applying the proposed feedforward strategy, the admittance seen from PCC point in Figure 4 becomes zero and as a result the inverter side will act like a single current source without any parallel admittance. Hence, the grid admittance will have no impact on harmonic rejection of the system since it will be in series with the the mentioned current source. In short, applying the proposed feedforward function leads to an equivalent electrical model of the grid-tied inverter as shown in Figure 7. (21) denotes the transfer function which is needed to apply to the control loop of the inverter so as the inverter output equivalent admittance is cancelled. However, (21) is comprised of a transfer function (FF (s)) that the order of numerator is higher than the denominator and such a model is not possible to be implemented, in a practical case, in the control loop of the inverter. In other words, there is no physical component in practical systems which can build such a transfer function. As a result, the transfer function in (21)   words, the components with s 3 , s 2 , s 1 and constant in Laplace domain are modelled by d 3 ∕d (t 3 ), d 2 ∕d (t 2 ), d ∕d (t ) and constant in time domain, respectively. As a result, each component in Laplace domain is implemented in the time domain and they will be connected as described in (21). The resulted function is multiplied to the measured PCC voltage and the result is added to the output of the controller. Figure 8 shows the explained implementation procedure for FF (s). It should be noted that the same algorithm is used for the implementation of F PLL (s) as well.

SIMULATION AND EXPERIMENTAL RESULTS
To verify the effectiveness of the proposed full-feedforward method, a number of simulation and experimental results are presented in this section. In this regard, the feedforward strategy is examined on a typical 50 Hz single-phase grid-tied inverter with the characteristics as given in Table. 1. It should be noted that the inverter is connected to a stiff 220 V rms grid (L g = 0 mH).

Simulation results
To demonstrate the ability of the proposed method on mitigation of output current harmonics due to grid voltage distortion, In this regard, 1.5% of 3 rd , 2% of 5 th and 2.5% of 7 th order harmonics are simultaneously injected to the test case grid-tied inverter. Figure 9 shows the inverter output current and its FFT plot in the case that no feedforward is applied to the control loop system. As can be seen from Figure 9, only a few percent of an individual grid voltage harmonic for each harmonic order results in a huge inverter output current corresponding individual harmonics. The reason for this phenomenon is that the absolute value of grid voltage (220 V RMS ) is relatively high in comparison with the nominal output current (4 A). As a result, if the output equivalent admittance is not quite small, a few percentage of grid voltage individual harmonic has the potential to change into a high absolute current harmonic for the nominal current which is only 4 A. Hence, the necessity of applying a mitigation strategy is sensible. Hence, Figure 10 shows the inverter output current and its FFT plot while the proposed full-feedforward function has been applied to the control loop. Compared to that of no feedforward (Figure 9), there is a considerable reduction in all the individual harmonics as well as the THD value which As mentioned before, one of the advantages of the proposed method is its independence from the grid admittance variation. To prove this claim, the simulation has been repeated in the case that the grid inductance changes to 3 mH and Figure 11 shows the resulted inverter output current. As can be seen, grid admittance variation has no significant impact on the harmonic rejection ability of the proposed method.

Experimental results
To verify the proficiency of the proposed full-feedforward mitigation method in practical systems, an experiment has been performed. Figure 12 shows the setup of a grid-tied inverter system with the characteristics as tabulated in Table 1 and equipped with an SRF-PLL. It should be noted that the control loop of the grid-tied inverter has been implemented in a Dspace module. For the experiment, a similar test with that of simulation has performed. In fact, 1.5% of 3 rd , 2% of 5 th and 2.5% of 7 th order harmonics have simultaneously been injected into the system from the grid side. Figure 13 shows the inverter output current along with its FFT plot in the case that no feedforward function is applied into the control loop. Figure 13 shows that the inverter output current is highly sensitive to even a few percentages of grid voltage harmonics and needs to be improved to follow the standard power quality indices. Figure 14, shows the resulted inverter output current and its FFT plot while the proposed full-feedforward strategy is applied to the control loop of the system. As can be seen, the inverter output current distortion is effectively suppressed and the shape of the output current changed from a deformed waveform into a relatively pure sinusoidal one.

CONCLUSION
Grid-tied inverters are utilised in many applications, including renewable energy systems such as solar inverters. The inverter's parameters such as filters, control method and the PLL framework can affect its output equivalent admittance. In this paper, a new time-domain full-feedforward scheme has been proposed which can effectively suppress the inverter output current harmonics. It has been shown how to cancel the total output equivalent admittance of the inverter by introducing a polynominal expression in the Laplace domain. According to the limitation of the proposed transfer function in practical systems, a time-domain representation of the transfer function has been presented. Simulation and experimental results have been carried out to validate the proposed feedforward method and demonstrate how the inverter output current can be controlled in a distorted grid. The results prove that the proposed method successfully keeps individual harmonics as well as THD within the standard range.