Performance of a coupled inductor for interleaved buck converter with improved step-down conversion ratio

This paper proposes a dual-winding coupled inductor (DWCI) based interleaved buck converter (IBC) with improved step-down conversion ratio to improve the ripple in inductor currents and to achieve lower value of the output ﬁlter capacitor. The proposed IBC achieves a high step-down conversion ratio by using a switch-capacitor cell. In the continuous conduction mode (CCM), the systematic analysis of ripple current in the windings of DWCI shows the improvement of ripple in inductor current compared to the existing IBCs. Further, the coupling factor of the DWCI reduces the requirement of the minimum value of the output ﬁlter capacitor. The operation principle and boundary load condition of the proposed IBC with DWCI are analysed. Furthermore, the small-signal modelling of the proposed IBC with DWCI is investigated. In the voltage-mode control framework, a PI-controller is designed to investigate the sensitivity to the load parameter variation and the performance of the reference output voltage. The proposed converter with DWCI is implemented and experimental results are provided.


INTRODUCTION
In the recent years, interleaved power converter topologies have received increasing attention to improve the performances of the converter in terms of efficiency, size, and transient response. Due to simple structure and low control complexity, the interleaved buck converters (IBCs) are widely used for the requirements of high step-down ratio with high output current rating applications such as voltage regulator modules, battery chargers, super-capacitor energy storage systems, and distributed power systems [1][2][3]. Although the conventional IBC has benefits of high power capability, modularity, and improved reliability, it has few drawbacks. The interleaved converters achieve better performance by acquiring an extra inductor, a power switch and a diode. Since the inductor is the heaviest and largest component in a power converter, the overall converter size becomes bulkier. Instead of using a number of single inductors, the use of a coupled inductor is a preferable solution as it provides few assets such as less core loss, transient improvement, and reduction of ripple current [4][5][6][7][8]. The large inductance value can be used to minimise the ripple in the inductor current. However, it causes poor dynamic response and the converter becomes bulky and heavier [9].
This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited. © 2020 The Authors. To obtain a better transient response, a coupled inductor is used for a two-phase buck module in [10]. Moreover, it shows that strong coupling is more affective and achievable at reducing ripple if the proper magnetic topology is used. In [11], a multiphase buck converter with a coupled inductor is introduced. The coupled inductor improves the dynamic behavior and reduces steady-state power loss. A multiphase synchronous buck converter using a symmetrically coupled inductor is presented in [12]. The coupled inductor introduced in this paper improves efficiency and also reduces phase current ripple. In [13], to increase power density and efficiency of the interleaved buck converter an ultra-thin coupled inductors based on lowtemperature cofired ceramic (LTCC) is presented. To improve the resonant period of an interleaved critical current mode (CRM) bidirectional buck/boost converter, a coupled inductor is used in [14]. The coupled inductor also improves the softswitching range and energy circulation. Inductor coupling effect in Interleaved multiphase dc-dc converters is demonstrated to avoid early inductor saturation and interference between phases in [15]. In [16], a comprehensive analysis of two-phase interleaved buck and boost converters including an inter-phase transformer/coupled inductor is carried out in discontinuous conduction mode (DCM). To reduce the resistor and core loss, a compact lateral coupled inductor is designed and used for a two-phase interleaved buck module in [17]. To achieve high power density and high step-down conversion ratio an IBC is designed by a three winding coupled inductor in [18]. A fourphase inverse coupled-inductor is introduced for an interleaved bidirectional dc-dc buck-boost converter to reduce low current ripple and improve efficiency in [19]. A six-phase interleaved topology consisting of a coupled-inductor introduced in [20] utilises variable coupling coefficient to reduce the ripple. But it does not explain the effect of the variable coupling coefficient of the coupled inductor on the output filter capacitor. At CCM/DCM boundary mode, a zero voltage switching mode synchronous interleaved buck converter is presented in [21]. A coupled inductor is used to improve the conversion ratio. In [22], the turns ratio of a coupled inductor is used to achieve high voltage gain for a bidirectional converter. A bidirectional interleaved dc-dc converter is introduced to achieve high power density and to cancel the ripple by using a winding cross-coupled inductor (WCCI) in [23]. But the voltage conversion of this converter depends on the turns ratio of the WCCI. In [24], an interleaved bidirectional buck-boost converter is presented to achieve zero voltage switching (ZVS) by utilising a coupled inductor with a variable coupling factor. But the semiconductor devices of this converters suffer high voltage stress. This converter does not also explain the effect of the variable coupling factor on the output filter capacitor. Four switches and a pair of coupled inductors are used to achieve high step-up/down conversion ratio for an interleaved bidirectional converter in [25]. This topology does not provide the analysis of the effect of the coupled inductor in the improvement of ripple. Input and output inductors of an interleaved buck-boost converter are magnetically coupled to improve current ripple, low power density, efficiency and voltage oscillation in [26]. The concept of coupled inductor is implemented successfully for the aforementioned various interleaved buck topologies to improve transient response efficiency, voltage conversion ratio, the ripple in current and power density, etc. However, there is a lack of proper work for the systematic analysis of ripple in output-end inductors for an interleaved buck converter. These works do not provide also the impact of the coupling factor of a coupled inductor for reducing the minimum capacitance value of the output filter capacitor.
A two-phase high-efficiency IBC with an improved stepdown conversion ratio is presented in [27]. This IBC achieves improved conversion ratio by a switch-capacitor cell. Three inductors are required to design the converter. It uses two single inductors at the output end and one on the input side. These two single inductors at the output end can be replaced by a dual-winding coupled inductor (DWCI) to achieve less ripple in the inductor current. Further, It is also an important analysis to find out the effect of the coupling factor for reducing the minimum requirement of the capacitance value of the output filter capacitor. Therefore, in this paper the two output-end single inductors of the IBC presented in [27] are replaced by a DWCI. The proposed IBC with the DWCI achieves less ripple in the two branches of the DWCI operating in CCM without effecting the The proposed high step-down ratio DC-DC interleaved buck converter conversion ratio and it also reduces the minimum requirements of output capacitor value. A systematic step by step analysis is carried for the different case of operation to investigate the effect of the coupling factor of the DWCI in the reduction of ripple. This work presents a simple and straightforward analytical procedure to design the output filter capacitor. The operation principle of the proposed IBC with the DWCI is discussed in Section 2. In Section 3, a systematic analysis of the ripple current in DWCI for different cases are carried out. The effect of the coupling factor on the CCM/DCM boundary load is also developed. The minimum requirement of the crossly connected identical capacitors is carried out in Section 4. The equation for the minimum requirement of output filter capacitor value is derived in Section 5. Comparisons among the conventional and existing IBCs are also discussed and necessary mathematical expressions are provided. The stresses of the semiconductor devices are provided in Section 6. The average state-space matrices and small-signal modelling analysis of the proposed IBC with DWCI are carried out, respectively, in Sections 7 and 8. A voltage mode PI controller is designed for the proposed IBC with the DWCI in Section 9. To validate the claims, simulation and experimental results are provided in Sections 10 and 11, respectively. Finally, Section 12 concludes the paper.

PRINCIPLE OF OPERATION
An interleaved buck converter (IBC) is designed to improve the step-down conversion ratio operating in continuous conduction mode (CCM) [27]. This converter needs a total of three single inductors. Two single inductors are required at the output-end as shown in Figure 1(a). These two single inductors are replaced by a single dual-winding coupled inductor (DWCI) as shown in Figure 1(b). The input voltage V in is followed by an single inductor L i with parasitic r L i . Two identical capacitors C 1 and FIGURE 2 Schematic diagram of DWCI C 2 , respectively, with parasitics r C 1 and r C 2 are crossl-connected with the two switches S 1 and S 2 . The L i is placed at the front side to oppose the sudden change of input current due to the series-parallel transition of these two identical capacitors. The diode D 1 is followed by the L 1 -winding of the coupled inductor. The switch S 3 is followed by a diode D 2 and L 2 -winding of the coupled inductor. r L is the parasitic of the L 1 and L 2 windings. The two windings L 1 and L 2 are operating with 180 deg phase shift in CCM.C f with parasitic r C f is the output capacitor to the output V O where R defines the output load resistance.

Dual-winding coupled inductor (DWCI)
The schematic diagram of the DWCI is shown in Figure 2. The generalised equation of the coupled inductor is where i L 1 and i L 2 are inductor currents. The mutual inductance M is defined as M = k √ L 1 L 2 . For inductor to be direct coupled, coupling coefficient k ∈ (0, 1) and to be inverse coupled k ∈ (0, −1). The 180 • phase shifting of inductor currents causes i L 1 = −i L 2 . Therefore, when the inductors are directly . The (L 1 − M ) shows small inductance value with a bulky or larger size of the coupled inductor. Whereas, the (L 1 + M ) gives larger inductance value with the smaller size of the coupled inductor. Therefore, to reduce the bulkiness of the converter and to reduce the ripple in inductor current, the inductors are coupled inversely in a 180 • phase-shifting condition. The two windings of the coupled inductor are considered to be equal (L = L 1 = L 2 ). The i L 1 and i L 2 represents the current flowing through L 1 and L 2 windings, respectively. By using (1) and (2), the i L 1 and i L 2 can be written over a time period T s as follows. The idealised waveform is shown in Figure 3 when the duty ratio belongs to (0,0.5]). At this case of operation, there are four switching intervals over the time period T s . The switching operations are described below. During the interval (0 < t ≤ 1 T s ), inductor current i L 1 through the L 1 increases and inductor current i L 2 through the inductor L 2 decreases. The currents i L 1 and i L 2 are out of phase. In the next interval ( 1 T s < t ≤ 2 T s ), all the three switches are OFF and both inductor currents decrease. The currents i L 1 and i L 2 are in the same phase. In the subsequent interval ( 2 T s < t ≤ 3 T s ), S 1 and S 2 are still OFF but the S 3 is ON. Therefore, the i L 2 increases and i L 1 decreases. The i L 1 and i L 2 are out of phase. In the next interval ( 3 T s < t ≤ 4 T s ), the nature of i L 1 and i L 2 are the same as the interval ( 1 T s < t ≤ 2 T s ).

2.2.1
Interval (0 < t ≤ 1 T s ) In this duration, S 1 and S 2 are simultaneously ON and S 3 is OFF as shown in Figure 4. The diodes D 1 and D 2 become reverse and forward bias, respectively. Therefore, the two identical capacitors become parallel and the voltage across these capacitor becomes V C . The inductive voltages V L i , V L 1 and V L 2 across the L i , L 1 and L 2 are expressed as follows.
Let us define the state vector where

Interval ( 1 T s < t ≤ 2 T s )
During this switching interval, S 1 , S 2 and S 3 are OFF. Both the diodes are in forward bias as shown in Figure 5. The two identical capacitors are in series through the diode D 1 and resul-tant voltage becomes 2V C . The voltages across the inductors are provided below.
During this mode, the state-space equation is expressed bẏ where

Interval ( 2 T s < t ≤ 3 T s )
In this duration, S 1 and S 2 are OFF and S 3 is ON as shown in Figure 6. The diode D 1 is in the reversed bias and D 2 is in the forward bias. The inductive voltage equations are provided as follows.
In this duration, the state-space equation is expressed bẏ where Idealised waveform of the proposed IBC when ∈ (0.5, 1)

Interval ( 3 T s < t ≤ 4 T s )
In this duration, the circuit configuration is the same as Figure 5 and the operation is the same as provided in the interval ( 1 T s < t ≤ 2 T s ).

Switching modes when ∈ (0.5, 1)
The idealised waveform is shown in Figure 7 when ∈ (0.5, 1). In the intervals (0 < t ≤ 1 T s ) and ( 2 T s < t ≤ 3 T s ), all the switches are ON and the inductor currents i L 1 and i L 2 increase. The i L 1 and i L 2 are in the same phase during these two intervals.
In the intervals ( 1 T s < t ≤ 2 T s ) and ( 3 T s < t ≤ 4 T s ), i L 1 and i L 2 are out of phase.

Interval (0 < t ≤ 1 T s )
In this interval, all the three switches conduct and both the diodes are in reverse biased as shown in Figure 8. The voltages across the inductors are provided as follows.
The state-space equation is provided as follows.

Interval ( 1 T s < t ≤ 2 T s )
During this interval, S 1 and S 2 are ON simultaneously, and S 3 is OFF. The operation principle is the same as the interval (0 < t ≤ 1 T s ) operation while ∈ (0, 0.5]. The state-space equations are the same as provided in (8) and (9).

Interval ( 2 T s < t ≤ 3 T s )
In this switching interval, all the three switches are ON and the operation principle is the same as in the interval (0 < t ≤ 1 T s ) while ∈ (0.5, 1). The state-space equations are the same as provided in (23) and (24).

Interval ( 3 T s < t ≤ 4 T s )
During this interval S 1 and S 2 are OFF, and S 3 is ON. The switching operation is the same as in the interval ( 2 T s < t ≤ 3 T s ) while ∈ (0, 0.5]. The state-space equation is the same as provided in (18) and (19).

Voltage gain
The voltage second balance (VSB) equation of the input end inductor L i is determined by using (5), (10) and (15) as follows.
By using the (25) and (26), the voltage conversion ratio is determined as follows.
Therefore, from (27) it can be said that the mutual inductance does not affect the conversion ratio [27].
To determine the instantaneous current i L 2 ( 1 T s ) at this duration, (6) and (7) are substituted into (4) and it is as follows.
In the subsequent interval ( 1 T s < t ≤ 2 T s ), the instantaneous current i L 1 ( 2 T s ) is determined by substituting (11) and (12) into (3) as follows.
In this interval, by substituting (11) and (12) into (4) the instantaneous current i L 2 ( 2 T s ) is calculated as follows.
In the next interval ( 2 T s < t ≤ 3 T s ), the instantaneous current i L 1 ( 3 T s ) is determined by substituting (16) and (17) into (3) as follows.
In the subsequent interval ( 3 T s < t ≤ 4 T s ), the instantaneous current i L 1 ( 4 T s ) is derived as follows.
In this interval, the instantaneous current i L 2 ( 4 T s ) is determined as follows.
The average inductor current, I L , flowing through the L 1 and L 2 windings of the coupled inductor is equal. Therefore, I L is determined as follows.
The ripple in inductor windings L 1 and L 2 is as follows when ∈ (0, 0.5]. 3.2 Case II, ∈ (0.5, 1) In this case of operation, the expressions of the instantaneous inductor currents as shown in Figure 7, are provided in Table 1.By the instantaneous value provided in Table 1, the the average inductor current in this case is derived as follows.
The current ripple in the L 1 and L 2 windings are as follows.

Ripple current in inductor L i
The average current I L i through the inductor L i is as follows [27].
The ripple in inductor L i is determined as follows by using (5).
The ripple in input current is equal to the ripple in L i inductor.

3.4.1
Case I, ∈ (0, 0.5] At the boundary condition, the input current can be written as follows by using (40).
At ideal loss less condition the relation between the I in and output current I O is expressed as follows by using (27). Therefore, by using (42) and (43), the boundary load R B i is derived as follows.
where I OB is the boundary load current. At the boundary condition derived in (44), output boundary load current I OB is derived as follows.
Therefore, at this I OB , the boundary load becomes as follows.
Therefore, minimum inductance value is derived as follows from (46).

Case II, ∈ (0.5, 1)
Similar way the analysis is carried out and at this case the minimum requirement of inductance value is determined as

MINIMUM CAPACITANCE VALUE OF (C 1 = C 2 = C)
The idealised waveforms of current through the identical capacitor i C and the voltage across the identical capacitor V C are shown in Figure 9. In the duration (0 < t ≤ 1 T s ), the identical capacitors become parallel to each other and the voltage across the capacitor becomes V C as shown in Figure 4. During this switching mode, the identical capacitors discharge energy to the load. In the remaining entire duration ( 1 T s < t ≤ T s ), the identical capacitors are charged in series by the V in and the resultant voltage across the two identical capacitors become The ripple voltage can be expressed by ΔV C and it is defined by ΔV C = V C max − V C min . The average capacitive voltage is approximated by using (26) as follows.
Now, in the duration (0 < t ≤ 1 T s ), the power released by these two identical capacitors is equal to the power stored by the load. Therefore, the energy equation is written as follows [27].
Substituting, ΔV C = V C max − V C min and (49) into (50), the minimum capacitance value for identical capacitors is determined as follows.

5.1
Case I, ∈ (0, 0.5] The output filter capacitor is required to be designed so that the impedance of the capacitive branch is less than the load resistance R. The DC components of the two inductor currents (i L 1 and i L 2 ) pass through the load (R) and the AC component passes through the capacitor (C f ). As the ripple in load current (I R = I O ) is less, it is negligible. Therefore, the current passes through the output filter capacitor (C f ) is approximately equal to the resultant AC component of the two inductor currents. The idealised waveforms of the capacitive current i C f , AC component of the voltage across the r C f , (v r C f ),and AC component of output voltage, (v O ), are depicted as shown in Figure 3 when ∈ (0, 0.5]. Therefore, the i C f is determined by the following equation. From (36), the average ripple current (ΔI L = ΔI L 1 = ΔI L 2 ) is In the interval (0 < t ≤ 1 T s ) as shown in Figure 3, the i C f is determined by using (52), (28) and (29) as follows.
The v r C f is determined by using (53) as follows. v The capacitive voltage v C f consists of DC component In the output voltage, v c f contributes the ripple. Therefore, the v c f is derived as follows by using (53).
The v r C f and v c f provides the AC component to the out-  (54) and (55).
To calculate the minimum capacitance value, the derivative of the v O as derived in (56) with respect to the time (dv O ∕dt ) is set to zero and the minimum capacitance value (C f min(on−o f f ) ) occurs at t min = 0 as follows.
In the subsequent interval ( 1 T s < t ≤ 2 T s ) as shown in Figure 3, by using (30), (31) and (52) the i C f is derived as follows.
By using (58), the v r C f is derived as follows. v In this duration, the v c f is determined as follows. The In the next duration ( 2 T s < t ≤ 3 T s ), the minimum capacitance value (C f min ) is the same as (57). The minimum capacitance value (C f min ) is the same as (61) in the interval ( 3 T s < t ≤ 4 T s ). The peak-to-peak ripple voltage (V r ) does not depend upon the V C f . The V r is determined only by the ripple voltage across the ESR (equivalent series resistance) r C f if In the extreme, the values of min and max are given as min = 0 and max < 0.5, respectively. Thus, the condition provided in (62) is satisfied at the value of if

Case II, ∈ (0.5, 1)
The analysis to determine the capacitance value is carried out in the similar manner as provided in the Case I. The minimum capacitance values C f min(on−on) and C f min(on−o f f ) , respectively, in the intervals (0 < t ≤ 1 T s ) and ( 1 T s < t ≤ 2 T s ) are provided as follows.
Coupling factor (k) 0 . 5 Inductive resistance (r L ) 0 . 0 7 Ω Identical capacitance (C = C 1 = C 2 ) 220 μF Resistances of C 1 and C 2 ( Output capacitance (C f ) 330 μF The output voltage ripple V r can be calculated only by the r C f if (66) In the worst situation, the values of min and max are provided as min > 0.5 and max = 1, respectively. Thus, the condition provided in (66) is satisfied at the value of if Remarks: When the = 0.5, the peak to peak ripple output voltage (V r ) can be calculated by the ripple voltage across the

Selection of parameters
The load resistance is considered as R = 5 Ω. The value of the coupling factor is k = 0.5. At R B i = R = 5 Ω and = 0.4, the minimum inductance value is calculated as L = L 1 = L 2 = 53.33 μH by using (47). When two single inductors are used instead of the dual winding coupled inductor, i.e. k = 0, the minimum inductance value is 60 μH. At the values of r C f = 0.22 Ω, f s = 50 kHz, = 0.4 and k = 0.5, the C f is calculated as C f ≥ max{24.24, 6.06} μF = 24.24 μF by the condition provided in (62). At the same condition when the k becomes zero (k = 0), the value of the C f is calculated as C f ≥ max{54.54, 13.6}μF = 54.54 μF. Therefore, it can be said that the values of the L 1 , L 2 and C f can be reduced by the coupling factor k. The considered parameter values are the same as in [27] and provided in Table 2. The two output-end single inductors are replaced by a dual winding coupled inductor.
Ripple current Δi L due to change of

Comparisons among the existing and the proposed IBC
The comparison among the existing and the proposed IBC is shown in Table 3. In Figure 10, the change of ripple in inductor current (Δi L = Δi L 1 = Δi L 2 ) is shown with respect to the and it is seen that the IBC introduced in [27] has less ripple than the conventional IBC in the entire range of ∈ (0, 1). But, for the certain range of , the proposed IBC has less ripple (Δi L ) compared to the IBC introduced in [27]. The curve of ripple Δi L with k = 0 and Δi L with k = 0.5 intersect at two points. In this region, the Δi L of the proposed IBC with dual winding coupled inductor is less than the conventional IBC and IBC introduced in [27].
Therefore, it is necessary to find out the best operating range of . In (37), the V in , L and f s are the positive constants. Therefore, to get the lower intersection point when ∈ (0, 0.5], the Δi L provided in [27] and Equation (37) become equal to each other and, written as Since, > 0 and can never be equal to 2, therefore, solving the (68), the following intersection point is obtained.
Now, it is required to find out the higher value of intersection point when ∈ (0.5, 1). Therefore, by equating the Δi L provided in [27] and Equation (39), the upper limit of is derived as Therefore, the ripple of the proposed converter is less than the conventional IBC and IBC introduced in ). The change in ripple in inductor currents due to change coupling factor is shown in Figure 11. When ∈ (0, 0.5], from Equation (68), the operating range of coupling factor is derived as k ∈ (0, 1− ]. To get the minimum ripple for any provided , the maximum coupling factor k is determined by equating the derivative of the Δi L with respect to k (d Δi L ∕dk) to zero. Therefore, when the ∈ (0, 0.5], by doing the derivative of Equation (37), the k is derived as

FIGURE 11
Ripple in inductor currents Δi L due to change of k when the ∈ (0.5, 1), the maximum k value to get the minimum ripple for any provided is derived from the (39) as follows.
As the k ≯ 1, the k becomes k = After developing the converter design procedure, small signal modelling of the proposed converter with a dual winding coupled inductor is developed in the subsequent section.

Maximum voltage stress
The voltage stresses of the switches S 1 , S 2 and S 3 are denoted by V S 1 , V S 2 and V S 3 , respectively. The maximum voltage stresses are approximated by neglecting the capacitive ripple voltages as follows.
The maximum diode voltage stresses V D 1 and V D 2 of the diodes D 1 and D 2 , respectively, are as follows.
Therefore, below the high input voltage rated semiconductor devices can be used to design the converter.

Maximum current stress
The maximum current stress of the switches S 1 , S 2 and S 3 are defined by I S 1max , I S 2max and I S 3max , respectively. I D max represents the maximum current flowing through the diodes D 1 and D 2 . The currents flowing through the windings of the DWCI are half of the output current. Therefore, the switch current stresses are approximated as follows.

AVERAGE STATE SPACE MATRICES
The general average state space equation is as follows.

SMALL SIGNAL MODELLING
Consider that the feedback control circuit is disabled and a perturbationv in (t ) appears in the steady state input voltage V in . So the input voltage can be expressed as v in (t ) = V in +v in (t ). It will cause a change (perturbation) in the steady state values of the inductor currents and capacitor voltages. Thus the instantaneous state-space variable vector x(t ) and output v O (t ) become After addition of perturbation, the state space equation becomes as follows.

Steady-state analysis
The steady-state equation is provided by At ideal case the parasitics r L and r L i are neglected as r L , r L i << R. Therefore, the steady-state values of the state variables are X = [

Open loop transfer function
By substituting (79), (80) and (81) into (82) and (83) and doing the Laplace transformation of the (82) and (83), the voltage to duty ratio transfer function, G v (s), is derived by neglecting the steady-state and nonlinear parts, and considering thev in = 0.
The required parameter values to design the proposed converter are provided in Table 2. By using the value of these parameters and the (85), the following control power stage transfer function G v (s) is developed.
The co-efficients of the (86) Figure 13. A pair of complex zero lies right-half of the s-plane. Thus, the open loop system is a non-minimum phase system and the phase margin is 3.85 • .

CONTROL SCHEME
In voltage mode control (VMC) framework, to improve the transient behaviour and to enable the feedback control circuit,

FIGURE 12
Step response of G v (s)

FIGURE 13
Bode diagram of G v (s) a proportional integral (PI) controller is designed using frequency domain method. The block diagram representation of the closed loop system is shown in Figure 14. The controller is where K p and K i are proportional and integral constants, respectively, and the values are K p = 0.001205 and K i = 40, respectively.

SIMULATION RESULT
By using MATLAB-Simscape tools, the simulation is carried out. The simulation results of the ripple, Δi L , in inductor current i L 1 and i L 2 are shown in Figure 15. At = 0.4 and k = 0.5, the ripple is calculated as Δi L = 296.29 mA by using (37). At this and k value, the simulation provides Δi L = 295.9 mA≈296.29 mA. When k = 0, that is, two single inductors are used, the ripple Δi L is 333.33 mA at = 0.40. Thus, the coupled inductor improves the ripple in inductor current. At = 0.55, the simulation provides the ripple Δi L = 297.7 mA and Δi L = 380.3 mA at k = 0.5 and k = 0, respectively. In Figure 16, the open loop transient response of the output voltage V O is shown. The maximum peak overshoot (M p ) and settling time (t s ) of the proposed IBC with DWCI are M p = 15.87% and t s = 0.00195 s, respectively. When the coupling factor k = 0, the M p and t s are 30.82% and 0.00345 s, respectively. It clearly shows that the DWCI improves the transient behaviour of the proposed converter. The ripple in voltage across the output filter capacitor is shown in Figure 17. It shows that the coupling factor of DWCI helps to reduce the ripple in voltage across the C f . Therefore, comparatively less value of output filter capacitor can be used.

EXPERIMENTAL SETUP AND RESULT
The schematic diagram of the closed-loop control system is shown in Figure 18. The switches S 1 and S 2 are turned ON and OFF simultaneously as described in Section 2. Two 180 • phase-shifted pulse is generated. One of the pulses is given as an input pulse to the optocoupler type driver ICs (integrated circuit) FOD3180 of both the S 1 and S 2 together. The other pulse is given to the driver ic FOD3180 of the S 3 .
The experimental set-up is shown in Figure 19. In Figure 2, the dual-winding coupled inductor is shown. The parameter values used to design the proposed converter are provided in Table 2. The switches S 1 , S 2 and S 3 are implemented by MOS-FET IRF250NPBF. The diodes D 1 and D 2 are implemented by NTST30100SG/ NFK03TS30100SG. The experiment is carried out in two stages. In the first stage, the ripple Δi L in i L 1 and i L 2 is checked. In the second stage, the closed-loop part is enabled and the closed-loop performance is tested with the PI controller. The PI controller is implemented by Arduino Uno. HAMEG HZO50 AC/DC current probe is used to capture the current waveforms.
As shown in Figure 20, the coupled inductor is designed by using U/C-type ferrite core. The gap between the two cores is 0.1 mm. The maximum current rating of the coupled inductor is 8 A. The magnetic cross-section area of the core is 2.4 cm 2 . There are 20 number of equal turns in primary (N p ) and secondary (N s ) winding. The turns ratio is defined by (N p )∕(N s ) = 1.

Ripple improvement
In this stage of experiment, closed loop part is disabled and the proposed converter is tested with the dual-winding coupled inductor. The input side inductor L i has no affect of coupling factor and is shown in Figure 21. The currents through the L 1 and L 2 windings are shown in Figures 22 and 23, respectively. When the duty ratio is 0.40, the ripple in i L 1 and i L 2 is Δi L = 350 mA at k = 0.5. The experimental ripple is nearly equal to the theoretical and simulated value. The phase shifting nature is shown concerning the switching pulse for the switch S 2 . When the is 0.55, the ripple in L 2 winding is 350 mA as shown in Figure 24. The percentage of errors of Δi L between simulation and experimental results are 18.28% and 17.5%, respectively, for = 0.40 and = 0.55. The output voltage V O and ripple in output voltage are 7.58 V and 0.32 V for = 0.55 and k = 0.5 as shown Figure 25. When the DWCI is replaced by two single inductors, that is, k = 0, the ripple in output voltage is 0.4 V as shown in Figure 26. Thus, the coupled inductor reduces the ripple in V O deducing that the value of output filter capacitor can be lower.  The current flowing through the identical capacitors are shown in Figure 27 for = 0.40. The voltage across the identical capacitors V C is shown in Figure 28. It shows that V C = 12.5 V satisfies (25) for = 0.40.

Stresses of switches and diodes
The = 40% is shown in Figure 31. Therefore, the semiconductor devices suffer the voltage stress less than the input voltage V in = 20 V.
The experimental results of efficiency due to change of duty ratio and load are shown in Figures 32 and 33, respectively. The comparisons of experimental results are shown in Table 4.

Closed loop performance
In this stage, feedback part is enabled and closed loop performance is investigated. The designed PI controller make the closed loop system stable. The change of input current i L i inductance due to change in output voltage reference (V re f ) viz. 5 , 7 and 9 V is shown in Figure 34. 5 , 7 and 9 V are considered as output reference voltages. It is seen that the there is no maximum overshoot in the output voltage and the rise time t r is 0.05 s. The output voltage follows the V re f change. Now to

FIGURE 34
Change of i L i due to change in output voltage reference

FIGURE 35
Output voltage and current waveforms for 50% load change check the sensitivity to the load parameter variation, 50% output load (R) change is carried out as shown in Figure 35. During the load resistance change from 5 Ω to 2.5 Ω and 2.5 Ω to 5 Ω, the output voltage V O follows V re f = 5 V.

CONCLUSION
A two-phase dc-dc IBC with a dual-winding coupled inductor (DWCI) has been proposed to improve the ripple in current through the branches of DWCI. Two C/U cores are used to design the DWCI and it has been coupled inversely to improve the ripple. The coupling effect on the reduction of the minimum value of the output filter capacitor has been derived and it shows that the coupling factor also reduces the capacitance value. The range of coupling factor for different conditions has been developed. Simulations results have been provided to validate the claims. Further, the effect of DWCI has been shown to improve the transient behaviour of the proposed converter. At = 0.40 and = 0.55%, experimental results have been provided in an open-loop to observe the performance of the DWCI. The DWCI improves ripple and does not affect the steady-state output voltage. A voltage mode PI controller has been designed to enable the closed-loop system. The future scope of this work can be a design of DWCI for high frequency to investigate effects of parasitics.