A non-isolated single-input dual-output boost DC–DC converter

A new non-isolated single-input dual-output boost DC–DC converter is introduced in this paper. The motivation of the work is that in various applications such as some multilevel converters, it is required to provide multiple dc sources that are not required to be isolated. In the proposed structure, the output ports of the converter can provide different values of power and still balance the output voltage. Even, if required, the output voltages can be set to different values. From practical point of view, the proposed topology uses minimum number of power-electronic switches (two switches for two outputs) which have common ground making their drive circuit simple and easy to implement. The state-space modelling of the proposed converter is presented, then, the model is used to design the passive elements. Moreover, the proposed converter is compared with the relevant converters. In order to verify the performance of the proposed DC–DC converter, a prototype of the converter has been implemented and the results are presented.


INTRODUCTION
Generally speaking, the DC-DC converters have many applications in industry and renewable power generation systems such as photovoltaics. A wide variety of topologies exists for DC-DC converters in both isolated and non-isolated types with different functionalities. From the viewpoint of outputto-input voltage ratio, they can be classified as buck (stepdown), boost (step-up), or buck-boost structures. Also, from the viewpoint of the number of input and output ports, they are categorized as single-input single-output, single-input multioutput, multi-input single-output, or multi-input multi-output. Each of these categories have their own applications and specifications.
The proposed converter in this paper, is a non-isolated single-input multi-output boost DC-DC converter. One possible application of such a converter is to provide multiple DC voltage sources needed in e.g. multilevel converters. Some of the relevant topologies are reviewed as follows.
A multi-output DC-DC converter for multilevel converter application has been presented in [1][2][3]. The converter provides multiple non-isolated dc outputs for multilevel converters such as neutral-point-clamped converter which needs multiple nonisolated DC sources in its dc side.
A single-input dual-output (SIDO) DC-DC converter has been presented in [4]. The structure uses only one power elec-This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited. © 2021 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology tronic switch and therefore the output voltages cannot be controlled independently. The studied SIDO converter in [5] operates in buck mode and the outputs have common ground. In [6] another SIDO converter is introduced. One output is controlled by the first stage which is a buck converter and the other output is controlled by the second stage which is a boost converter. In [7], a multi-input multi-output (MIMO) DC-DC converter is suggested which can also operate as a single-input multi-output (SIMO) DC-DC converter. In fact, it contains a buck converter in the input stage, a boost converter in the middle, and again a buck converter in the output stage which all share a single inductor. The structure will therefore use three power electronic switches for a SIDO converter.
Also, a SIDO converter is suggested in [8][9][10] in which the outputs have common ground. For applications where the series connection of the outputs is required, this converter cannot be used. The SIMO converter presented in [11] has buck operation. In this converter, the outputs have common ground. The work has been extended for MIMO case in [12]. In [13] a SIMO buck converter has been presented. The converter provides float outputs which cannot be connected to each other. The transformer-isolated version of the previous structure has been presented in [14]. A step-down SIDO converter has been introduced in [15]. This topology employs three switches and its input current is discontinuous. Derivation of different SIDO topologies has been discussed in [16].
The proposed SIDO converter in [17] employs four switches and its outputs cannot be connected together. A SIMO DC-DC converter has been presented in [18]. For a SIDO case, five power electronic switches are utilized making the circuit configuration and control of the converter complicated. A MIMO DC-DC converter based on the switched-capacitor multilevel topology has been proposed in [19]. Although the topology provides multiple output ports, the independent voltage control of the output ports is not possible. Another MIMO DC-DC converter has been studied in [20]. The structure is based on diode-switched-capacitors and is suitable for multi-input operation rather than single-input operation. A single-input dual-output converter is investigated in [21]. The mathematical modelling and control of the converter has been elaborated. However, the structure of the converter imposes limitations on its operation. The converter uses only one power electronic switch for two outputs; therefore, the outputs cannot be controlled independently.
In [22] a MIMO converter has been presented. The converter uses buck converters at input stage and current-source mode buck cells at the output stage. For a SIDO case, the converter uses three power electronic switches. In this structure, the outputs cannot be connected to each other if necessary. A MIMO DC-DC converter has been analysed in [23]. The converter has been designed for two input and two output ports which uses five power electronic switches and high number of passive elements. Also, the output ports cannot be connected together. A coupled-inductor based SIDO converter is investigated in [24]. The converter is composed of two boost converters feeding two outputs with a common ground. Another SIDO converter topology has been presented in [25]. The topology uses three switches to control two output voltages with a common ground.
In this paper, a new circuit topology is presented for a SIMO boost DC-DC converter. This topology is derived from the conventional boost converter. The detailed derivation and also mathematical modelling of the converter is presented throughout the paper. Derivation of the proposed topology is explained in Section 2. The state-space modelling of the proposed converter is presented in Section 3. The design considerations are given in Section 4 and the comparison of the proposed converter with other relevant converters is presented in Section 5. The experimental verification of the proposed topology is presented in Section 6.

THE PROPOSED SIDO BOOST DC-DC CONVERTER
In order to deduce the proposed DC-DC converter, let us consider that there is need for two boosted dc voltages where one dc voltage source is available and there is no need for isolation of the two output voltages. The simplest approach may be as one shown in Figure 1(a). In the figure, two boost DC-DC converter are employed to provide two output dc voltages using a single input dc voltage source. However, if one point of the outputs is in-common (Figure 1(b)), the input dc voltage source will be short-circuited through the inductor L 2 and the diode  2 . Therefore, the two independent boost converters (supplied from a single dc source) cannot be used if there is an electric connection between the outputs. In order to solve this problem, a modification is done and the obtained converter is shown in Figure 1(c). As shown in the figure, the proposed SIDO boost DC-DC converter generates two output dc voltages using a single input dc voltage source. This can be used wherever multiple non-isolated dc voltages are required (such as some multilevel converters).
It is important to note that the topology could be extended to higher number of output ports, however, the double output case will be studied hereinafter. One clear advantage of the proposed SIDO converter is that it does not need for coupled inductors or transformers. The coupled inductors and transformers need demanding design since they are prone to saturation and extra power losses.
There are two switches in the proposed converter as a result of which there will be four operation modes. It should be noted that the inductors currents are assumed to be continuous. In other words, the converter is supposed to operate in continuous conduction mode (CCM). The possible operation modes of the proposed converter are shown in Figure 2. Although there are four possible modes of operation, in order to operate in CCM, the duty cycle of the switch S 1 (d 1 ) must be higher than that of the switch S 2 (d 2 ). This will be elaborated in the next section. Different switching sequences can be adopted in the proposed converter. One of them is turning the switches ON simultaneously. This switching method is practically simple and easy to implement. The other possibility is the interleaved switching in which the switches are switched in a semi-complimentary manner. However, their conduction period may have some overlap. Although the latter switching method will result in lower input current ripple, the rest of the paper is based on turning the switches ON simultaneously. Generating the switching signals and also the key waveforms of operation of the proposed converter are shown in Figure 3. In order to draw the waveforms, the assumption d 1 > d 2 is made.

STATE SPACE MODELLING OF THE PROPOSED CONVERTER
In this section, the state space modelling of the proposed SIDO boost DC-DC converter is presented. The inductors currents and the capacitors voltages are considered as the state variables, In general, the state-space equations can be written asẊ = AX + BU where A is the state matrix, B is the input matrix, and U is the input vector. As there are different modes of operation, the average state-space model can be written as follows:Ẋ =ĀX +BV in (1) Where,Ā is the average state matrix andB is the average input matrix.
Considering that the switches are turned ON simultaneously, two different combinations of operation modes are possible. In the first combination, it is supposed that the duty cycle of the switch S 1 is higher than that of the switch S 2 . In this case, the three possible operation modes will be those shown in Figure 2(a,b,d). Considering that the duty cycle of the switch S 1 and S 2 is defined as d 1 and d 2 , respectively, the average state matrix can be achieved as follows: where, A 1 , A 2 , A 4 are the state matrix of mode 1, 2, and 4, respectively, which are not mentioned to keep conciseness.
Given the analysis above, the detailed average state-space model is obtained as follows: The average value of the state variables in steady-state can be obtained by settingẊ = 0 in Equation (3). Therefore, the following equation is achieved: (4) Solving Equation (4), the steady-state average values of the state variables are obtained as follows: Based on Equation (5), the gains of V 1 and V 2 can be written as follows.
The voltage gains M V 1 and M V 2 are illustrated in Figures 4 and 5, respectively. As Figure 4 indicates, the voltage gain M V 1 has a direct relation with d 1 but inverse relation with d 2 . In other words, M V 1 increases as d 1 increases and d 2 decreases. Moreover, M V 1 can take values less than 1 implying that this port of the converter is both buck and boost.
Although the above-mentioned results are based on the assumption that the duty cycle of the switch S 1 (d 1 ) is higher than that of the switch S 2 (d 2 ), interestingly the same results are also obtained for the case that d 2 is assumed to be higher than d 1 . However, according to Equation (5), in order to keep the average currents of inductors positive, d 1 must be higher than d 2 .
Generally, the value of the output voltages could be different. Assuming V 2 = V 1 , the following equation can be achieved from Equation (5).
Considering the fact that d 2 ≥ 0 and using Equation (7), the following inequality is achieved: If the aim is to provide the equal output voltages (V 1 = V 2 ), the following relations are obtained considering Equations (7) and (8).
Moreover, the inductors currents have a positive average value, I 1 > 0, I 2 > 0. Therefore, using Equation (5), the following relations can be obtained: If the condition V 2 = V 1 is considered, then using Equations (7) and (13), the following relation is derived: If the power consumed by R 1 and R 2 is considered to be P 1 and P 2 , respectively, the following relation among the power of the output ports can be written: For the specific condition where V 1 = V 2 , the relation R 1 > R 2 can be achieved using Equation (12). It could be concluded that for V 1 = V 2 , R 1 should be greater than R 2 , otherwise, the assumption made for obtaining the above equations (i.e. CCM of both inductors) is not satisfied.

DESIGN CONSIDERATIONS
The design considerations include the sizing of the inductors and capacitors used in the proposed DC-DC converter. For the sizing of the inductors, it is assumed that the capacitors are large enough so that the output voltages (V 1 , V 2 ) could be considered constant. Considering the operation modes and extracting and manipulating the inductors current equations, the ripples on the inductor currents (Δi 1 , Δi 2 ) can be achieved as follows: In Equations (14) and (15), T is the switching period which corresponds to the switching frequency, f s (f s = 1/T).
On the other hand, the average value of the inductor currents, i 1,avg and i 2,avg , can be written as follows using Equation (5): Based on Equations (14)- (17), the following equations can be obtained: In order to operate in continuous conduction mode (CCM), the following relations must be satisfied: Using Equations (22) and (23), the following relations are obtained for the inductances.
Equations (24) and (25) ensure only the CCM operation and do not apply any constraint on the current ripple. If the aim is to limit the current ripples on the inductors' currents, the relative current ripples can be obtained as follows using Equations (14)- (17): If the output voltages are equal, the following relations can be obtained using Equations (9), (26), and (27): The variation of L 1 versus R 1 and d 1 for four different values of the inductor relative current ripple, Δi 1 ∕i 1,avg (0.1, 0.2, 0.3, 0.4), is plotted in Figure 6. It is important to notice that the figure is plotted for the specific condition of V 1 = V 2 . Also, it should be noted that d 2 is dependent on d 1 according to Equation (9). As the figure indicates, the largest value of L 1 (worst case from design point of view) is obtained for the highest R 1 , the lowest d 1 and the lowest relative current ripple. Its value is independent of R 2 . Figure 7 shows the variation of L 2 versus R 2 and d 2 for different values of R 1 and relative current ripple of 0.4. As the figure suggests, the maximum value of L 2 is obtained for d 2 = 1/3 and maximum R 1 and R 2 . It should be noted that according to Equation (29), the value of L 2 is inversely proportional to (R 1 − R 2 ). If the value (R 1 − R 2 ) of decreases, the value of L 2 increases dramatically. This suggests that in order to keep CCM there should be a difference between R 1 and R 2 in the equal  During ON period of the switch, the capacitors are discharged and during the rest of the switching period, the capacitors are charged. Therefore, using basic circuit concepts and calculations, the capacitance of C 1 and C 2 could be achieved as follows: From design point of view, the maximum capacitor value can be achieved as follows using Equation (30): In practice, to select the switches and diodes, their maximum off-state voltage and on-state current should be calculated. Taking Figure 1(c) into account, the off-state voltage of the switches S 1 and S 2 (V S1 and V S2 ) and those of the diodes D 1 and D 2 (V D1 and V D2 ) can be written as follows: Also, the maximum current of the switches and diodes is equal to maximum current of the corresponding inductor: In order to better understand the maximum current of the semiconductor devices, they are obtained as a function of input and output parameters. Using Equations (14)- (17) and (33), the following equations are derived: Using Equation (6), the duty cycles of the switches can be calculated as follows: Based on Equations (19), (21), (28), (29), and (35), the following equation can be obtained:

COMPARISON OF THE PROPOSED CONVERTER WITH THE RELEVANT STRUCTURES
The comparison of the proposed converter with the existing SIDO converters in the literature is presented in Table 1. It should be noted that most of the SIDO converters does not provide the series connection possibility as in the proposed converter. Also, in some of the topologies one port operates in buck mode and the other operates in boost mode [16]. In some others, output voltage of one port is a portion of the other Common-emitter switches  port [8]. Therefore, the comparison only considers the topologies that provide two independent boost outputs. In order to make the comparison results more sensible, a numerical example is considered for comparison. The input voltage of the sample case is considered to be 50 V, the maximum value of each of the two output voltages is 100 V. The loads are considered as R 1 = 50 Ω and R 2 = 20 Ω. In Table 1, N S , N D , N C , and N L denote the number of switches, diodes, capacitors, and inductors, respectively. As the table indicates, the proposed topology has minimum number of switches. Also, its maximum total switch current (TSC max ) and maximum total switch voltampere (TSVA max ) is the lowest among the topologies which implies that the cost and losses of the switches in the proposed topology is lower than the existing alternatives. Although the proposed converter uses two inductors, the maximum total inductor energy (TIE max ) stored in the inductors is the lowest which indicates that the cost and volume of the inductors is lower compared to the other topologies. Also, using the same inductors and capacitors, the voltage and current ripples of all of the converters are close to each other. One of the advantages of the proposed converter is that the switches have common-emitter structure and also their emitter is connected to the source ground. Therefore, their driver circuit is simpler and easy to implement and they do not require isolated supplies for the driver circuits.

EXPERIMENTAL STUDIES
The experimental study of the proposed converter is presented in this section. For the sake of conciseness, the simulation results are not included. The input voltage is considered to be 50 V and the output voltage varies depending on the operating condition. The switching frequency is considered to be 20 kHz and maximum acceptable current ripple is assumed to be 0.4. Moreover, the maximum output voltage ripple is considered as 5%. R 1 is considered to be variable between 20 Ω to 50 Ω and R 2 varies between 10 to 40 Ω taking into account that R 1 is always higher than R 2 by at least 10 Ω. The minimum and maximum value of V 1 and V 2 is 50 and 100 V, respectively (d 1,min = 0.5, d 1,max = 0.75, d 2,min = 0 d 2,max = 0.5). It is important to Experimental results for abrupt load change and V 1 = V 2 = 100 V. a) (V 1 +V 2 ), V 2 , 50 V/div, 500 µs/div, b) i 1 , i 2 , 5 A/div, 500 µs/div note that the output voltages (V 1 and V 2 ) are supposed to be equal. Based on the mentioned data and Equations (28)-(31), the value of the inductances L 1 and L 2 are obtained as 1.57 and 3.7 mH, respectively. Also, the capacitors C 1 and C 2 are obtained as 37.5 and 50 µF, respectively. However, their values are selected to be higher in the setup because of inevitable tolerances in practice. The experimental setup specifications are summarized in Table 2. In order to realize the load variation, a resistance is switched in parallel with R 2 to decrease its value from 40 to 20 Ω. According to Equation (32), the voltage ratings of the switches and diodes are different. In a real application, switches with different voltage ratings should be used to achieve higher efficiency and lower losses. However, as a prototype, the same switches and diodes are used in this paper for experimental studies. The experimental results in the case of abrupt variation in the load resistance are shown in Figure 8 where R 1 is FIGURE 9 Magnified view of experimental results for V 1 = V 2 = 100 V (after load change). a) (V 1 +V 2 ), V 2 , 50 V/div, 50 µs/div, b) i 1 , i 2 , 1 A/div, 25 µs/div c) i sw1 , i sw2 , 2.5 A/div, 10 µs/div d) v sw1 , v sw2 , 50 V/div, 10 µs/div, e) i D1 , i D2 , 2.5 A/div, 10 µs/div constant and equal to 50 Ω, and R 2 changes from 40 to 20 Ω. Figure 8(a) shows the output voltages (CH1: V 1 + V 2 , CH2: V 2 ). As expected, the output voltages are both equal to 100 V. Figure 8(b) shows the inductors currents (i 1 and i 2 ). As the figure indicates, the currents of inductors are both continuous before and after the load change. Regarding Figure 8, as the load changes dramatically, the output voltages experience a transient variation, however, the average value of the output voltages does not change. This verifies that the voltage gains in the proposed converter are independent of the load value. Also, it is clear that the average value of the inductors current varies as the load changes. Moreover, the voltage and current ripples varies as the load changes. It is worth noting that there are two types of ripples on the voltage and current waveforms. One type of ripples is the high-frequency ripples caused by the switching action and their frequency is equal to the switching frequency. The other type is lower-frequency ripples that are generated as a result of the controller action and variations in the control signals around their steady-state values. The value of these ripples is mainly based on the control parameters. This issue has been studied in [27].
In order to further analyse the results, the magnified view of the experimental results after the load change is shown in Figure 9. In Figure 9(a), the voltages (V 1 + V 2 ), and V 2 are shown. As the figure indicates, the voltage waveforms contain high-frequency ripples while maintaining the intended average values. The magnified view of the currents, i 1 and i 2 , is shown in Figure 9(b). As the figure indicates, the currents also contain ripples which are less than the designed thresholds. The current through the switches (i sw1 , i sw2 ), the voltage across the switches (V sw1 , V sw2 ) and the current through the diodes (i D1 , i D2 ) are exhibited in Figure 9(c,d,e), respectively. It can be seen that the current of each switch is complementary with that of the corresponding diode.

CONCLUSION
In this paper, a new single-input dual-output boost DC-DC converter has been proposed and analysed. The proposed structure uses only two power electronic switches to control two output voltages. The switches in the proposed converter have lower voltage and current ratings compared with the other converters. As the switches have common emitter structure, their drive circuit requires only one DC supply. The proposed converter has been modelled and designed in details. As the experimental results indicated, the proposed converter provides controlled output voltages despite load change. The converter provides continuous input current which is advantageous for most DC supplies. It is important to remember that the series connection of the output ports (as in the proposed converter) is not possible in most of the existing dual-output converters.

DATA AVAILABILITY STATEMENT
The data that support the findings of this study are available from the corresponding author, upon reasonable request.