Dynamic sliding mode control of single‐stage boost inverter with parametric uncertainties and delay

Funding information There has been no significant financial support for this work that could have influenced its outcome. Abstract Here, a novel control strategy based on sliding mode control for the single-stage boost inverter is presented. The goal is to achieve a system with robustness against inherent delays and variations in parameters, fast response, and high-quality AC voltage. Therefore, according to the idea of current-mode control, a new type of dynamic sliding mode control (DSMC) is proposed to improve the response performance on various input and parameter operation conditions. In comparison with the conventional controllers, the proposed DSMC utilized only a single loop while presenting attractive features such as robustness against parametric uncertainties and input delay by definition new sliding surfaces. Furthermore, the proposed system has a fast and chattering-free response, provides an appropriate steady-state error, good total harmonic distortion (THD), while its implementation is very simple. In a fair comparison with conventional sliding mode control, simulations and laboratory experiments verified satisfactory performance and effectiveness of the DSMC method.


INTRODUCTION
Concern about electrical energy requirements and environmental pollution has led engineers and the public to promote the use of renewable energy generation. Renewable energy resources such as photovoltaic (PV) modules and fuel cells usually generate low DC terminal voltages, which require DC-AC boost inverters to be connected to the AC grid [1]. Various inverter arrangements are feasible for the PV standalone and grid-connected system. The existing technology in the boost inverters is mainly divided into the following types: a singlestage structure that employs DC-AC inverters to generate AC utility line voltage, and a multi-stage framework constructed via connecting classical DC-DC boost converters as initial stage to DC-AC full-bridge inverters as the final stage [2].
The main concern about multi-stage technology is that, due to multi-stage, the number of active and passive components will increase, which will reduce efficiency and increase volume and weight. Moreover, since each stage in the multi-stage power conditioning system requires high efficiency to obtain higher overall efficiency [3], these types of systems possess inevitable drawbacks, including bulkiness, high cost, and inefficiency. The single-phase, single-stage boost inverter was first reported in [4] and proposed a simple DC-AC boost inverter that requires only four switches. The boost inverter topology proposed in [4] is capable of generating a sinusoidal voltage in a single stage with either a larger or smaller amplitude compared to the input dc voltage. Additional advantages often mentioned in the literature include a reduced number of switches, along with higher quality in the output voltage sine wave [5][6][7][8]. However, difficulties in control is still a topic of concern in the design of boost inverters. The controller algorithm, on the other hand, focuses on making the system more robust by reducing the steady-state error to zero. The controller design problem also involves selecting the optimal switching frequency and a design method that is less complicated for implementation. Moreover, the most commonly used technique to control the inverter is based on the independent control of each converter. A boost inverter is modelled in the form of a bounded-input, non-linear, and non-minimum phase with a highly varying parameter system [4]. In addition, such systems require fast response and robustness under load and input voltage variations. These conditions increase the control complexity of the boost inverters.
Since the boost inverter is formed from two boost DC/DC converters, controlling an AC boost inverter is even more complicated. This increased complexity has motivated an intense increase in the research in optimal control strategies and resulted in a variety of solutions.
Until now, the control of the single-stage boost inverter has been achieved using several methods such as the combined fuzzy and adaptive control proposed in [9] to reduce the secondorder harmonic of the current. But detailed system parameters are always required in order to cancel non-linear terms in the system dynamics. Two-loop sliding mode control was suggested in [10], and a classic sliding mode controller was proposed in [11] to control the boost inverter. Also, in [12] a sliding mode control algorithm is designed for single-stage boost inverter. The sliding-mode control schemes presented in [10][11][12] achieve good steady-state results. However, have some disadvantages related to the required complex theory, the variable switching frequency and seem to be impractical because strict sufficient conditions with the coefficients in the sliding surfaces should be satisfied. A hysteresis control technique was discussed in [13], and a waveform control technique was studied in [14] to reduce the current ripple in a boost inverter. To overcome the challenges with the sliding mode controllers, a double-loop control scheme was presented in [15]. But the stability of the doubleloop control scheme in [15] cannot be completely guaranteed under the possible occurrence of operational conditions. Also, a multi-loop control method was discussed in [16], where each converter is controlled via separate references. This method consists of an inner current loop and an outer voltage loop. The control methods in [17] use only one voltage reference for one of the converters. The other reference is generated by subtracting the output voltage from the given reference. A single loop current control method was used in [18] to reduce the harmonic content in the current. A voltage-mode control method has been proposed in [19]. The controller uses the output voltage as feedback with no requirement of the inner loop for current control. The traditional proportional-integral (PI) control or proportional-resonant (PR) controllers were studied in [20,21]. Unfortunately, the stability of conventional PI and PR control frameworks were proposed in [21] could not be completely assured, when system uncertainties exist, and the control gains should be tuned to ensure favourable performances repeatedly. To increase the efficiency of the controller operation, methods such as one-cycle and half-cycle modulation techniques are presented in [22]. Paper [23] presented a numerical method to calculate an appropriate inductor current reference for handling the tracking control of a boost converter with a sinusoidal output voltage. However, the control performance was sensitive to system parameters because detailed system dynamics were required in [23]. The energy-based control proposed in [24] achieves active power decoupling and calculates the duty cycle based on the energy demanded by the load.
According to the literature reviewed in this work, it is concluded that designing most of the control methods require either non-linear control knowledge or complex calculations. Some require two or more separate controllers of the same type to control a DC-DC boost converter, while others need differ-ent types of controllers to overcome the challenges of each controller. Time delays can be considered an inherent property in a wide range of engineering systems, and the presence of delay increases the difficulty of achieving satisfactory performance and stability in the system [25]. Some methods suffer from errors in steady state while tracking the sinusoidal reference and poor disturbance rejection capability. Due to the non-linearities in the converter, the generation of harmonics is unavoidable. These harmonics are the major issues in the output quality. In other words, it is crucial to control the harmonics generated by these inverters to limit their adverse effects on the quality of the output voltage [26]. Therefore, to avoid creating harmonics, the controller in some other methods provide a high-quality sinusoidal output with minimal distortions. [27,28].
Therefore, instead of the traditional approach of controlling the boost inverter, a new non-linear, robust and easy-toimplement scheme based on the core idea of dynamic sliding mode control (DSMC) is proposed in this paper. Also, this method is based on the multi-loop and current-mode control schemes with delay compensation. This method is focused on generating a sinusoidal voltage on the load, regardless of the voltage in capacitors. The proposed controller has combined classical sliding mode with PI controller. Since this novel control design does not require additional loops for additional control objectives, it yields better results compared to the existing methods. Therefore, it includes all the advantages of classic controllers (i.e. sliding mode control and PI controller) while eliminating their disadvantages, such as chattering at the input terminals and significant steady-state errors. In addition, it is very easy to implement and only requires the desired output voltage as the reference. Furthermore, it demonstrates fast response, robustness under input voltage, variations in loads and parameter uncertainties, and proper input delay compensation. Then, third-order voltage harmonic is compensated-reduced or eliminated-using an additional PR controller that performs at a particular harmonic frequency.
The remainder of this paper is organized as follows. In Section 2, the boost inverter and its non-linear model are described. Section 3 investigates the design of a DSMC based on the current-mode control for the single-stage boost inverter. Simulation results are examined in Section 4 to confirm the performance and robustness of the controller. The experimental results are also presented in Section 5. Finally, conclusions are provided in Section 6.

MODEL DESCRIPTION AND PROBLEM STATEMENT
The boost DC-AC inverter, also known as boost inverter, is especially interesting because it is capable of generating AC output voltage higher than its DC input only in one stage [4]. The circuit implementation of the proposed boost inverter is shown in Figure 1.
In Figure 1, Q1, Q2, Q3, and Q4 are power switches, while L1, L2, and C1, C2 and R o are individual inductors and capacitors in boost converters and the equivalent load in the output

FIGURE 2
Boost inverter: This representation is aimed to emphasize that it is formed by two boost converters terminal, respectively. Moreover, V 1 , V 2 , V in , and V o are individual output voltages for the two boost converters, and input and output voltages for the boost inverter, respectively. To emphasize that this inverter consists of two boost DC-DC converters where the load is connected differentially [8], the equivalent circuit is shown in Figure 2.
The inverter is composed of two conventional DC-DC converters and a load, as shown in Figure 2. Converters A and B represent DC-DC boost converters. In this topology, converters are driven by two 180 • phase-shifted DC-biased sinusoidal references, where each produces a DC-biased sine wave on the output, namely v 1 and v 2 . In other words, each source generates a unipolar voltage that maximizes the voltage excursion across the load. The peak value of this AC voltage cannot be less than the DC input voltage. The converter output voltages (v 1 and v 2 ) and the inverter output voltage (V o ) can be represented by where V dc is the DC offset voltage for each boost converter.
To model the dynamics of the system, it is assumed that all the circuit components are ideal, and the mentioned boost inverter operates in continuous conduction mode (CCM). Next, duty cycle D is defined as the time when switch Q 2 is turned on, and the duty cycle D ′ as the time when the switch Q 4 is turned on. In this way, switch Q 1 is turned on in 1 − D, and switch Q 3 in 1 − D ′ . When Q 2 and Q 4 are switched on, and Q 1 and Q 3 are off, the input power source Vin charges the inductors L 1 and L 2 , while the capacitors C 1 and C 2 release their stored energies to v 1 and v 2 output terminals, respectively. Similarly, when the power switches Q 1 and Q 3 are on, and Q 2 and Q 4 are off, the energies stored in inductors L 1 and L 2 are released to the capacitors and the output terminals. As a consequence, using the averaging concept and the Kirchhoff 's laws, the non-linear state-space model for the boost inverter circuit with the state variables (i 1 , i 2 , v 1 , and v 2 ) can be obtained [27] as where i 1 and i 2 are the currents in inductors L 1 and L 2 , and v 1 and v 2 are the capacitor voltages. As mentioned before, V in , V o ,D, and D ′ are input DC voltage, output AC voltage, and switching duty cycles, respectively. The objective of the boost inverter control is to design the switching policies for D and D ′ such that to obtain suitable convergence speed and robustness under load and input voltage variations. Parameters A and are the amplitude and frequency of the desired ac voltage, respectively.

PROPOSED CONTROLLER
Sliding-mode control is becoming a popular tool since it provides attractive features such as fast dynamic response and insensitivity to variations in plant parameters and external disturbance. Plus, it is easy to implement. However, chattering is one problem that limits the use of sliding mode to control plants in the industry [29]. This paper presents a new dynamical sliding mode controller for the voltage control of the boost inverter. The dynamic controller is utilized to minimize the error and adjust the duty cycle of the switches to guarantee the system stability and practicality and eliminate chattering [30]. The performance of the proposed system is compared with that of the traditional sliding mode under different operating conditions. Therefore, in the following subsections, first, the classical sliding mode control (CSMC) and then the proposed DSMC is introduced.

Classical sliding mode control
In CSMC, the control objective is to drive the output voltages to the desired values. Therefore, the tracking error is where y d i is the desired output. In CSMC, the sliding surface can be chosen as [30]: where r i is the relative error e i , and e (k) i is the kth order derivative of the error . The control objective can be achieved by choosing the control input so that the sliding surface satisfies the sufficient condition where ' i ' is a positive constant. Equation (6) indicates that as long as the energy is positive, it should be decreased. n ideal sliding mode is infeasible in practice since it implies that the controller should function at infinite frequency. In the presence of switching imperfections, such as small-time constants in actuators and switching time delays, the discontinuity in the feedback control produces a particular dynamic behaviour in the vicinity of the classic sliding surface, commonly referred to as chattering [30].

Proposed dynamical sliding mode control
The major drawback of classic sliding mode control is chattering [31]. This phenomenon occurs due to the basic assumption in variable structure control that the control can be switched from one value to another at each time instant with almost zero delay. However, in practice, such switching control cannot be easily achieved. Moreover, in the steady state, chattering generates oscillations around the system's desired equilibrium point. These high-frequency oscillations may excite the un-modelled high-frequency dynamics of the system. Some attempts made on chattering cancelation [31] considered employing continuous functions rather than sign functions. However, such systems resulted in large steady-state errors. To reduce the chattering while maintaining appropriate steady-state error, dynamical sliding mode control (DSMC) scheme has been proposed. In conventional DSMC, an extra integral is introduced into the sliding surface to assist in solving difficulties in practice. In this scheme, sliding surfaces are defined as Since the standard single feedback loop may not provide a proper performance in processes with long delays and strong disturbances, multi-control loops can be employed to improve the system's performance, particularly in the presence of disturbances [32]. Therefore, sliding mode control can be used alongside another controller in two loops. Due to its ability in reducing the steady-state error, the PI controller is one of the controllers employed widely in the multi-loop control strategies. The multi-loop control with the classic sliding mode controller and the PI control are implemented in two different ways, which are presented with two different diagrams. In the first diagram (Figure 3), as a multi-loop control scheme, PI and CSMC are selected as inner-loop and outer-loop controllers, respectively. In this case, the inner loop is very slow and increasing the speed of the inner loop increases the overshoot and may destabilize the loop. But in the second diagram (Figure 4), the PI controller is chosen as the outer loop controller, and since the reference is calculated by the PI controller, which is time variable, an external derivative block is necessary in theory. However, such an external block is infeasible in practice. Therefore, ensuring that the outer loop is much slower than the inner loop is a common solution that leads to an almost constant reference signal. Nevertheless, this scheme is feasible only with high actuator bandwidth and is impractical in some plants, including plants containing switching elements.
Consequently, it is possible to substitute CSMC with DSMC to reduce chattering. DSMC possesses an additional integrator that increases the computation load and complexity of implementation and may undermine the stability of the system. However, higher complexity is quite natural in multi-loop systems. As a result, this paper presents a novel sliding-mode controller strategy for non-linear systems that includes the advantages of dynamic sliding mode control, PI control, and multi-loop control, and excludes their disadvantages. The block diagram of the closed-loop system for the boost inverter with proposed DSMC is presented in Figure 5. As can be seen in Figure 5, only one loop is responsible for controlling the output voltage. In this paper, the PI controller in Figure 5 is considered as a sliding surface for the DSMC, which is a functional feature of DSMC presented in Equation (8). Therefore, producing the reference signal for current and reducing error are performed in a single stage.
Consider a continuous, non-linear model for the boost inverter described using the state-space representation as Equation (2). Moreover, T are output and input vectors, respectively. In order to control the current-mode control of the boost inverter, a DSMC is proposed here. In this controller, rather than the capacitors, the focus is on generating an AC voltage on the load. The sliding surface is defined by: Theorem 1. The control laws defined in (8) push the sliding surfaces in (7) to zero: where , and k pi , k ii , and K i are positive constants, while Proof. Consider the following Lyapunov function: by substituting (8) in (7), we havė Since K 1 and K 2 are positive,V is negative. Therefore, the Lyapunov function V approaches zero and thus, s 1 and s 2 (as the sliding surfaces) approach zero. Remark 1. If h 1 (x) and h 2 (x) are zero, then D and D ′ are given by Equation (12) The overall design procedure of the proposed DSMC can be expressed in the following four steps: 1. Write model of a non-linear system as the following standard form:ẋ

Define sliding surfaces
where x i , x j and x id are the output state, a measurable state, and the desired output state, respectively. k P and k I are positive constants which k P ≪ k I . 3. Calculate the equivalent control signals:

Harmonic rejection
The distributed power generation systems produce harmonics due to the non-linearities in their converters. Moreover, such systems have major output quality issues, mainly due to the fact that the number of systems connected to the inverter is always increasing, indicating the significance of controlling the harmonics generated by these inverters to limit their adverse effects on the output voltage quality [27][28][29][30][31][32][33]. Therefore, to reject harmonics, the controller must be able to provide high-quality sinusoidal output with minimal distortion. Disturbance harmonics in the voltage, including the third, fifth, and seventh, can be compensated by additional PR controllers at particular harmonic frequencies. This compensation reduces the THD so that the inverter is compliant with the IEEE and IEC standards [34].
In this section, a selective harmonic compensator is designed to eliminate the third harmonic. Therefore, a third-order PR where 0 is the resonant frequency, K P3 is the proportional gain, and K I 3 is the integral gain. The proposed control scheme in this section is divided into two stages: the first stage consists of a dynamic sliding control to improve transient behaviour and closed-loop stability. Then, the PR control concept is employed to reject harmonics in the second stage.

SIMULATION RESULTS
Simulation results are performed in Matlab/Simulink environment using the parameters given in Table 1. For the sake of a fair comparison, the performance of the CSMC is simulated with similar values. Moreover, simulations are performed in two scenarios: with and without delay.
In the first scenario, delay is not considered, while a delay due to calculations and the PWM part is considered for the second scenario. Figure 6 shows the reference and the output of the boost inverter using classical SMC and the proposed controller given by (8). As can be seen in Figure 6, the CSMC yields significant overshoot, while the output voltage in the proposed controller tracks the reference trajectory appropriately with reduced overshoot. Furthermore, there is a significant steady-state error in the response of the CSMC due to the phase shift.

Scenario 1: Without delay
Moreover, to examine the performance of the controller with the existence of uncertainty, the system is initially simulated with input voltage variation from 48 to 38 at the 0.06th second. The simulation results are presented in Figure 7.
It is observed in Figure 7 that variations in the input voltage do not demonstrate significant effects on the output voltage. Specifically, when the input voltage changes, the dc component of the voltage on capacitors is automatically adjusted. It should be pointed out that this perturbation rejection is achieved without measuring input voltage. Phase shift and significant error in steady state can still be seen in the response of CSMC.
In order to test the robustness of the proposed strategy with respect to parameter uncertainties, simulations are performed in several conditions. First simulation is performed in a condition where the Load is changed from 100 to 150 Ω according to a step function at the 0.1th second. It is seen that in this case, the circuit becomes asymmetric. Figure 8 shows the controller performance under variation of the Load.
In the second condition, parameter c 1 is changed from 100 to 70 μf at the 0.1th second that Figure 9 demonstrates the simulation results of this condition. As the last condition, Figure 10 shows the controller performance under variation of parameter L 1 .
As can be seen in Figures 9 and 10, the controller is robust under large load variations and parameter uncertainties. In specific, it can be seen that the output voltage does not change, and the system recovered very fast.

Scenario 2: With delay caused by calculation and PWM
Delays are generally caused by a variety of factors. In the boost inverter, calculation time and the PWM section are responsible for delay time as large as approximately 1.5 times of sampling period. Therefore, simulations in this section are performed    As can be seen in Figure 11, responses for both controllers demonstrate steady-state error when the time delay is considered. However, overshoot in the CSMC response is increased, along with a small phase shift.
As illustrated in Figures 6-15, the steady-state error in the CSMC is more than the DSMC. Furthermore, the overshoot and high harmonics in the CSMC are the main disadvantages of the CSMC.
As anticipated in Figure 16, in the absence of harmonic rejection, third-order harmonics are present on the output AC voltage. Therefore, the harmonic rejection is necessary at 3ω to  produce the desired AC voltage. The total harmonic distortion (THD) is a measurement of signal quality. Based on the IEEE standard in standalone power systems, the THD levels of less than 5 are acceptable [30]. The value of THD in the output voltage in different simulation scenarios are presented in Table 2. It is clear that by considering delay, the THD increases. In both conditions, THD in DSMC is less than CSMC, which indicates the superiority of the proposed controller in comparison with the classic method. Figure 16 confirms that utilizing CSMC creates high-order harmonics in the output voltage, indicating one significant reason to replace CSMC with DSMC.

EXPERIMENTAL RESULTS
To validate the designed control scheme and confirm simulation results, a differential boost inverter has been constructed.  parts. In the power part, two small-scale DC-DC boost converters have been connected in differential mode. The nominal parameters of the power part setup are summarized in Table 3. Furthermore, as the control part, the proposed scheme has been implemented using an Arduino Due controller board. Arduino is a popular electronic interactive platform built around a controller and complementary components that facilitate programming and interfacing with other circuits. With the advantages such as ease of use, versatility, and inexpensiveness, it is widely used in the design of electronic systems and development of interactive products. The Arduino Due used in this paper is a controller board built around Atmel SAM3 × 8E ARM Cortex-M3 CPU. It contains 54 digital input/output pins, 12 analog inputs, 4 UARTs (hardware serial ports), an 84 MHz clock, an USB OTG capable connection, 2 DAC, 2 TWI, a power jack, an SPI header, a JTAG header, a reset button and an erase button [35].
Our implementation of the proposed dynamic sliding mode algorithm in the Arduino Due microcontroller board follows tree essential steps: Step1: Simulate the proposed DSMC in Matlab.
Step2: Transcribe the proposed DSMC program from the Matlab to the C code. Notice, it is necessary to use the PWM built-in module of the Due for switching process in the boost inverter. Furthermore, the interrupt service routine (ISR) as the control part will be used to update the duty cycle of each output that drives the inverter switches. The diagram represented in Figure 18 summarizes the implementation process of the PWM on the Arduino Due board.
As shown in Figure 18, void loop update controller as a time interrupt and the new PWM signals are put in the outputs. Figure 19 illustrates the performance of the proposed controller (bottom) and conventional controller (top) in tracking reference. The robustness of the proposed controller under input variation is performed and illustrated in Figure 20.
The effectiveness of the PR controller in reducing the selected harmonic in the output voltage, for conventional and proposed controllers, is illustrated in Figure 21.
Since   As illustrated in Figures 22 and 23, the proposed controller method can achieve good transient responses and satisfactory robustness against variations to the system parameters.
To get an overview of the performance of the proposed controller in comparison with conventional methods, THD in the output voltage in different experimental scenarios are presented in Table 4.
In order to assess the performance of the proposed method more precisely, a comparison of proposed DSMC with some common techniques is performed. For example, model predictive control [36] or adaptive neural network control [37] meth- ods require high calculation time in comparison with proposed DSMC, that led to ripple of switching. Also, the low computational complexity is an important advantage of proposed DSMC. Simple implementation and the ability to continue stable and appropriate working under parameter uncertainties are other advantage of proposed method compared to multi-loop controller using PI or PR [38]. Finally, some of the disadvantages of conventional sliding mode control such as calculation of state references and sliding coefficients are addressed using the proposed controller [39].

CONCLUSION
In this paper, a DSMC was presented for a single-stage boost inverter. In the presented method, the non-linear model of the boost inverter is initially obtained. Then, based on the sliding mode control scheme, a DSMC was developed to compensate for uncertainties and time delay. Based on the designed DSMC, control inputs are determined to guarantee finite-time convergence and the robustness of the system. Remarkable features in the proposed controller are as follows: (1) Reduced chattering in the SMC, (2) Simple design and construction procedure for the controller, and (3) high performance, (4) Good transient response. The performance of the proposed controller is analysed using simulation and experimental results. Moreover, to provide a fair comparison, the performance of the CSMC was simulated. As can be seen, using CSMC leads to high-order harmonics, which confirms that the THD in CSMC was higher than DSMC. In addition, the effectiveness of the PR controller in reducing selected harmonic in the output voltage is demonstrated.