Modelling, analysis, and implementation of a switched-inductor based DC/DC converter with reduced switch current stress

This paper proposes a technique for switch current stress reduction in a Switched Inductor DC-DC Boost Converter (SIBC). The proposed technique comes up with a low-cost design, high voltage conversion ratio with a less duty cycle value, and lower current stress without increasing the component count. This topology is basically a transformerless design where one diode of the traditional switched inductor conﬁguration has been replaced with a switch, which is in parallel with the existing switch, resulting in a design that can incorporate active switches with a low current rating, since the total input current is equally shared by them. The detailed modes of operation in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) and steady-state analysis, the non-idealities’ effect on voltage gain, design approach, and a comparative study with other DC-DC converters for some signiﬁcant performance characteristics are provided. The experimental validations for the performance and working of the 500 W designed prototype are presented.


INTRODUCTION
For various applications such as high-intensity discharge lamp ballast, uninterruptible power supply, photovoltaic and fuel cell energy conversion, LED and DC microgrid, high gain DC-DC converters are required for stepping up the voltage [1,2]. Theoretically, a high voltage conversion ratio can be achieved by using the traditional DC-DC boost converter with a large value of duty cycle, which in turn increases the current stress in the boost switch. Furthermore, the system efficiency is reduced and the maximum voltage gain is constrained due to serious reverse-recovery problems associated with the diode, inductor's and capacitor's parasitic resistance, semiconductor devices with a higher rating, and high switch conduction loss [3][4][5][6]. To overcome these issues, several power converter topologies have been introduced in the literature in the past decade to achieve a high voltage gain avoiding the duty cycle to be exceptionally high. The flyback, push-pull, SEPIC, and H-Bridge type topologies which are basically transformer-based converters, could be used to achieve a high voltage gain without working at extreme val-ues of duty cycles. However, to minimize the component stress and effect of transformer leakage inductance, and recycle the leakage energy, extra energy restoration methods and voltage clamping practices are needed to incorporate in these converters [7][8][9][10][11]. A high gain in voltage with low switch current stress can be achieved by using coupled inductor based topologies [12]. Nevertheless, in the case of high-power applications, significant current stress is observed through the switch [13]. Also, the need of ripples reduction techniques and energy recovery schemes for leakage inductor by using input filter and additional clamped circuit increase the cost. Furthermore, the gain factor of these topologies is controlled by the coupling coefficient of the coupled inductors and these are complex in design too [14,15]. Although the quadratic boost and cascaded converter topologies can solve the above mentioned issues, the cascade structure is observed to be complex in design which leads to an increased cost. Furthermore, to reduce the circuit complexity, integrating the two switches into one, does not help much and the current stress continues to be high in that case too [7,13,[16][17][18]. Some of the recently proposed solutions [3,13,[19][20][21][22], such as switched inductor or switched capacitor based converters, hybrid switched inductor-capacitor converters, multiplier based or interleaved converter structures are able to solve the problems faced in the abovementioned converters. However, generally, the voltage gain is less in such converters, due to the presence of many power stages and the current stress through active switches is also high [17,23]. Furthermore, the system size, complexity, and cost increase substantially due to the presence of several multiplier cells. Some new converter topologies are proposed to reduce the switch current stress and to increase the voltage gain without increasing the duty cycle [24][25][26][27][28]. However, a greater number of intermediate reactive components are needed for the proposed converters in [24,25] and a high gain in voltage is attained by incorporating several stages. On the other hand, the circuits proposed in [26][27][28][29][30] are appropriate for floating load conditions only and the voltage gain improvement is not sufficient enough even by increasing the number of switches in the circuit. In [29][30], dual duty three mode converters with high gain are developed to improve the voltage gain with no coupled inductor, transformer, voltage lifting techniques, or voltage multiplier. These converters can attain a high voltage gain with a wide range of operations of the duty cycle. However, the control algorithm of these converters is complex due to the usage of three switches and two duty cycles, leading to an increase in complexity of the circuit, size, and cost. Furthermore, such converters are appropriate in the conditions of floating load only.
To achieve a high voltage gain, derived from the typical switched inductor boost converter (SIBC) design, this paper proposes an improved converter topology with reduced current stress for active switches to provide a stable constant boosted DC voltage. The proposed topology has the advantage of providing a high voltage gain, low current stress, and low conduction loss on the active switches, simplified control, and high efficiency. The current is equally shared by both the switches and thereby reducing the conduction loss. The proposed converter topology is a transformer-less design. Both the switches are connected in parallel and thereby reducing the switch current stress. Therefore, the power circuit of the proposed converter can be designed by using low current rating switches. Furthermore, the solar PV panels can be integrated at 400-V bus of a DC microgrid system by incorporating the proposed converter because of the common ground connection of source and load. The proposed converter is more appropriate and a better option for PV application of 400 V DC microgrid because of its properties of achieving high voltage gain, operation in a wide duty range, and unidirectional power flow. As required for the PV applications, the proposed converter is able to draw a continuous input current with low ripples from the input source. The proposed converter is a viable solution for the integration of solar PV panels into a DC microgrid because of the abovementioned benefits where a high overall output voltage can be obtained by incorporating the proposed converter with each PV panel. The rest of the manuscript is arranged as follows. The power circuit and the characteristics in steady-state, and operating principle in different modes with analysis is explained in Section 2. Section 3 presents the effect of non-idealities of the A comparative study of DC-DC converters is presented in Section 4. The method of design and experimentally obtained results are discussed in Section 5 and Section 6 gives the conclusion.

PROPOSED CONVERTER TOPOLOGY
The power circuit of the typical SIBC [21] is shown in Figure 1(a). SI circuit is incorporated in the SIBC to attain a voltage gain higher than the conventional boost converter. Nonetheless, current stress on the switch increases significantly with voltage gain due to the total input current flowing through the switch. Hence, the power circuitry of the typical SIBC has been improved without increasing the component count to reduce the switch current stress. To attain a high voltage gain, the fundamental concept of switched inductor structures that is charging of inductors in parallel and discharging in series has been exploited. An extra switch is added in place of one diode, which reduces the switch current stress to half of the current stress on the active switch of the SIBC. The current is equally shared by both the active switches.

Power circuitry
The power circuitry of the proposed converter is shown in Figure 1(b) comprising of diodes D A , D B , and D C , inductors L A and L B , active switches S A and S B , C as capacitor, and R out as load. The converter topology put forward is basically a transformer-less design and is originated from the typical Switched Inductor Boost Converter (SIBC) structure by substituting a diode with a switch in the switched inductor circuit. Both the switches are connected in parallel and thereby reducing the switch current stress to half of the current stress on the active switch of the SIBC. Therefore, the power circuit of the proposed converter can be designed by using low current rating switches. It is important to note that the components count of the proposed converter is the same as that of the typical SIBC and the voltage gain is improved. Firstly, all the circuit elements of the proposed converter topology are considered to be ideal for studying the CCM steady-state characteristics. The capacitance value is sufficiently large to achieve a ripplefree voltage, and the ON-state resistance voltage drop across semiconductor devices is ignored. The inductance value of the inductors L A and L B are considered to be equal in this section that is, L A = L B = L (superior case). Both the inductor L A and L B currents are equal as per the above circuit, and are expressed as,

CCM-Principle of operation and analysis
There are two CCM operation modes of the proposed converter; both the switches S A and S B are kept ON in Mode I (between time t 0 and t a ) while switches S A and S B are kept OFF in Mode II (between time t a and t b ).

2.2.1
Mode I (between time t 0 and t a ) Input voltage (V i ) charges the Inductor L A via switch S A , while input voltage (V i ) charges inductor L B via diode D A and switch S B , and capacitor C is getting discharged via load R out . Diode D A is forward biased and diodes D B and D C are reversed biased. Figure 3 where I i is the input current. The switches S A and S B voltages and currents are expressed as, The switches S A and S B voltages and currents are expressed as, The voltage gain of the proposed converter can be expressed as, where the duty cycle is denoted by D and the voltage gain is denoted by M CCM . The proposed converter's voltage gain is observed to be equal to that of the typical SIBC.

DCM-Principle of operation and analysis
There are three modes of operation of the proposed converter for DCM; switches S A and S B are kept ON in the first mode that is ON State, switches S A and S B are kept OFF in the second mode with a non-zero value of inductor currents and switches S A and S B are kept OFF with zero inductor currents during the third mode. Figure 2(b) shows that the inductor current comes to zero, let us say at time t b . Figure 2(b) shows the characteristic waveform for DCM, where the time period for the first mode is indicated as Y I T or T on that is the time between t 0 and t a , the time period for the second mode is indicated as Y II T or T off,I that is the time between t a -t b , and the time period for the third mode is indicated as Y III T or T off,II that is the time between t b -t c .

Mode I (between time t 0 and t a )-Both S A and S B are kept ON
The proposed converter's equivalent circuitry and working in this mode are the same as that of mode I of CCM. Both inductors L A and L B are charged in parallel by the input supply V i . The currents through inductors L A and L B started from zero value at the beginning of this mode that is at the time t 0 or t 0 +T FIGURE 4 DCM mode III equivalent circuit and attained the highest value at the end of this mode. Inductor L A and L B maximum currents can be expressed as, The maximum currents through inductor L A and L B are denoted by I LAmax and I LBmax , respectively, and the switching frequency is denoted by f = 1/T. The current ripples of inductors L A and L B can be expressed as, The inductor L A and L B current ripples are denoted by ΔI LA and ΔI LB , respectively.

Mode II (between time t a and t b )-Both S A and S B are kept OFF with non-zero value of inductor currents
The equivalent circuit and working of the proposed converter for this mode are the same as that of mode II of CCM. Inductors L A and L B are discharged in series by the input supply V i , and the capacitor C is charged to supply energy to load R out . The currents through inductors L A and L B started from the maximum value at the beginning of this mode that is at time t a or t a +T and zero value is reached by the inductor currents at the end of this mode that is at the instant t b or t b +T. Inductor L A and L B maximum currents can also be expressed alternately as, The current ripples of inductors L A and L B are expressed as, Mode III (between t b and t c )-Both S A and S B are kept OFF with zero value of inductor currents Figure 4 shows the DCM mode III equivalent circuit. Both the switches S A and S B are kept OFF and currents through inductors L A and L B are zero. Hence, the energy accumulated by inductors L A and L B is also zero, capacitor C is discharged through load R out , and all the three diodes are reversed biased in this mode. Mode II time period which is denoted by Y II T or T off,I can be obtained from Equations (10) and (11), and is expressed as, We know that, The time periods for Mode I and III, respectively are expressed as, The capacitor C average current can be obtained from Figure 2(b) and is expressed as, From Equations (15) and (18), The average current through a capacitor is always zero in a steady-state condition. Hence, Equation (17) can also be written as, The quadratic equation obtained from Equation (18), is calculated by using the following expression, where inductors L A and L B normalized time constant is denoted by λ L and has a value equal to fL/R out . Hence, L, f, and R out values control the variation in λ L . The voltage gain of the proposed converter for DCM denoted by M DCM can be obtained by simplifying the Equation (19) and is expressed as, The CCM and DCM voltage gains are observed to be the same when the CCM and DCM boundary is considered as the proposed converter's operating point. Hence, from the Equations (8) and (20), We know that the CCM and DCM mode I are the same. Hence, Y I is the same as D and inductors L A and L B normalized boundary time constant which is denoted by λ Lb can be expressed as, The plot of λ Lb versus D is shown in Figure 5 indicating the DCM and CCM regions. It indicates that the proposed converter works in DCM mode when the value of λ Lb is more than λ L .

Inductors LA and LB ESR effect on voltage gain
Other parasitic irregularities are neglected for analyzing the inductors L A and L B ESR effect on voltage gain that is by considering R S = 0, R D = 0, R C = 0, and V FD = 0. Hence, in this case, the voltages across the inductors L A and L B can be expressed as, From Equation (23) and addition of voltages across inductors, From the inductor volt second balance method and the method of small approximation, From Equation (26), the proposed converter voltage gain is calculated by using the following expression, Both the inductors L A and L B currents have the same value that is I L = I LA = I LB when L A = L B . If the inductor voltage drop because of ESR is denoted by V DL , thenV DL = I LA R L = I LB R L . Therefore, Equation (27) can also be expressed alternately as, It is observed from (27) and (28)

Diodes D A , D B , and D C effect on voltage gain
Other parasitic irregularities are neglected for analyzing the diodes D A , D B , and D C effect on voltage gain that is by consid-ering R LA = 0, R LB = 0, R C = 0, and R S = 0. Hence, in this case, the voltages across the inductors L A and L B can be expressed as, From Equation (29) and addition of inductor voltages, From the inductor volt second balance method and the method of small approximation, From Equation (32), the proposed converter voltage gain is calculated by using the following expression, If the diode voltage drop because of the threshold voltage and forward resistance is denoted by V DD , thenV DD = I LB R D + V FD . Therefore, Equation (33) can also be expressed alternately as, It is observed from (33) and (34) that for larger values of V DD ∕V i and D, the voltage gain is decreasing. Hence, moderate values of threshold voltage and forward resistance should be considered.

Switches S A and S B effect on voltage gain
Other parasitic irregularities are neglected for analyzing the switches S A and S B effect on voltage gain that is by considering R LA = 0, R LB = 0, R C = 0, R D = 0, and V FD = 0. Hence, in this case, the inductors L A and L B voltages can be expressed as, ModeII From Equation (35) and addition of inductor voltages, From the inductor volt second balance method and the method of small approximation, From Equation (38), the proposed converter voltage gain is calculated by using the following expression, The switches S A and S B voltage drops are considered to be the same, and henceV DS = I SA R S = I SB R S . Therefore, Equation (39) can also be expressed alternately as,

Effect of capacitor C
Other parasitic irregularities are neglected for analyzing capacitor C, ESR effect on voltage gain that is by considering R LA = 0, R LB = 0, R D = 0, V FD = 0, and R S = 0. Here, the voltage drop across resistance R C is denoted by V DC . The capacitor C is being discharged via load R out when the switches are kept at ON position. There is a decrement in voltage across the capacitor C which is the same as the output voltage and the instantaneous value of output voltage is obtained as follows, Hence, output voltage variation (ΔV o ) at the end of ON-state is,

Non-idealities' integrated effect on voltage gain
The non-idealities associated with the inductors L A and L B , diodes D A , D B , and D C , switches S A and S B , and their ESR effects on voltage gain have been considered; the voltage gain is expressed as,

Evaluation of efficiency
For capacitor C, ON-state and OFF-state currents can be expressed as, Inductors L A and L B currents are equal in the OFF state that is I L = I LA = I LB . Now, considering the capacitor charge balance principle, and the method of small approximation, together with Equation (44), Inductor currents are calculated by using Equation (45) as, The switching power losses of switches S A and S B are denoted by P SW-SA and P SW-SB , respectively. The total switching loss during switching is denoted by P SW-TOT and can be expressed as, where, t R-SA , t F-SA, and t R-SB , t F-SB being the respective rising and falling times for the switches S A and S B ; the switches S A and S B average currents are I SA and I SB , and the average voltages across the switches S A and S B are V SA , and V SB respectively. The total input and output power can be expressed as, The proposed converter's efficiency PRO is obtained from Equations (43)-(48), and is expressed as,

COMPARATIVE STUDY OF CONVERTERS
To achieve a high voltage gain and an improved efficiency several DC-DC boost converters have been proposed in the past decade. This section presents a comparison of the proposed converter with some similar high gain DC-DC converters. The converters are compared for the voltage gain, switch current stress, components count, and efficiency and presented in Table 1. The components count for the proposed converter is observed to be the same as that of the converters discussed in [21,25], and [30], while the components count for the converter presented in [26] is lesser than the converter proposed here. However, the proposed converter's efficiency is more than the converter in [26]. Furthermore, the output and input of the proposed converter and the converters in [21,24], and [25] are on common ground, while the rest of the converters are only suitable in the conditions of floating load. The converter's efficiency depends on different factors such as the components count, their types, and voltage/current ratings. The comparison with regards to switch current stress among the different converters indicates that the proposed converter has the lowest current stress across the active switches and is equal to half of the input current. The proposed topology is based on a transformer-less design and it is developed by substituting a diode of the traditional switched inductor configuration with a switch in parallel with the existing switch. Hence, low current rating switches can be incorporated, as the total input current is equally shared by the two switches. Generally, the increase in the rating of a device leads to an increment in its ON-state resistance. Components with lower rating are required for the proposed converter topology and hence it comes up with a low-cost design and generates a high efficiency with the same number of components used in the traditional SIBC. The efficiency of the proposed converter is 93.12%, which is higher than the efficiency of the converters presented in [25] and [26] which are 92.2% and 92.7%, respectively. The proposed converter's efficiency is nearly equal to the converters in [29] and [30], while the proposed converter's efficiency is lesser than the converters in [19] and [21].
Therefore, the converter proposed is highly suitable for high voltage gain with reduced switch current stress and less duty cycle, high efficiency, and low-cost applications.

DESIGN AND RESULTS
To validate the operation and performance of the proposed converter it is designed by taking into account the typical values of input voltage as 100 V, output voltage as 400 V, power output as 500 W, and the switching frequency as 100 kHz.

Reactive components
The worst possible efficiency ( worst ) has been taken into account for the design of the reactive components to obtain a good performance. Therefore, the required duty cycle can be calculated by considering the worst efficiency as 90%, and is expressed as, (50) The inductors L A and L B critical values are calculated as, The ripple value of peak to peak inductor currents is considered as 1A to calculate the critical values of inductor L A and L B and are expressed as, The inductors' L A and L B current rating and inductance value should be more than the value of input current and critical inductance values, respectively. Therefore, the prototype is designed by selecting 1 mH/10 A rated core inductors of ferrite E type having R L = 75 mΩ.
The critical capacitance of capacitor C at the output side is calculated by, The peak to peak ripple value of the capacitor voltage is considered as 4 V to calculate the capacitor C critical capacitance and is obtained as, The capacitor C voltage rating should be more than the value of output voltage that is 400 V. Thus, the prototype is designed by selecting a 2.2 μF/450 V (R C = 4 mΩ) rated film type capacitor.

Semiconductor devices
The switches S A and S B voltage stresses are calculated as, The switches S A and S B minimum voltage rating can be calculated as, The selected switches S A and S B current ratings should be higher than the value of input current. Thus, FDP19N40-ND (R s = 200 mΩ) MOSFET and FDP18N20-ND (R s = 140 mΩ) MOSFET have been chosen. The diodes D A , D B , and D C Peak Inverse Voltage (PIV) rating can be obtained as, The diodes D A , D B , and D C minimum PIV rating considering the given parameters can be obtained as, The selected diodes D A , D B , and D C current ratings should be higher than the value of input current. Thus, DPG10I400PM (400 V/10 A, R D = 19.8 mΩ, V FD = 0.77 V) and C3D10060A-ND (600 V/14 A, R D = 55.2 mΩ, V FD = 0.91 V) diodes have been chosen.

Experimentally obtained results
The proposed converter's operation and performance have been experimentally verified. Figure 7(a) displays the input and output voltages and currents waveforms obtained experimentally. The output voltage, output current, input current, and input voltage average values are observed as 398 V, 1.2 A, 5.35 A, and 100 V, respectively. The input current is observed to be continuous in nature; charging and discharging of the inductors L A and L B during ON-state and OFF-state causes the input current slope to be increasing and decreasing, respectively. Figure 7(b) demonstrates the effect of the step change in load on input/output voltages and currents that is the dynamic behavior of the input/output voltages and currents for the proposed converter with a change in load at a constant duty ratio. To study the efficiency of the developed prototype, the converter's performance is studied at different power levels and input voltage. Figure 8(a) shows the efficiency of the designed prototype with variation in power and input voltage. The efficiency of the developed prototype is 93.12% when the input voltage is 100 V and output power is 500 W. The power loss distribution is given in Figure 8(b) when load power is 500 W and the input voltage is 100 V. It is investigated that power loss across switches is high compared to other elements of the converter.

CONCLUSION
A high gain DC-DC converter with reduced switch current stress has been successfully developed through this study. The proposed converter has a higher gain in voltage in comparison to the traditional boost converter and is equal to the gain in voltage of the conventional SIBC at a small duty cycle value. The proposed converter offers the advantage of common ground, continuous input current, and reduced current stress on the active switches using the same number of components as that of a conventional SIBC. Therefore, low current stress active switches can be employed, leading to reduction in losses. Resulting in a low cost and highly efficient converter because of the use of active switches with lower current rating and eliminating a diode. Moreover, the common ground connection of source and load in the proposed converter circuit makes it highly suitable for DC Microgrid integrated with solar PV. The operating principle in both CCM and DCM including the boundary conditions, the voltage gain, and the effect of non-idealities have been discussed in detail. The comparison of the proposed converter with other similar converters has been presented, which indicates that the proposed converter is feasible to attain a high voltage gain by incorporating low current rating switches. The principle of operation and theoretical analysis have been validated by the experimental results of the developed laboratory prototype, the efficiency at 500 W load power was observed to be 93.12%. Hence, the proposed converter topology provides a viable solution for an efficient renewable energy conversion which can easily be extended further to other power conversion systems for applications where high voltage is required.