A time error correction method based on virtual power for parallel simulation of power system

The simulation of complex power grid adopts the method of model segmentation. The system is divided into two or more subsystems. Each subsystem is calculated and solved in different computing units. Because the simulation model runs on different hardware, the time synchronization between subsystems may bring errors and stability problems. In this paper, a time synchronization method based on virtual power is proposed. It is assumed that there is a virtual load composed of resistance and inductance between different simulation subsystems, and two identical voltage sources are set at both terminals of the virtual load. When there is no time error between the subsystems, the power consumed by the virtual load should be zero, otherwise virtual power will be generated. The virtual power is sent to the PI regulator as the error signal, and the output of the regulator is used as the time error correction signal of the subsystem until the virtual power is zero, so as to realize the clock synchronization between multiple computers. In this paper, the theoretical analysis and implementation method of this time synchronization scheme are given in detail, and the simulation results show that the method is correct.


INTRODUCTION
With the continuous development of society, the scale of modern power system will continue to expand, which poses a huge challenge to the rapid simulation of power system [1]. The concept of power system model segmentation originated from the idea of "Diakoptics", which was proposed by Gabriel Kron in 1952 [2,3]. The main content of diakoptics is: In the calculation of complex power system, a complete system is divided into two or more subsystems, and then each subsystem is calculated and solved respectively. The communication technology is used to combine the subsystems, and the results of each subsystem are corrected independently to get the final solution of the whole system. In 1981, Prof. Heffernan first used two different simulation software to simulate DC and AC systems in non-real time [4].
Power system model segmentation can greatly reduce the order of power system, save the amount of computation and accelerate the simulation time. At present, the main interface This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited. © 2021 The Authors. The Journal of Engineering published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology segmentation algorithms are ideal transformer method, state space node method, long transmission line model method, node splitting method, damping impedance method etc. [5][6][7][8][9][10][11][12].
When the power system model is divided, the simulation of power system is realized by multicomputer. Due to the asynchronous time, the corresponding calculation error and stability problems are caused. When the time between subsystems is not synchronized, there will be frequency error between subsystems, which will change the phase on both sides, resulting in a very large simulation error [13]. Therefore, it is necessary to synchronize the time between simulation subsystems.
In [14][15][16][17], the synchronization between systems is realized by waiting, which affects the simulation speed. There are also the network time protocol (NTP), GPS, IEEE1588, and other synchronization methods [18][19][20][21], but additional hardware is needed. Reference [22] proposed a time synchronization algorithm without additional hardware, but the algorithm is relatively complex. In this paper, the relevant theoretical knowledge of inverter grid synchronization is used to realize the time synchronization between subsystems [23]. Aiming at the problem of error and stability caused by time synchronization after segmentation, a time synchronization method based on virtual power is proposed. Virtual R-L load is set between subsystems, and virtual voltage sources with the same voltage, frequency and phase are connected at both terminals. When the time of the two subsystems is synchronized, the virtual power flowing on the virtual load is 0. If the virtual power is not equal to zero, it can be considered that the time is not synchronized. The virtual power is input into PI regulator as error, and the output of PI regulator is input into the clock of subsystem as time correction signal until the virtual power is 0. A Matlab/Simulink simulation model is built to verify the proposed method.

SYSTEM SEGMENTATION
In this paper, the ideal transformer is used to segment the power system model. The main advantage of this method is that it has good flexibility in network division, and can divide the network at any node. It only needs to transfer the voltage and current signals at the interface of the subsystem of the division model, and has fewer communication data [10].

Principle of ideal transformer method
The theoretical basis of the ideal transformer algorithm is the circuit substitution theorem. The controlled current source and the controlled voltage source are used to receive the voltage or current signals on the opposite side of the interface, so as to realize the division of the power system. The large system is divided into small systems and run in different simulators. This paper analyses R-L load system as an example, as shown in Figure 1.
There are two kinds of interface of ideal transformer method: voltage type and current type. The principle of ideal transformer method is shown in Figure 2 [10].
In the ideal transformer method shown in Figure 2, E 1 (t) and E 2 (t) represent Thevenin equivalent voltage of system 1 and system 2 respectively, and Z 1 and Z 2 represent Thevenin equivalent impedance of system 1 and system 2 respectively. In the voltage type ideal transformer method, the interface voltage signal of system 1 is transmitted to the controlled voltage source of system 2 as the control signal, and the interface current signal of system 2 is transmitted to the controlled current source of system 1 as the control signal. △t is the delay of the interface.
According to the open-loop transfer function, when the equivalent impedance of system 1 is greater than that of system 2, the system will operate stably, otherwise, the system will be unstable. On the contrary, the method of current source ideal transformer requires that the equivalent impedance of system 1 is less than that of system 2 [10]. In this paper, the ideal transformer method is only used for system segmentation, and its stability is not the focus of this paper, so the parameters are selected according to the stability conditions.

TIME CORRECTION BASED ON VIRTUAL POWER
After the completion of power system segmentation, because the subsystems are simulated in different devices, the time between subsystems may be out of sync due to the instability of crystal oscillator or network transmission, resulting in error and stability problems. It is necessary to correct the time error of subsystems to achieve synchronous and stable operation.
The time correction method based on virtual power is described as follows: suppose that there is a virtual load R v S + L v between the two subsystems, which is composed of resistance R v and inductance L v , and two virtual voltage source U 1 and U 2 are set at both terminals respectively. The voltage, When the time of the two subsystems are synchronized, there is no power flow in the virtual load. When the time of the two subsystems are different, the phase of the two virtual power sources will be different, and the virtual power will be generated on the virtual load. Because it is a digital system, the data transmission will not produce voltage amplitude error. The virtual power is completely determined by the phase difference between the two power sources, and the asynchronous time is the reason for the phase difference. The virtual power is sent to the PI regulator as an error signal, and the output of the regulator is input to the clock of subsystem 2 as a correction signal. As the clock error between subsystems is corrected, the phases of the two virtual power sources are gradually equal. When they are equal, the virtual power flowing through the virtual load is 0, and the time error between the two subsystems is corrected.
Suppose the virtual voltage of subsystem 1 is U 1 < , the virtual voltage of system 2 is U 2 < 0, and R v and L v are the virtual loads between system 1 and system 2. The virtual active power P virtual from system 1 to system 2 is [23] When U 1 = U 2 and = 0, P virtual = 0. This shows that when the voltage amplitudes and phases of both system 1 voltage and system 2 are exactly the same, the virtual power flowing through the virtual load is 0. The calculation method of virtual power is shown in Figure 4.
The time correction scheme is shown in Figure 5. Figure 5 is the virtual controlled voltage source of subsystem 2 with constant voltage, and its clock is connected with time correction signal. When there is time error, the virtual power P virtual is not equal to zero. PI regulator adjusts and outputs the time correction signal until the virtual power is zero. At this time, the output of PI regulator is the time correction signal

SIMULATION VERIFICATION AND ANALYSIS
To verify the correctness of the time correction method based on virtual power proposed in this paper, a simulation model is built in Matlab/Simulink.
The simulation model adopts the modified IEEE 33 bus model with E 1 and E 2 power supplies. Its structure is shown in Figure 6. The two systems are divided between node 11 and node 12. The interface algorithm uses the ideal transformer method. After the division, the impedance of subsystem 2 is greater than that of subsystem 1, which meets the stability condition of the ideal transformer method.
Assume that system 1 voltage source E 1 = 120 kV, system 2 voltage source E 2 = 100 kV, frequency is 50 Hz, initial phase equal to 0. The virtual voltage source of the time correction unit is only used for synchronization and has nothing to do with the voltage of the IEEE system, it can be arbitrarily selected [23]. Here, for the convenience of calculation, U 1 = U 2 = 100 V, the frequency is 50 Hz, the virtual resistance R v = 100 ohm, and the virtual reactance L v = 0.5 H. K P = 0.001, K i = 0.05 in PI regulator. To simulate clock correction during simulation, all power supplies of subsystem 2 adopt the structure shown in Figure 5. The parameters were selected according to reference [23].
Assuming that the subsystems are synchronized, the A-phase current waveform between nodes 11 and 12 after the system is divided is shown in Figure 7.
It can be seen from Figure 7 that the subsystem keeps stable after segmentation.
A simulation is built to verify the time correction method based on virtual power method. Assuming that the clock t 2 of subsystem 2 is slower than that of subsystem 1 t 1 , and they are no longer synchronized. t 2 = 0.99 × t 1 , that is, U 2 = 100 sin0.99ωt, the time correction unit based on virtual power  Figure 8. The A-phase current waveform between nodes 11 and 12 is shown in Figure 9.
It can be seen from Figure 8 that when the clocks of subsystems 1 and 2 are not synchronized, the virtual voltage source U 1 and U 2 are no longer consistent. It can be seen from Figure 9 that the current between subsystems gradually increases, a larger deviation is produced compared with the normal current shown in Figure 7. At 0.1 s, the correction unit is put into operation. After a short time, the time error between the systems is compensated, the current between the subsystems returns to normal, and the waveforms of virtual voltage source U 1 and U 2 coincide. The output signal of the time correction unit is shown in Figure 10.
It can be seen from Figures 11 and 12 that when the delay occurs, the phase deviation will occur between E 1 and E 2 , and the current flowing between nodes is far greater than the normal value. After the time correction unit is put into operation, the phase difference is eliminated and the current amplitude returns to normal. The output signal of the time correction unit is shown in Figure 13. Now consider a more serious situation, that is, there are different clock frequencies and time delays. Assuming t 2 = 0.99t 1 -0.0025, U 2 = 100 sin[ω(0.99t−0.0025)], the A-phase voltage waveform of virtual voltage source is shown in Figure 14. The A-phase current waveform between nodes 11 and 12 is shown in Figure 15.  It can be seen from Figures 14 and 15 that when the delay and clock frequency error occur simultaneously in system 2, a large current error will immediately occur between system 1 and system 2, and it will increase with time until the system is unstable. After the time correction unit is put into operation, the time error is eliminated and the current amplitude return to normal. The output signal of the time correction unit is shown in Figure 16.

CONCLUSION
In this paper, a time correction method based on virtual power is proposed to solve the problem of asynchrony caused by power system segmentation. Additional virtual voltage source and virtual impedance are added between subsystems. PI regulator is used to force the virtual power flowing on the virtual impedance to zero, and the output of PI regulator is the time